1/* 2 * Copyright (C) 2000 Deep Blue Solutions Ltd 3 * Copyright (C) 2002 Shane Nay (shane@minirl.com) 4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. 5 * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18#include <linux/types.h> 19#include <linux/init.h> 20#include <linux/kernel.h> 21#include <linux/memory.h> 22#include <linux/platform_device.h> 23#include <linux/gpio.h> 24#include <linux/smsc911x.h> 25#include <linux/mfd/mc13783.h> 26#include <linux/spi/spi.h> 27#include <linux/usb/otg.h> 28#include <linux/usb/ulpi.h> 29#include <linux/mtd/physmap.h> 30 31#include <asm/mach-types.h> 32#include <asm/mach/arch.h> 33#include <asm/mach/time.h> 34#include <asm/mach/map.h> 35#include <asm/page.h> 36#include <asm/setup.h> 37 38#include <mach/hardware.h> 39#include <mach/common.h> 40#include <mach/board-mx31lite.h> 41#include <mach/iomux-mx3.h> 42#include <mach/irqs.h> 43#include <mach/mxc_ehci.h> 44#include <mach/ulpi.h> 45 46#include "devices-imx31.h" 47#include "devices.h" 48 49/* 50 * This file contains the module-specific initialization routines. 51 */ 52 53static unsigned int mx31lite_pins[] = { 54 /* LAN9117 IRQ pin */ 55 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), 56 /* SPI 1 */ 57 MX31_PIN_CSPI2_SCLK__SCLK, 58 MX31_PIN_CSPI2_MOSI__MOSI, 59 MX31_PIN_CSPI2_MISO__MISO, 60 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, 61 MX31_PIN_CSPI2_SS0__SS0, 62 MX31_PIN_CSPI2_SS1__SS1, 63 MX31_PIN_CSPI2_SS2__SS2, 64}; 65 66static const struct mxc_nand_platform_data 67mx31lite_nand_board_info __initconst = { 68 .width = 1, 69 .hw_ecc = 1, 70}; 71 72static struct smsc911x_platform_config smsc911x_config = { 73 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 74 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, 75 .flags = SMSC911X_USE_16BIT, 76}; 77 78static struct resource smsc911x_resources[] = { 79 { 80 .start = MX31_CS4_BASE_ADDR, 81 .end = MX31_CS4_BASE_ADDR + 0x100, 82 .flags = IORESOURCE_MEM, 83 }, { 84 .start = IOMUX_TO_IRQ(MX31_PIN_SFS6), 85 .end = IOMUX_TO_IRQ(MX31_PIN_SFS6), 86 .flags = IORESOURCE_IRQ, 87 }, 88}; 89 90static struct platform_device smsc911x_device = { 91 .name = "smsc911x", 92 .id = -1, 93 .num_resources = ARRAY_SIZE(smsc911x_resources), 94 .resource = smsc911x_resources, 95 .dev = { 96 .platform_data = &smsc911x_config, 97 }, 98}; 99 100/* 101 * SPI 102 * 103 * The MC13783 is the only hard-wired SPI device on the module. 104 */ 105 106static int spi_internal_chipselect[] = { 107 MXC_SPI_CS(0), 108}; 109 110static const struct spi_imx_master spi1_pdata __initconst = { 111 .chipselect = spi_internal_chipselect, 112 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), 113}; 114 115static struct mc13783_platform_data mc13783_pdata __initdata = { 116 .flags = MC13783_USE_RTC | 117 MC13783_USE_REGULATOR, 118}; 119 120static struct spi_board_info mc13783_spi_dev __initdata = { 121 .modalias = "mc13783", 122 .max_speed_hz = 1000000, 123 .bus_num = 1, 124 .chip_select = 0, 125 .platform_data = &mc13783_pdata, 126 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), 127}; 128 129/* 130 * USB 131 */ 132 133#if defined(CONFIG_USB_ULPI) 134#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ 135 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) 136 137static int usbh2_init(struct platform_device *pdev) 138{ 139 int pins[] = { 140 MX31_PIN_USBH2_DATA0__USBH2_DATA0, 141 MX31_PIN_USBH2_DATA1__USBH2_DATA1, 142 MX31_PIN_USBH2_CLK__USBH2_CLK, 143 MX31_PIN_USBH2_DIR__USBH2_DIR, 144 MX31_PIN_USBH2_NXT__USBH2_NXT, 145 MX31_PIN_USBH2_STP__USBH2_STP, 146 }; 147 148 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2"); 149 150 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG); 151 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG); 152 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG); 153 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG); 154 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG); 155 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG); 156 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG); 157 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG); 158 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG); 159 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG); 160 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); 161 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); 162 163 mxc_iomux_set_gpr(MUX_PGP_UH2, true); 164 165 /* chip select */ 166 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO), 167 "USBH2_CS"); 168 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS"); 169 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0); 170 171 return 0; 172} 173 174static struct mxc_usbh_platform_data usbh2_pdata = { 175 .init = usbh2_init, 176 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, 177 .flags = MXC_EHCI_POWER_PINS_ENABLED, 178}; 179#endif 180 181/* 182 * NOR flash 183 */ 184 185static struct physmap_flash_data nor_flash_data = { 186 .width = 2, 187}; 188 189static struct resource nor_flash_resource = { 190 .start = 0xa0000000, 191 .end = 0xa1ffffff, 192 .flags = IORESOURCE_MEM, 193}; 194 195static struct platform_device physmap_flash_device = { 196 .name = "physmap-flash", 197 .id = 0, 198 .dev = { 199 .platform_data = &nor_flash_data, 200 }, 201 .resource = &nor_flash_resource, 202 .num_resources = 1, 203}; 204 205 206 207/* 208 * This structure defines the MX31 memory map. 209 */ 210static struct map_desc mx31lite_io_desc[] __initdata = { 211 { 212 .virtual = MX31_CS4_BASE_ADDR_VIRT, 213 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), 214 .length = MX31_CS4_SIZE, 215 .type = MT_DEVICE 216 } 217}; 218 219/* 220 * Set up static virtual mappings. 221 */ 222void __init mx31lite_map_io(void) 223{ 224 mx31_map_io(); 225 iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc)); 226} 227 228static int mx31lite_baseboard; 229core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444); 230 231static void __init mxc_board_init(void) 232{ 233 int ret; 234 235 switch (mx31lite_baseboard) { 236 case MX31LITE_NOBOARD: 237 break; 238 case MX31LITE_DB: 239 mx31lite_db_init(); 240 break; 241 default: 242 printk(KERN_ERR "Illegal mx31lite_baseboard type %d\n", 243 mx31lite_baseboard); 244 } 245 246 mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins), 247 "mx31lite"); 248 249 /* NOR and NAND flash */ 250 platform_device_register(&physmap_flash_device); 251 imx31_add_mxc_nand(&mx31lite_nand_board_info); 252 253 imx31_add_spi_imx1(&spi1_pdata); 254 spi_register_board_info(&mc13783_spi_dev, 1); 255 256#if defined(CONFIG_USB_ULPI) 257 /* USB */ 258 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 259 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 260 261 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 262#endif 263 264 /* SMSC9117 IRQ pin */ 265 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); 266 if (ret) 267 pr_warning("could not get LAN irq gpio\n"); 268 else { 269 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6)); 270 platform_device_register(&smsc911x_device); 271 } 272} 273 274static void __init mx31lite_timer_init(void) 275{ 276 mx31_clocks_init(26000000); 277} 278 279struct sys_timer mx31lite_timer = { 280 .init = mx31lite_timer_init, 281}; 282 283MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") 284 /* Maintainer: Freescale Semiconductor, Inc. */ 285 .phys_io = MX31_AIPS1_BASE_ADDR, 286 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, 287 .boot_params = MX3x_PHYS_OFFSET + 0x100, 288 .map_io = mx31lite_map_io, 289 .init_irq = mx31_init_irq, 290 .init_machine = mxc_board_init, 291 .timer = &mx31lite_timer, 292MACHINE_END 293