1/* 2 * Table of the DAVINCI register configurations for the PINMUX combinations 3 * 4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> 5 * 6 * Based on linux/include/asm-arm/arch-omap/mux.h: 7 * Copyright (C) 2003 - 2005 Nokia Corporation 8 * 9 * Written by Tony Lindgren 10 * 11 * 2007 (c) MontaVista Software, Inc. This file is licensed under 12 * the terms of the GNU General Public License version 2. This program 13 * is licensed "as is" without any warranty of any kind, whether express 14 * or implied. 15 * 16 * Copyright (C) 2008 Texas Instruments. 17 */ 18 19#ifndef __INC_MACH_MUX_H 20#define __INC_MACH_MUX_H 21 22struct mux_config { 23 const char *name; 24 const char *mux_reg_name; 25 const unsigned char mux_reg; 26 const unsigned char mask_offset; 27 const unsigned char mask; 28 const unsigned char mode; 29 bool debug; 30}; 31 32enum davinci_dm644x_index { 33 /* ATA and HDDIR functions */ 34 DM644X_HDIREN, 35 DM644X_ATAEN, 36 DM644X_ATAEN_DISABLE, 37 38 /* HPI functions */ 39 DM644X_HPIEN_DISABLE, 40 41 /* AEAW functions */ 42 DM644X_AEAW, 43 DM644X_AEAW0, 44 DM644X_AEAW1, 45 DM644X_AEAW2, 46 DM644X_AEAW3, 47 DM644X_AEAW4, 48 49 /* Memory Stick */ 50 DM644X_MSTK, 51 52 /* I2C */ 53 DM644X_I2C, 54 55 /* ASP function */ 56 DM644X_MCBSP, 57 58 /* UART1 */ 59 DM644X_UART1, 60 61 /* UART2 */ 62 DM644X_UART2, 63 64 /* PWM0 */ 65 DM644X_PWM0, 66 67 /* PWM1 */ 68 DM644X_PWM1, 69 70 /* PWM2 */ 71 DM644X_PWM2, 72 73 /* VLYNQ function */ 74 DM644X_VLYNQEN, 75 DM644X_VLSCREN, 76 DM644X_VLYNQWD, 77 78 /* EMAC and MDIO function */ 79 DM644X_EMACEN, 80 81 /* GPIO3V[0:16] pins */ 82 DM644X_GPIO3V, 83 84 /* GPIO pins */ 85 DM644X_GPIO0, 86 DM644X_GPIO3, 87 DM644X_GPIO43_44, 88 DM644X_GPIO46_47, 89 90 /* VPBE */ 91 DM644X_RGB666, 92 93 /* LCD */ 94 DM644X_LOEEN, 95 DM644X_LFLDEN, 96}; 97 98enum davinci_dm646x_index { 99 /* ATA function */ 100 DM646X_ATAEN, 101 102 /* AUDIO Clock */ 103 DM646X_AUDCK1, 104 DM646X_AUDCK0, 105 106 /* CRGEN Control */ 107 DM646X_CRGMUX, 108 109 /* VPIF Control */ 110 DM646X_STSOMUX_DISABLE, 111 DM646X_STSIMUX_DISABLE, 112 DM646X_PTSOMUX_DISABLE, 113 DM646X_PTSIMUX_DISABLE, 114 115 /* TSIF Control */ 116 DM646X_STSOMUX, 117 DM646X_STSIMUX, 118 DM646X_PTSOMUX_PARALLEL, 119 DM646X_PTSIMUX_PARALLEL, 120 DM646X_PTSOMUX_SERIAL, 121 DM646X_PTSIMUX_SERIAL, 122}; 123 124enum davinci_dm355_index { 125 /* MMC/SD 0 */ 126 DM355_MMCSD0, 127 128 /* MMC/SD 1 */ 129 DM355_SD1_CLK, 130 DM355_SD1_CMD, 131 DM355_SD1_DATA3, 132 DM355_SD1_DATA2, 133 DM355_SD1_DATA1, 134 DM355_SD1_DATA0, 135 136 /* I2C */ 137 DM355_I2C_SDA, 138 DM355_I2C_SCL, 139 140 /* ASP0 function */ 141 DM355_MCBSP0_BDX, 142 DM355_MCBSP0_X, 143 DM355_MCBSP0_BFSX, 144 DM355_MCBSP0_BDR, 145 DM355_MCBSP0_R, 146 DM355_MCBSP0_BFSR, 147 148 /* SPI0 */ 149 DM355_SPI0_SDI, 150 DM355_SPI0_SDENA0, 151 DM355_SPI0_SDENA1, 152 153 /* IRQ muxing */ 154 DM355_INT_EDMA_CC, 155 DM355_INT_EDMA_TC0_ERR, 156 DM355_INT_EDMA_TC1_ERR, 157 158 /* EDMA event muxing */ 159 DM355_EVT8_ASP1_TX, 160 DM355_EVT9_ASP1_RX, 161 DM355_EVT26_MMC0_RX, 162 163 /* Video Out */ 164 DM355_VOUT_FIELD, 165 DM355_VOUT_FIELD_G70, 166 DM355_VOUT_HVSYNC, 167 DM355_VOUT_COUTL_EN, 168 DM355_VOUT_COUTH_EN, 169 170 /* Video In Pin Mux */ 171 DM355_VIN_PCLK, 172 DM355_VIN_CAM_WEN, 173 DM355_VIN_CAM_VD, 174 DM355_VIN_CAM_HD, 175 DM355_VIN_YIN_EN, 176 DM355_VIN_CINL_EN, 177 DM355_VIN_CINH_EN, 178}; 179 180enum davinci_dm365_index { 181 /* MMC/SD 0 */ 182 DM365_MMCSD0, 183 184 /* MMC/SD 1 */ 185 DM365_SD1_CLK, 186 DM365_SD1_CMD, 187 DM365_SD1_DATA3, 188 DM365_SD1_DATA2, 189 DM365_SD1_DATA1, 190 DM365_SD1_DATA0, 191 192 /* I2C */ 193 DM365_I2C_SDA, 194 DM365_I2C_SCL, 195 196 /* AEMIF */ 197 DM365_AEMIF_AR_A14, 198 DM365_AEMIF_AR_BA0, 199 DM365_AEMIF_A3, 200 DM365_AEMIF_A7, 201 DM365_AEMIF_D15_8, 202 DM365_AEMIF_CE0, 203 DM365_AEMIF_CE1, 204 DM365_AEMIF_WE_OE, 205 206 /* ASP0 function */ 207 DM365_MCBSP0_BDX, 208 DM365_MCBSP0_X, 209 DM365_MCBSP0_BFSX, 210 DM365_MCBSP0_BDR, 211 DM365_MCBSP0_R, 212 DM365_MCBSP0_BFSR, 213 214 /* SPI0 */ 215 DM365_SPI0_SCLK, 216 DM365_SPI0_SDI, 217 DM365_SPI0_SDO, 218 DM365_SPI0_SDENA0, 219 DM365_SPI0_SDENA1, 220 221 /* UART */ 222 DM365_UART0_RXD, 223 DM365_UART0_TXD, 224 DM365_UART1_RXD, 225 DM365_UART1_TXD, 226 DM365_UART1_RTS, 227 DM365_UART1_CTS, 228 229 /* EMAC */ 230 DM365_EMAC_TX_EN, 231 DM365_EMAC_TX_CLK, 232 DM365_EMAC_COL, 233 DM365_EMAC_TXD3, 234 DM365_EMAC_TXD2, 235 DM365_EMAC_TXD1, 236 DM365_EMAC_TXD0, 237 DM365_EMAC_RXD3, 238 DM365_EMAC_RXD2, 239 DM365_EMAC_RXD1, 240 DM365_EMAC_RXD0, 241 DM365_EMAC_RX_CLK, 242 DM365_EMAC_RX_DV, 243 DM365_EMAC_RX_ER, 244 DM365_EMAC_CRS, 245 DM365_EMAC_MDIO, 246 DM365_EMAC_MDCLK, 247 248 /* Key Scan */ 249 DM365_KEYSCAN, 250 251 /* PWM */ 252 DM365_PWM0, 253 DM365_PWM0_G23, 254 DM365_PWM1, 255 DM365_PWM1_G25, 256 DM365_PWM2_G87, 257 DM365_PWM2_G88, 258 DM365_PWM2_G89, 259 DM365_PWM2_G90, 260 DM365_PWM3_G80, 261 DM365_PWM3_G81, 262 DM365_PWM3_G85, 263 DM365_PWM3_G86, 264 265 /* SPI1 */ 266 DM365_SPI1_SCLK, 267 DM365_SPI1_SDO, 268 DM365_SPI1_SDI, 269 DM365_SPI1_SDENA0, 270 DM365_SPI1_SDENA1, 271 272 /* SPI2 */ 273 DM365_SPI2_SCLK, 274 DM365_SPI2_SDO, 275 DM365_SPI2_SDI, 276 DM365_SPI2_SDENA0, 277 DM365_SPI2_SDENA1, 278 279 /* SPI3 */ 280 DM365_SPI3_SCLK, 281 DM365_SPI3_SDO, 282 DM365_SPI3_SDI, 283 DM365_SPI3_SDENA0, 284 DM365_SPI3_SDENA1, 285 286 /* SPI4 */ 287 DM365_SPI4_SCLK, 288 DM365_SPI4_SDO, 289 DM365_SPI4_SDI, 290 DM365_SPI4_SDENA0, 291 DM365_SPI4_SDENA1, 292 293 /* Clock */ 294 DM365_CLKOUT0, 295 DM365_CLKOUT1, 296 DM365_CLKOUT2, 297 298 /* GPIO */ 299 DM365_GPIO20, 300 DM365_GPIO30, 301 DM365_GPIO31, 302 DM365_GPIO32, 303 DM365_GPIO33, 304 DM365_GPIO40, 305 DM365_GPIO64_57, 306 307 /* Video */ 308 DM365_VOUT_FIELD, 309 DM365_VOUT_FIELD_G81, 310 DM365_VOUT_HVSYNC, 311 DM365_VOUT_COUTL_EN, 312 DM365_VOUT_COUTH_EN, 313 DM365_VIN_CAM_WEN, 314 DM365_VIN_CAM_VD, 315 DM365_VIN_CAM_HD, 316 DM365_VIN_YIN4_7_EN, 317 DM365_VIN_YIN0_3_EN, 318 319 /* IRQ muxing */ 320 DM365_INT_EDMA_CC, 321 DM365_INT_EDMA_TC0_ERR, 322 DM365_INT_EDMA_TC1_ERR, 323 DM365_INT_EDMA_TC2_ERR, 324 DM365_INT_EDMA_TC3_ERR, 325 DM365_INT_PRTCSS, 326 DM365_INT_EMAC_RXTHRESH, 327 DM365_INT_EMAC_RXPULSE, 328 DM365_INT_EMAC_TXPULSE, 329 DM365_INT_EMAC_MISCPULSE, 330 DM365_INT_IMX0_ENABLE, 331 DM365_INT_IMX0_DISABLE, 332 DM365_INT_HDVICP_ENABLE, 333 DM365_INT_HDVICP_DISABLE, 334 DM365_INT_IMX1_ENABLE, 335 DM365_INT_IMX1_DISABLE, 336 DM365_INT_NSF_ENABLE, 337 DM365_INT_NSF_DISABLE, 338 339 /* EDMA event muxing */ 340 DM365_EVT2_ASP_TX, 341 DM365_EVT3_ASP_RX, 342 DM365_EVT2_VC_TX, 343 DM365_EVT3_VC_RX, 344 DM365_EVT26_MMC0_RX, 345}; 346 347enum da830_index { 348 DA830_GPIO7_14, 349 DA830_RTCK, 350 DA830_GPIO7_15, 351 DA830_EMU_0, 352 DA830_EMB_SDCKE, 353 DA830_EMB_CLK_GLUE, 354 DA830_EMB_CLK, 355 DA830_NEMB_CS_0, 356 DA830_NEMB_CAS, 357 DA830_NEMB_RAS, 358 DA830_NEMB_WE, 359 DA830_EMB_BA_1, 360 DA830_EMB_BA_0, 361 DA830_EMB_A_0, 362 DA830_EMB_A_1, 363 DA830_EMB_A_2, 364 DA830_EMB_A_3, 365 DA830_EMB_A_4, 366 DA830_EMB_A_5, 367 DA830_GPIO7_0, 368 DA830_GPIO7_1, 369 DA830_GPIO7_2, 370 DA830_GPIO7_3, 371 DA830_GPIO7_4, 372 DA830_GPIO7_5, 373 DA830_GPIO7_6, 374 DA830_GPIO7_7, 375 DA830_EMB_A_6, 376 DA830_EMB_A_7, 377 DA830_EMB_A_8, 378 DA830_EMB_A_9, 379 DA830_EMB_A_10, 380 DA830_EMB_A_11, 381 DA830_EMB_A_12, 382 DA830_EMB_D_31, 383 DA830_GPIO7_8, 384 DA830_GPIO7_9, 385 DA830_GPIO7_10, 386 DA830_GPIO7_11, 387 DA830_GPIO7_12, 388 DA830_GPIO7_13, 389 DA830_GPIO3_13, 390 DA830_EMB_D_30, 391 DA830_EMB_D_29, 392 DA830_EMB_D_28, 393 DA830_EMB_D_27, 394 DA830_EMB_D_26, 395 DA830_EMB_D_25, 396 DA830_EMB_D_24, 397 DA830_EMB_D_23, 398 DA830_EMB_D_22, 399 DA830_EMB_D_21, 400 DA830_EMB_D_20, 401 DA830_EMB_D_19, 402 DA830_EMB_D_18, 403 DA830_EMB_D_17, 404 DA830_EMB_D_16, 405 DA830_NEMB_WE_DQM_3, 406 DA830_NEMB_WE_DQM_2, 407 DA830_EMB_D_0, 408 DA830_EMB_D_1, 409 DA830_EMB_D_2, 410 DA830_EMB_D_3, 411 DA830_EMB_D_4, 412 DA830_EMB_D_5, 413 DA830_EMB_D_6, 414 DA830_GPIO6_0, 415 DA830_GPIO6_1, 416 DA830_GPIO6_2, 417 DA830_GPIO6_3, 418 DA830_GPIO6_4, 419 DA830_GPIO6_5, 420 DA830_GPIO6_6, 421 DA830_EMB_D_7, 422 DA830_EMB_D_8, 423 DA830_EMB_D_9, 424 DA830_EMB_D_10, 425 DA830_EMB_D_11, 426 DA830_EMB_D_12, 427 DA830_EMB_D_13, 428 DA830_EMB_D_14, 429 DA830_GPIO6_7, 430 DA830_GPIO6_8, 431 DA830_GPIO6_9, 432 DA830_GPIO6_10, 433 DA830_GPIO6_11, 434 DA830_GPIO6_12, 435 DA830_GPIO6_13, 436 DA830_GPIO6_14, 437 DA830_EMB_D_15, 438 DA830_NEMB_WE_DQM_1, 439 DA830_NEMB_WE_DQM_0, 440 DA830_SPI0_SOMI_0, 441 DA830_SPI0_SIMO_0, 442 DA830_SPI0_CLK, 443 DA830_NSPI0_ENA, 444 DA830_NSPI0_SCS_0, 445 DA830_EQEP0I, 446 DA830_EQEP0S, 447 DA830_EQEP1I, 448 DA830_NUART0_CTS, 449 DA830_NUART0_RTS, 450 DA830_EQEP0A, 451 DA830_EQEP0B, 452 DA830_GPIO6_15, 453 DA830_GPIO5_14, 454 DA830_GPIO5_15, 455 DA830_GPIO5_0, 456 DA830_GPIO5_1, 457 DA830_GPIO5_2, 458 DA830_GPIO5_3, 459 DA830_GPIO5_4, 460 DA830_SPI1_SOMI_0, 461 DA830_SPI1_SIMO_0, 462 DA830_SPI1_CLK, 463 DA830_UART0_RXD, 464 DA830_UART0_TXD, 465 DA830_AXR1_10, 466 DA830_AXR1_11, 467 DA830_NSPI1_ENA, 468 DA830_I2C1_SCL, 469 DA830_I2C1_SDA, 470 DA830_EQEP1S, 471 DA830_I2C0_SDA, 472 DA830_I2C0_SCL, 473 DA830_UART2_RXD, 474 DA830_TM64P0_IN12, 475 DA830_TM64P0_OUT12, 476 DA830_GPIO5_5, 477 DA830_GPIO5_6, 478 DA830_GPIO5_7, 479 DA830_GPIO5_8, 480 DA830_GPIO5_9, 481 DA830_GPIO5_10, 482 DA830_GPIO5_11, 483 DA830_GPIO5_12, 484 DA830_NSPI1_SCS_0, 485 DA830_USB0_DRVVBUS, 486 DA830_AHCLKX0, 487 DA830_ACLKX0, 488 DA830_AFSX0, 489 DA830_AHCLKR0, 490 DA830_ACLKR0, 491 DA830_AFSR0, 492 DA830_UART2_TXD, 493 DA830_AHCLKX2, 494 DA830_ECAP0_APWM0, 495 DA830_RMII_MHZ_50_CLK, 496 DA830_ECAP1_APWM1, 497 DA830_USB_REFCLKIN, 498 DA830_GPIO5_13, 499 DA830_GPIO4_15, 500 DA830_GPIO2_11, 501 DA830_GPIO2_12, 502 DA830_GPIO2_13, 503 DA830_GPIO2_14, 504 DA830_GPIO2_15, 505 DA830_GPIO3_12, 506 DA830_AMUTE0, 507 DA830_AXR0_0, 508 DA830_AXR0_1, 509 DA830_AXR0_2, 510 DA830_AXR0_3, 511 DA830_AXR0_4, 512 DA830_AXR0_5, 513 DA830_AXR0_6, 514 DA830_RMII_TXD_0, 515 DA830_RMII_TXD_1, 516 DA830_RMII_TXEN, 517 DA830_RMII_CRS_DV, 518 DA830_RMII_RXD_0, 519 DA830_RMII_RXD_1, 520 DA830_RMII_RXER, 521 DA830_AFSR2, 522 DA830_ACLKX2, 523 DA830_AXR2_3, 524 DA830_AXR2_2, 525 DA830_AXR2_1, 526 DA830_AFSX2, 527 DA830_ACLKR2, 528 DA830_NRESETOUT, 529 DA830_GPIO3_0, 530 DA830_GPIO3_1, 531 DA830_GPIO3_2, 532 DA830_GPIO3_3, 533 DA830_GPIO3_4, 534 DA830_GPIO3_5, 535 DA830_GPIO3_6, 536 DA830_AXR0_7, 537 DA830_AXR0_8, 538 DA830_UART1_RXD, 539 DA830_UART1_TXD, 540 DA830_AXR0_11, 541 DA830_AHCLKX1, 542 DA830_ACLKX1, 543 DA830_AFSX1, 544 DA830_MDIO_CLK, 545 DA830_MDIO_D, 546 DA830_AXR0_9, 547 DA830_AXR0_10, 548 DA830_EPWM0B, 549 DA830_EPWM0A, 550 DA830_EPWMSYNCI, 551 DA830_AXR2_0, 552 DA830_EPWMSYNC0, 553 DA830_GPIO3_7, 554 DA830_GPIO3_8, 555 DA830_GPIO3_9, 556 DA830_GPIO3_10, 557 DA830_GPIO3_11, 558 DA830_GPIO3_14, 559 DA830_GPIO3_15, 560 DA830_GPIO4_10, 561 DA830_AHCLKR1, 562 DA830_ACLKR1, 563 DA830_AFSR1, 564 DA830_AMUTE1, 565 DA830_AXR1_0, 566 DA830_AXR1_1, 567 DA830_AXR1_2, 568 DA830_AXR1_3, 569 DA830_ECAP2_APWM2, 570 DA830_EHRPWMGLUETZ, 571 DA830_EQEP1A, 572 DA830_GPIO4_11, 573 DA830_GPIO4_12, 574 DA830_GPIO4_13, 575 DA830_GPIO4_14, 576 DA830_GPIO4_0, 577 DA830_GPIO4_1, 578 DA830_GPIO4_2, 579 DA830_GPIO4_3, 580 DA830_AXR1_4, 581 DA830_AXR1_5, 582 DA830_AXR1_6, 583 DA830_AXR1_7, 584 DA830_AXR1_8, 585 DA830_AXR1_9, 586 DA830_EMA_D_0, 587 DA830_EMA_D_1, 588 DA830_EQEP1B, 589 DA830_EPWM2B, 590 DA830_EPWM2A, 591 DA830_EPWM1B, 592 DA830_EPWM1A, 593 DA830_MMCSD_DAT_0, 594 DA830_MMCSD_DAT_1, 595 DA830_UHPI_HD_0, 596 DA830_UHPI_HD_1, 597 DA830_GPIO4_4, 598 DA830_GPIO4_5, 599 DA830_GPIO4_6, 600 DA830_GPIO4_7, 601 DA830_GPIO4_8, 602 DA830_GPIO4_9, 603 DA830_GPIO0_0, 604 DA830_GPIO0_1, 605 DA830_EMA_D_2, 606 DA830_EMA_D_3, 607 DA830_EMA_D_4, 608 DA830_EMA_D_5, 609 DA830_EMA_D_6, 610 DA830_EMA_D_7, 611 DA830_EMA_D_8, 612 DA830_EMA_D_9, 613 DA830_MMCSD_DAT_2, 614 DA830_MMCSD_DAT_3, 615 DA830_MMCSD_DAT_4, 616 DA830_MMCSD_DAT_5, 617 DA830_MMCSD_DAT_6, 618 DA830_MMCSD_DAT_7, 619 DA830_UHPI_HD_8, 620 DA830_UHPI_HD_9, 621 DA830_UHPI_HD_2, 622 DA830_UHPI_HD_3, 623 DA830_UHPI_HD_4, 624 DA830_UHPI_HD_5, 625 DA830_UHPI_HD_6, 626 DA830_UHPI_HD_7, 627 DA830_LCD_D_8, 628 DA830_LCD_D_9, 629 DA830_GPIO0_2, 630 DA830_GPIO0_3, 631 DA830_GPIO0_4, 632 DA830_GPIO0_5, 633 DA830_GPIO0_6, 634 DA830_GPIO0_7, 635 DA830_GPIO0_8, 636 DA830_GPIO0_9, 637 DA830_EMA_D_10, 638 DA830_EMA_D_11, 639 DA830_EMA_D_12, 640 DA830_EMA_D_13, 641 DA830_EMA_D_14, 642 DA830_EMA_D_15, 643 DA830_EMA_A_0, 644 DA830_EMA_A_1, 645 DA830_UHPI_HD_10, 646 DA830_UHPI_HD_11, 647 DA830_UHPI_HD_12, 648 DA830_UHPI_HD_13, 649 DA830_UHPI_HD_14, 650 DA830_UHPI_HD_15, 651 DA830_LCD_D_7, 652 DA830_MMCSD_CLK, 653 DA830_LCD_D_10, 654 DA830_LCD_D_11, 655 DA830_LCD_D_12, 656 DA830_LCD_D_13, 657 DA830_LCD_D_14, 658 DA830_LCD_D_15, 659 DA830_UHPI_HCNTL0, 660 DA830_GPIO0_10, 661 DA830_GPIO0_11, 662 DA830_GPIO0_12, 663 DA830_GPIO0_13, 664 DA830_GPIO0_14, 665 DA830_GPIO0_15, 666 DA830_GPIO1_0, 667 DA830_GPIO1_1, 668 DA830_EMA_A_2, 669 DA830_EMA_A_3, 670 DA830_EMA_A_4, 671 DA830_EMA_A_5, 672 DA830_EMA_A_6, 673 DA830_EMA_A_7, 674 DA830_EMA_A_8, 675 DA830_EMA_A_9, 676 DA830_MMCSD_CMD, 677 DA830_LCD_D_6, 678 DA830_LCD_D_3, 679 DA830_LCD_D_2, 680 DA830_LCD_D_1, 681 DA830_LCD_D_0, 682 DA830_LCD_PCLK, 683 DA830_LCD_HSYNC, 684 DA830_UHPI_HCNTL1, 685 DA830_GPIO1_2, 686 DA830_GPIO1_3, 687 DA830_GPIO1_4, 688 DA830_GPIO1_5, 689 DA830_GPIO1_6, 690 DA830_GPIO1_7, 691 DA830_GPIO1_8, 692 DA830_GPIO1_9, 693 DA830_EMA_A_10, 694 DA830_EMA_A_11, 695 DA830_EMA_A_12, 696 DA830_EMA_BA_1, 697 DA830_EMA_BA_0, 698 DA830_EMA_CLK, 699 DA830_EMA_SDCKE, 700 DA830_NEMA_CAS, 701 DA830_LCD_VSYNC, 702 DA830_NLCD_AC_ENB_CS, 703 DA830_LCD_MCLK, 704 DA830_LCD_D_5, 705 DA830_LCD_D_4, 706 DA830_OBSCLK, 707 DA830_NEMA_CS_4, 708 DA830_UHPI_HHWIL, 709 DA830_AHCLKR2, 710 DA830_GPIO1_10, 711 DA830_GPIO1_11, 712 DA830_GPIO1_12, 713 DA830_GPIO1_13, 714 DA830_GPIO1_14, 715 DA830_GPIO1_15, 716 DA830_GPIO2_0, 717 DA830_GPIO2_1, 718 DA830_NEMA_RAS, 719 DA830_NEMA_WE, 720 DA830_NEMA_CS_0, 721 DA830_NEMA_CS_2, 722 DA830_NEMA_CS_3, 723 DA830_NEMA_OE, 724 DA830_NEMA_WE_DQM_1, 725 DA830_NEMA_WE_DQM_0, 726 DA830_NEMA_CS_5, 727 DA830_UHPI_HRNW, 728 DA830_NUHPI_HAS, 729 DA830_NUHPI_HCS, 730 DA830_NUHPI_HDS1, 731 DA830_NUHPI_HDS2, 732 DA830_NUHPI_HINT, 733 DA830_AXR0_12, 734 DA830_AMUTE2, 735 DA830_AXR0_13, 736 DA830_AXR0_14, 737 DA830_AXR0_15, 738 DA830_GPIO2_2, 739 DA830_GPIO2_3, 740 DA830_GPIO2_4, 741 DA830_GPIO2_5, 742 DA830_GPIO2_6, 743 DA830_GPIO2_7, 744 DA830_GPIO2_8, 745 DA830_GPIO2_9, 746 DA830_EMA_WAIT_0, 747 DA830_NUHPI_HRDY, 748 DA830_GPIO2_10, 749}; 750 751enum davinci_da850_index { 752 /* UART0 function */ 753 DA850_NUART0_CTS, 754 DA850_NUART0_RTS, 755 DA850_UART0_RXD, 756 DA850_UART0_TXD, 757 758 /* UART1 function */ 759 DA850_NUART1_CTS, 760 DA850_NUART1_RTS, 761 DA850_UART1_RXD, 762 DA850_UART1_TXD, 763 764 /* UART2 function */ 765 DA850_NUART2_CTS, 766 DA850_NUART2_RTS, 767 DA850_UART2_RXD, 768 DA850_UART2_TXD, 769 770 /* I2C1 function */ 771 DA850_I2C1_SCL, 772 DA850_I2C1_SDA, 773 774 /* I2C0 function */ 775 DA850_I2C0_SDA, 776 DA850_I2C0_SCL, 777 778 /* EMAC function */ 779 DA850_MII_TXEN, 780 DA850_MII_TXCLK, 781 DA850_MII_COL, 782 DA850_MII_TXD_3, 783 DA850_MII_TXD_2, 784 DA850_MII_TXD_1, 785 DA850_MII_TXD_0, 786 DA850_MII_RXER, 787 DA850_MII_CRS, 788 DA850_MII_RXCLK, 789 DA850_MII_RXDV, 790 DA850_MII_RXD_3, 791 DA850_MII_RXD_2, 792 DA850_MII_RXD_1, 793 DA850_MII_RXD_0, 794 DA850_MDIO_CLK, 795 DA850_MDIO_D, 796 DA850_RMII_TXD_0, 797 DA850_RMII_TXD_1, 798 DA850_RMII_TXEN, 799 DA850_RMII_CRS_DV, 800 DA850_RMII_RXD_0, 801 DA850_RMII_RXD_1, 802 DA850_RMII_RXER, 803 DA850_RMII_MHZ_50_CLK, 804 805 /* McASP function */ 806 DA850_ACLKR, 807 DA850_ACLKX, 808 DA850_AFSR, 809 DA850_AFSX, 810 DA850_AHCLKR, 811 DA850_AHCLKX, 812 DA850_AMUTE, 813 DA850_AXR_15, 814 DA850_AXR_14, 815 DA850_AXR_13, 816 DA850_AXR_12, 817 DA850_AXR_11, 818 DA850_AXR_10, 819 DA850_AXR_9, 820 DA850_AXR_8, 821 DA850_AXR_7, 822 DA850_AXR_6, 823 DA850_AXR_5, 824 DA850_AXR_4, 825 DA850_AXR_3, 826 DA850_AXR_2, 827 DA850_AXR_1, 828 DA850_AXR_0, 829 830 /* LCD function */ 831 DA850_LCD_D_7, 832 DA850_LCD_D_6, 833 DA850_LCD_D_5, 834 DA850_LCD_D_4, 835 DA850_LCD_D_3, 836 DA850_LCD_D_2, 837 DA850_LCD_D_1, 838 DA850_LCD_D_0, 839 DA850_LCD_D_15, 840 DA850_LCD_D_14, 841 DA850_LCD_D_13, 842 DA850_LCD_D_12, 843 DA850_LCD_D_11, 844 DA850_LCD_D_10, 845 DA850_LCD_D_9, 846 DA850_LCD_D_8, 847 DA850_LCD_PCLK, 848 DA850_LCD_HSYNC, 849 DA850_LCD_VSYNC, 850 DA850_NLCD_AC_ENB_CS, 851 852 /* MMC/SD0 function */ 853 DA850_MMCSD0_DAT_0, 854 DA850_MMCSD0_DAT_1, 855 DA850_MMCSD0_DAT_2, 856 DA850_MMCSD0_DAT_3, 857 DA850_MMCSD0_CLK, 858 DA850_MMCSD0_CMD, 859 860 /* EMIF2.5/EMIFA function */ 861 DA850_EMA_D_7, 862 DA850_EMA_D_6, 863 DA850_EMA_D_5, 864 DA850_EMA_D_4, 865 DA850_EMA_D_3, 866 DA850_EMA_D_2, 867 DA850_EMA_D_1, 868 DA850_EMA_D_0, 869 DA850_EMA_A_1, 870 DA850_EMA_A_2, 871 DA850_NEMA_CS_3, 872 DA850_NEMA_CS_4, 873 DA850_NEMA_WE, 874 DA850_NEMA_OE, 875 DA850_EMA_D_15, 876 DA850_EMA_D_14, 877 DA850_EMA_D_13, 878 DA850_EMA_D_12, 879 DA850_EMA_D_11, 880 DA850_EMA_D_10, 881 DA850_EMA_D_9, 882 DA850_EMA_D_8, 883 DA850_EMA_A_0, 884 DA850_EMA_A_3, 885 DA850_EMA_A_4, 886 DA850_EMA_A_5, 887 DA850_EMA_A_6, 888 DA850_EMA_A_7, 889 DA850_EMA_A_8, 890 DA850_EMA_A_9, 891 DA850_EMA_A_10, 892 DA850_EMA_A_11, 893 DA850_EMA_A_12, 894 DA850_EMA_A_13, 895 DA850_EMA_A_14, 896 DA850_EMA_A_15, 897 DA850_EMA_A_16, 898 DA850_EMA_A_17, 899 DA850_EMA_A_18, 900 DA850_EMA_A_19, 901 DA850_EMA_A_20, 902 DA850_EMA_A_21, 903 DA850_EMA_A_22, 904 DA850_EMA_A_23, 905 DA850_EMA_BA_1, 906 DA850_EMA_CLK, 907 DA850_EMA_WAIT_1, 908 DA850_NEMA_CS_2, 909 910 /* GPIO function */ 911 DA850_GPIO2_6, 912 DA850_GPIO2_8, 913 DA850_GPIO2_15, 914 DA850_GPIO4_0, 915 DA850_GPIO4_1, 916 DA850_RTC_ALARM, 917}; 918 919enum davinci_tnetv107x_index { 920 TNETV107X_ASR_A00, 921 TNETV107X_GPIO32, 922 TNETV107X_ASR_A01, 923 TNETV107X_GPIO33, 924 TNETV107X_ASR_A02, 925 TNETV107X_GPIO34, 926 TNETV107X_ASR_A03, 927 TNETV107X_GPIO35, 928 TNETV107X_ASR_A04, 929 TNETV107X_GPIO36, 930 TNETV107X_ASR_A05, 931 TNETV107X_GPIO37, 932 TNETV107X_ASR_A06, 933 TNETV107X_GPIO38, 934 TNETV107X_ASR_A07, 935 TNETV107X_GPIO39, 936 TNETV107X_ASR_A08, 937 TNETV107X_GPIO40, 938 TNETV107X_ASR_A09, 939 TNETV107X_GPIO41, 940 TNETV107X_ASR_A10, 941 TNETV107X_GPIO42, 942 TNETV107X_ASR_A11, 943 TNETV107X_BOOT_STRP_0, 944 TNETV107X_ASR_A12, 945 TNETV107X_BOOT_STRP_1, 946 TNETV107X_ASR_A13, 947 TNETV107X_GPIO43, 948 TNETV107X_ASR_A14, 949 TNETV107X_GPIO44, 950 TNETV107X_ASR_A15, 951 TNETV107X_GPIO45, 952 TNETV107X_ASR_A16, 953 TNETV107X_GPIO46, 954 TNETV107X_ASR_A17, 955 TNETV107X_GPIO47, 956 TNETV107X_ASR_A18, 957 TNETV107X_GPIO48, 958 TNETV107X_SDIO1_DATA3_0, 959 TNETV107X_ASR_A19, 960 TNETV107X_GPIO49, 961 TNETV107X_SDIO1_DATA2_0, 962 TNETV107X_ASR_A20, 963 TNETV107X_GPIO50, 964 TNETV107X_SDIO1_DATA1_0, 965 TNETV107X_ASR_A21, 966 TNETV107X_GPIO51, 967 TNETV107X_SDIO1_DATA0_0, 968 TNETV107X_ASR_A22, 969 TNETV107X_GPIO52, 970 TNETV107X_SDIO1_CMD_0, 971 TNETV107X_ASR_A23, 972 TNETV107X_GPIO53, 973 TNETV107X_SDIO1_CLK_0, 974 TNETV107X_ASR_BA_1, 975 TNETV107X_GPIO54, 976 TNETV107X_SYS_PLL_CLK, 977 TNETV107X_ASR_CS0, 978 TNETV107X_ASR_CS1, 979 TNETV107X_ASR_CS2, 980 TNETV107X_TDM_PLL_CLK, 981 TNETV107X_ASR_CS3, 982 TNETV107X_ETH_PHY_CLK, 983 TNETV107X_ASR_D00, 984 TNETV107X_GPIO55, 985 TNETV107X_ASR_D01, 986 TNETV107X_GPIO56, 987 TNETV107X_ASR_D02, 988 TNETV107X_GPIO57, 989 TNETV107X_ASR_D03, 990 TNETV107X_GPIO58, 991 TNETV107X_ASR_D04, 992 TNETV107X_GPIO59_0, 993 TNETV107X_ASR_D05, 994 TNETV107X_GPIO60_0, 995 TNETV107X_ASR_D06, 996 TNETV107X_GPIO61_0, 997 TNETV107X_ASR_D07, 998 TNETV107X_GPIO62_0, 999 TNETV107X_ASR_D08, 1000 TNETV107X_GPIO63_0, 1001 TNETV107X_ASR_D09, 1002 TNETV107X_GPIO64_0, 1003 TNETV107X_ASR_D10, 1004 TNETV107X_SDIO1_DATA3_1, 1005 TNETV107X_ASR_D11, 1006 TNETV107X_SDIO1_DATA2_1, 1007 TNETV107X_ASR_D12, 1008 TNETV107X_SDIO1_DATA1_1, 1009 TNETV107X_ASR_D13, 1010 TNETV107X_SDIO1_DATA0_1, 1011 TNETV107X_ASR_D14, 1012 TNETV107X_SDIO1_CMD_1, 1013 TNETV107X_ASR_D15, 1014 TNETV107X_SDIO1_CLK_1, 1015 TNETV107X_ASR_OE, 1016 TNETV107X_BOOT_STRP_2, 1017 TNETV107X_ASR_RNW, 1018 TNETV107X_GPIO29_0, 1019 TNETV107X_ASR_WAIT, 1020 TNETV107X_GPIO30_0, 1021 TNETV107X_ASR_WE, 1022 TNETV107X_BOOT_STRP_3, 1023 TNETV107X_ASR_WE_DQM0, 1024 TNETV107X_GPIO31, 1025 TNETV107X_LCD_PD17_0, 1026 TNETV107X_ASR_WE_DQM1, 1027 TNETV107X_ASR_BA0_0, 1028 TNETV107X_VLYNQ_CLK, 1029 TNETV107X_GPIO14, 1030 TNETV107X_LCD_PD19_0, 1031 TNETV107X_VLYNQ_RXD0, 1032 TNETV107X_GPIO15, 1033 TNETV107X_LCD_PD20_0, 1034 TNETV107X_VLYNQ_RXD1, 1035 TNETV107X_GPIO16, 1036 TNETV107X_LCD_PD21_0, 1037 TNETV107X_VLYNQ_TXD0, 1038 TNETV107X_GPIO17, 1039 TNETV107X_LCD_PD22_0, 1040 TNETV107X_VLYNQ_TXD1, 1041 TNETV107X_GPIO18, 1042 TNETV107X_LCD_PD23_0, 1043 TNETV107X_SDIO0_CLK, 1044 TNETV107X_GPIO19, 1045 TNETV107X_SDIO0_CMD, 1046 TNETV107X_GPIO20, 1047 TNETV107X_SDIO0_DATA0, 1048 TNETV107X_GPIO21, 1049 TNETV107X_SDIO0_DATA1, 1050 TNETV107X_GPIO22, 1051 TNETV107X_SDIO0_DATA2, 1052 TNETV107X_GPIO23, 1053 TNETV107X_SDIO0_DATA3, 1054 TNETV107X_GPIO24, 1055 TNETV107X_EMU0, 1056 TNETV107X_EMU1, 1057 TNETV107X_RTCK, 1058 TNETV107X_TRST_N, 1059 TNETV107X_TCK, 1060 TNETV107X_TDI, 1061 TNETV107X_TDO, 1062 TNETV107X_TMS, 1063 TNETV107X_TDM1_CLK, 1064 TNETV107X_TDM1_RX, 1065 TNETV107X_TDM1_TX, 1066 TNETV107X_TDM1_FS, 1067 TNETV107X_KEYPAD_R0, 1068 TNETV107X_KEYPAD_R1, 1069 TNETV107X_KEYPAD_R2, 1070 TNETV107X_KEYPAD_R3, 1071 TNETV107X_KEYPAD_R4, 1072 TNETV107X_KEYPAD_R5, 1073 TNETV107X_KEYPAD_R6, 1074 TNETV107X_GPIO12, 1075 TNETV107X_KEYPAD_R7, 1076 TNETV107X_GPIO10, 1077 TNETV107X_KEYPAD_C0, 1078 TNETV107X_KEYPAD_C1, 1079 TNETV107X_KEYPAD_C2, 1080 TNETV107X_KEYPAD_C3, 1081 TNETV107X_KEYPAD_C4, 1082 TNETV107X_KEYPAD_C5, 1083 TNETV107X_KEYPAD_C6, 1084 TNETV107X_GPIO13, 1085 TNETV107X_TEST_CLK_IN, 1086 TNETV107X_KEYPAD_C7, 1087 TNETV107X_GPIO11, 1088 TNETV107X_SSP0_0, 1089 TNETV107X_SCC_DCLK, 1090 TNETV107X_LCD_PD20_1, 1091 TNETV107X_SSP0_1, 1092 TNETV107X_SCC_CS_N, 1093 TNETV107X_LCD_PD21_1, 1094 TNETV107X_SSP0_2, 1095 TNETV107X_SCC_D, 1096 TNETV107X_LCD_PD22_1, 1097 TNETV107X_SSP0_3, 1098 TNETV107X_SCC_RESETN, 1099 TNETV107X_LCD_PD23_1, 1100 TNETV107X_SSP1_0, 1101 TNETV107X_GPIO25, 1102 TNETV107X_UART2_CTS, 1103 TNETV107X_SSP1_1, 1104 TNETV107X_GPIO26, 1105 TNETV107X_UART2_RD, 1106 TNETV107X_SSP1_2, 1107 TNETV107X_GPIO27, 1108 TNETV107X_UART2_RTS, 1109 TNETV107X_SSP1_3, 1110 TNETV107X_GPIO28, 1111 TNETV107X_UART2_TD, 1112 TNETV107X_UART0_CTS, 1113 TNETV107X_UART0_RD, 1114 TNETV107X_UART0_RTS, 1115 TNETV107X_UART0_TD, 1116 TNETV107X_UART1_RD, 1117 TNETV107X_UART1_TD, 1118 TNETV107X_LCD_AC_NCS, 1119 TNETV107X_LCD_HSYNC_RNW, 1120 TNETV107X_LCD_VSYNC_A0, 1121 TNETV107X_LCD_MCLK, 1122 TNETV107X_LCD_PD16_0, 1123 TNETV107X_LCD_PCLK_E, 1124 TNETV107X_LCD_PD00, 1125 TNETV107X_LCD_PD01, 1126 TNETV107X_LCD_PD02, 1127 TNETV107X_LCD_PD03, 1128 TNETV107X_LCD_PD04, 1129 TNETV107X_LCD_PD05, 1130 TNETV107X_LCD_PD06, 1131 TNETV107X_LCD_PD07, 1132 TNETV107X_LCD_PD08, 1133 TNETV107X_GPIO59_1, 1134 TNETV107X_LCD_PD09, 1135 TNETV107X_GPIO60_1, 1136 TNETV107X_LCD_PD10, 1137 TNETV107X_ASR_BA0_1, 1138 TNETV107X_GPIO61_1, 1139 TNETV107X_LCD_PD11, 1140 TNETV107X_GPIO62_1, 1141 TNETV107X_LCD_PD12, 1142 TNETV107X_GPIO63_1, 1143 TNETV107X_LCD_PD13, 1144 TNETV107X_GPIO64_1, 1145 TNETV107X_LCD_PD14, 1146 TNETV107X_GPIO29_1, 1147 TNETV107X_LCD_PD15, 1148 TNETV107X_GPIO30_1, 1149 TNETV107X_EINT0, 1150 TNETV107X_GPIO08, 1151 TNETV107X_EINT1, 1152 TNETV107X_GPIO09, 1153 TNETV107X_GPIO00, 1154 TNETV107X_LCD_PD20_2, 1155 TNETV107X_TDM_CLK_IN_2, 1156 TNETV107X_GPIO01, 1157 TNETV107X_LCD_PD21_2, 1158 TNETV107X_24M_CLK_OUT_1, 1159 TNETV107X_GPIO02, 1160 TNETV107X_LCD_PD22_2, 1161 TNETV107X_GPIO03, 1162 TNETV107X_LCD_PD23_2, 1163 TNETV107X_GPIO04, 1164 TNETV107X_LCD_PD16_1, 1165 TNETV107X_USB0_RXERR, 1166 TNETV107X_GPIO05, 1167 TNETV107X_LCD_PD17_1, 1168 TNETV107X_TDM_CLK_IN_1, 1169 TNETV107X_GPIO06, 1170 TNETV107X_LCD_PD18, 1171 TNETV107X_24M_CLK_OUT_2, 1172 TNETV107X_GPIO07, 1173 TNETV107X_LCD_PD19_1, 1174 TNETV107X_USB1_RXERR, 1175 TNETV107X_ETH_PLL_CLK, 1176 TNETV107X_MDIO, 1177 TNETV107X_MDC, 1178 TNETV107X_AIC_MUTE_STAT_N, 1179 TNETV107X_TDM0_CLK, 1180 TNETV107X_AIC_HNS_EN_N, 1181 TNETV107X_TDM0_FS, 1182 TNETV107X_AIC_HDS_EN_STAT_N, 1183 TNETV107X_TDM0_TX, 1184 TNETV107X_AIC_HNF_EN_STAT_N, 1185 TNETV107X_TDM0_RX, 1186}; 1187 1188#define PINMUX(x) (4 * (x)) 1189 1190#ifdef CONFIG_DAVINCI_MUX 1191/* setup pin muxing */ 1192extern int davinci_cfg_reg(unsigned long reg_cfg); 1193extern int davinci_cfg_reg_list(const short pins[]); 1194#else 1195/* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */ 1196static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; } 1197static inline int davinci_cfg_reg_list(const short pins[]) 1198{ 1199 return 0; 1200} 1201#endif 1202 1203#endif /* __INC_MACH_MUX_H */ 1204