1/* 2 * linux/arch/arm/kernel/smp_scu.c 3 * 4 * Copyright (C) 2002 ARM Ltd. 5 * All Rights Reserved 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11#include <linux/init.h> 12#include <linux/io.h> 13 14#include <asm/smp_scu.h> 15#include <asm/cacheflush.h> 16 17#define SCU_CTRL 0x00 18#define SCU_CONFIG 0x04 19#define SCU_CPU_STATUS 0x08 20#define SCU_INVALIDATE 0x0c 21#define SCU_FPGA_REVISION 0x10 22#define SCU_FILTER_START 0x40 23#define SCU_FILTER_END 0x44 24 25/* 26 * Get the number of CPU cores from the SCU configuration 27 */ 28unsigned int __init scu_get_core_count(void __iomem *scu_base) 29{ 30 unsigned int ncores = __raw_readl(scu_base + SCU_CONFIG); 31 return (ncores & 0x03) + 1; 32} 33 34/* 35 * Enable the SCU 36 */ 37void __init scu_enable(void __iomem *scu_base) 38{ 39 u32 scu_ctrl; 40 41 scu_ctrl = __raw_readl(scu_base + SCU_CTRL); 42 43 if (ACP_WAR_ENAB() || arch_is_coherent()) { 44 u32 scu_val; 45 46 scu_val = PHYS_OFFSET; 47 __raw_writel(scu_val, scu_base + SCU_FILTER_START); 48 scu_val = PHYS_OFFSET + SZ_1G; 49 __raw_writel(scu_val, scu_base + SCU_FILTER_END); 50 /* address filter enable */ 51 scu_ctrl |= (1 << 1); 52 __raw_writel(scu_ctrl, scu_base + SCU_CTRL); 53 } 54 55 /* already enabled? */ 56 if (scu_ctrl & 1) 57 return; 58 59 scu_ctrl |= 1; 60 __raw_writel(scu_ctrl, scu_base + SCU_CTRL); 61 62 /* 63 * Ensure that the data accessed by CPU0 before the SCU was 64 * initialised is visible to the other CPUs. 65 */ 66 flush_cache_all(); 67} 68