1/* 2 * arch/arm/include/asm/mmu_context.h 3 * 4 * Copyright (C) 1996 Russell King. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Changelog: 11 * 27-06-1996 RMK Created 12 */ 13#ifndef __ASM_ARM_MMU_CONTEXT_H 14#define __ASM_ARM_MMU_CONTEXT_H 15 16#include <linux/compiler.h> 17#include <linux/sched.h> 18#include <asm/cacheflush.h> 19#include <asm/cachetype.h> 20#include <asm/proc-fns.h> 21#include <asm-generic/mm_hooks.h> 22 23void __check_kvm_seq(struct mm_struct *mm); 24 25#ifdef CONFIG_CPU_HAS_ASID 26 27/* 28 * On ARMv6, we have the following structure in the Context ID: 29 * 30 * 31 7 0 31 * +-------------------------+-----------+ 32 * | process ID | ASID | 33 * +-------------------------+-----------+ 34 * | context ID | 35 * +-------------------------------------+ 36 * 37 * The ASID is used to tag entries in the CPU caches and TLBs. 38 * The context ID is used by debuggers and trace logic, and 39 * should be unique within all running processes. 40 */ 41#define ASID_BITS 8 42#define ASID_MASK ((~0) << ASID_BITS) 43#define ASID_FIRST_VERSION (1 << ASID_BITS) 44 45extern unsigned int cpu_last_asid; 46#ifdef CONFIG_SMP 47DECLARE_PER_CPU(struct mm_struct *, current_mm); 48#endif 49 50void __init_new_context(struct task_struct *tsk, struct mm_struct *mm); 51void __new_context(struct mm_struct *mm); 52 53static inline void check_context(struct mm_struct *mm) 54{ 55 /* 56 * This code is executed with interrupts enabled. Therefore, 57 * mm->context.id cannot be updated to the latest ASID version 58 * on a different CPU (and condition below not triggered) 59 * without first getting an IPI to reset the context. The 60 * alternative is to take a read_lock on mm->context.id_lock 61 * (after changing its type to rwlock_t). 62 */ 63 if (unlikely((mm->context.id ^ cpu_last_asid) >> ASID_BITS)) 64 __new_context(mm); 65 66 if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq)) 67 __check_kvm_seq(mm); 68} 69 70#define init_new_context(tsk,mm) (__init_new_context(tsk,mm),0) 71 72#else 73 74static inline void check_context(struct mm_struct *mm) 75{ 76#ifdef CONFIG_MMU 77 if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq)) 78 __check_kvm_seq(mm); 79#endif 80} 81 82#define init_new_context(tsk,mm) 0 83 84#endif 85 86#define destroy_context(mm) do { } while(0) 87 88/* 89 * This is called when "tsk" is about to enter lazy TLB mode. 90 * 91 * mm: describes the currently active mm context 92 * tsk: task which is entering lazy tlb 93 * cpu: cpu number which is entering lazy tlb 94 * 95 * tsk->mm will be NULL 96 */ 97static inline void 98enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) 99{ 100} 101 102/* 103 * This is the actual mm switch as far as the scheduler 104 * is concerned. No registers are touched. We avoid 105 * calling the CPU specific function when the mm hasn't 106 * actually changed. 107 */ 108static inline void 109switch_mm(struct mm_struct *prev, struct mm_struct *next, 110 struct task_struct *tsk) 111{ 112#ifdef CONFIG_MMU 113 unsigned int cpu = smp_processor_id(); 114 115#ifdef CONFIG_SMP 116 /* check for possible thread migration */ 117 if (!cpumask_empty(mm_cpumask(next)) && 118 !cpumask_test_cpu(cpu, mm_cpumask(next))) 119 __flush_icache_all(); 120#endif 121 if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next) { 122#ifdef CONFIG_SMP 123 struct mm_struct **crt_mm = &per_cpu(current_mm, cpu); 124 *crt_mm = next; 125#endif 126 check_context(next); 127 cpu_switch_mm(next->pgd, next); 128 if (cache_is_vivt()) 129 cpumask_clear_cpu(cpu, mm_cpumask(prev)); 130 } 131#endif 132} 133 134#define deactivate_mm(tsk,mm) do { } while (0) 135#define activate_mm(prev,next) switch_mm(prev, next, NULL) 136 137#endif 138