1#ifndef __ASM_ARM_CPUTYPE_H 2#define __ASM_ARM_CPUTYPE_H 3 4#include <linux/stringify.h> 5 6#define CPUID_ID 0 7#define CPUID_CACHETYPE 1 8#define CPUID_TCM 2 9#define CPUID_TLBTYPE 3 10 11#define CPUID_EXT_PFR0 "c1, 0" 12#define CPUID_EXT_PFR1 "c1, 1" 13#define CPUID_EXT_DFR0 "c1, 2" 14#define CPUID_EXT_AFR0 "c1, 3" 15#define CPUID_EXT_MMFR0 "c1, 4" 16#define CPUID_EXT_MMFR1 "c1, 5" 17#define CPUID_EXT_MMFR2 "c1, 6" 18#define CPUID_EXT_MMFR3 "c1, 7" 19#define CPUID_EXT_ISAR0 "c2, 0" 20#define CPUID_EXT_ISAR1 "c2, 1" 21#define CPUID_EXT_ISAR2 "c2, 2" 22#define CPUID_EXT_ISAR3 "c2, 3" 23#define CPUID_EXT_ISAR4 "c2, 4" 24#define CPUID_EXT_ISAR5 "c2, 5" 25 26#ifdef CONFIG_CPU_CP15 27#define read_cpuid(reg) \ 28 ({ \ 29 unsigned int __val; \ 30 asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \ 31 : "=r" (__val) \ 32 : \ 33 : "cc"); \ 34 __val; \ 35 }) 36#define read_cpuid_ext(ext_reg) \ 37 ({ \ 38 unsigned int __val; \ 39 asm("mrc p15, 0, %0, c0, " ext_reg \ 40 : "=r" (__val) \ 41 : \ 42 : "cc"); \ 43 __val; \ 44 }) 45#else 46extern unsigned int processor_id; 47#define read_cpuid(reg) (processor_id) 48#define read_cpuid_ext(reg) 0 49#endif 50 51/* 52 * The CPU ID never changes at run time, so we might as well tell the 53 * compiler that it's constant. Use this function to read the CPU ID 54 * rather than directly reading processor_id or read_cpuid() directly. 55 */ 56static inline unsigned int __attribute_const__ read_cpuid_id(void) 57{ 58 return read_cpuid(CPUID_ID); 59} 60 61static inline unsigned int __attribute_const__ read_cpuid_cachetype(void) 62{ 63 return read_cpuid(CPUID_CACHETYPE); 64} 65 66static inline unsigned int __attribute_const__ read_cpuid_tcmstatus(void) 67{ 68 return read_cpuid(CPUID_TCM); 69} 70 71/* 72 * Intel's XScale3 core supports some v6 features (supersections, L2) 73 * but advertises itself as v5 as it does not support the v6 ISA. For 74 * this reason, we need a way to explicitly test for this type of CPU. 75 */ 76#ifndef CONFIG_CPU_XSC3 77#define cpu_is_xsc3() 0 78#else 79static inline int cpu_is_xsc3(void) 80{ 81 unsigned int id; 82 id = read_cpuid_id() & 0xffffe000; 83 /* It covers both Intel ID and Marvell ID */ 84 if ((id == 0x69056000) || (id == 0x56056000)) 85 return 1; 86 87 return 0; 88} 89#endif 90 91#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3) 92#define cpu_is_xscale() 0 93#else 94#define cpu_is_xscale() 1 95#endif 96 97#endif 98