1General Description 2=================== 3 4This driver supports the 53c700 and 53c700-66 chips. It also supports 5the 53c710 but only in 53c700 emulation mode. It is full featured and 6does sync (-66 and 710 only), disconnects and tag command queueing. 7 8Since the 53c700 must be interfaced to a bus, you need to wrapper the 9card detector around this driver. For an example, see the 10NCR_D700.[ch] or lasi700.[ch] files. 11 12The comments in the 53c700.[ch] files tell you which parts you need to 13fill in to get the driver working. 14 15 16Compile Time Flags 17================== 18 19The driver may be either io mapped or memory mapped. This is 20selectable by configuration flags: 21 22CONFIG_53C700_MEM_MAPPED 23 24define if the driver is memory mapped. 25 26CONFIG_53C700_IO_MAPPED 27 28define if the driver is to be io mapped. 29 30One or other of the above flags *must* be defined. 31 32Other flags are: 33 34CONFIG_53C700_LE_ON_BE 35 36define if the chipset must be supported in little endian mode on a big 37endian architecture (used for the 700 on parisc). 38 39CONFIG_53C700_USE_CONSISTENT 40 41allocate consistent memory (should only be used if your architecture 42has a mixture of consistent and inconsistent memory). Fully 43consistent or fully inconsistent architectures should not define this. 44 45 46Using the Chip Core Driver 47========================== 48 49In order to plumb the 53c700 chip core driver into a working SCSI 50driver, you need to know three things about the way the chip is wired 51into your system (or expansion card). 52 531. The clock speed of the SCSI core 542. The interrupt line used 553. The memory (or io space) location of the 53c700 registers. 56 57Optionally, you may also need to know other things, like how to read 58the SCSI Id from the card bios or whether the chip is wired for 59differential operation. 60 61Usually you can find items 2. and 3. from general spec. documents or 62even by examining the configuration of a working driver under another 63operating system. 64 65The clock speed is usually buried deep in the technical literature. 66It is required because it is used to set up both the synchronous and 67asynchronous dividers for the chip. As a general rule of thumb, 68manufacturers set the clock speed at the lowest possible setting 69consistent with the best operation of the chip (although some choose 70to drive it off the CPU or bus clock rather than going to the expense 71of an extra clock chip). The best operation clock speeds are: 72 7353c700 - 25MHz 7453c700-66 - 50MHz 7553c710 - 40Mhz 76 77Writing Your Glue Driver 78======================== 79 80This will be a standard SCSI driver (I don't know of a good document 81describing this, just copy from some other driver) with at least a 82detect and release entry. 83 84In the detect routine, you need to allocate a struct 85NCR_700_Host_Parameters sized memory area and clear it (so that the 86default values for everything are 0). Then you must fill in the 87parameters that matter to you (see below), plumb the NCR_700_intr 88routine into the interrupt line and call NCR_700_detect with the host 89template and the new parameters as arguments. You should also call 90the relevant request_*_region function and place the register base 91address into the `base' pointer of the host parameters. 92 93In the release routine, you must free the NCR_700_Host_Parameters that 94you allocated, call the corresponding release_*_region and free the 95interrupt. 96 97Handling Interrupts 98------------------- 99 100In general, you should just plumb the card's interrupt line in with 101 102request_irq(irq, NCR_700_intr, <irq flags>, <driver name>, host); 103 104where host is the return from the relevant NCR_700_detect() routine. 105 106You may also write your own interrupt handling routine which calls 107NCR_700_intr() directly. However, you should only really do this if 108you have a card with more than one chip on it and you can read a 109register to tell which set of chips wants the interrupt. 110 111Settable NCR_700_Host_Parameters 112-------------------------------- 113 114The following are a list of the user settable parameters: 115 116clock: (MANDATORY) 117 118Set to the clock speed of the chip in MHz. 119 120base: (MANDATORY) 121 122set to the base of the io or mem region for the register set. On 64 123bit architectures this is only 32 bits wide, so the registers must be 124mapped into the low 32 bits of memory. 125 126pci_dev: (OPTIONAL) 127 128set to the PCI board device. Leave NULL for a non-pci board. This is 129used for the pci_alloc_consistent() and pci_map_*() functions. 130 131dmode_extra: (OPTIONAL, 53c710 only) 132 133extra flags for the DMODE register. These are used to control bus 134output pins on the 710. The settings should be a combination of 135DMODE_FC1 and DMODE_FC2. What these pins actually do is entirely up 136to the board designer. Usually it is safe to ignore this setting. 137 138differential: (OPTIONAL) 139 140set to 1 if the chip drives a differential bus. 141 142force_le_on_be: (OPTIONAL, only if CONFIG_53C700_LE_ON_BE is set) 143 144set to 1 if the chip is operating in little endian mode on a big 145endian architecture. 146 147chip710: (OPTIONAL) 148 149set to 1 if the chip is a 53c710. 150 151burst_disable: (OPTIONAL, 53c710 only) 152 153disable 8 byte bursting for DMA transfers. 154 155