1<?xml version="1.0" encoding="UTF-8"?> 2<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN" 3 "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []> 4 5<book id="MTD-NAND-Guide"> 6 <bookinfo> 7 <title>MTD NAND Driver Programming Interface</title> 8 9 <authorgroup> 10 <author> 11 <firstname>Thomas</firstname> 12 <surname>Gleixner</surname> 13 <affiliation> 14 <address> 15 <email>tglx@linutronix.de</email> 16 </address> 17 </affiliation> 18 </author> 19 </authorgroup> 20 21 <copyright> 22 <year>2004</year> 23 <holder>Thomas Gleixner</holder> 24 </copyright> 25 26 <legalnotice> 27 <para> 28 This documentation is free software; you can redistribute 29 it and/or modify it under the terms of the GNU General Public 30 License version 2 as published by the Free Software Foundation. 31 </para> 32 33 <para> 34 This program is distributed in the hope that it will be 35 useful, but WITHOUT ANY WARRANTY; without even the implied 36 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 37 See the GNU General Public License for more details. 38 </para> 39 40 <para> 41 You should have received a copy of the GNU General Public 42 License along with this program; if not, write to the Free 43 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, 44 MA 02111-1307 USA 45 </para> 46 47 <para> 48 For more details see the file COPYING in the source 49 distribution of Linux. 50 </para> 51 </legalnotice> 52 </bookinfo> 53 54<toc></toc> 55 56 <chapter id="intro"> 57 <title>Introduction</title> 58 <para> 59 The generic NAND driver supports almost all NAND and AG-AND based 60 chips and connects them to the Memory Technology Devices (MTD) 61 subsystem of the Linux Kernel. 62 </para> 63 <para> 64 This documentation is provided for developers who want to implement 65 board drivers or filesystem drivers suitable for NAND devices. 66 </para> 67 </chapter> 68 69 <chapter id="bugs"> 70 <title>Known Bugs And Assumptions</title> 71 <para> 72 None. 73 </para> 74 </chapter> 75 76 <chapter id="dochints"> 77 <title>Documentation hints</title> 78 <para> 79 The function and structure docs are autogenerated. Each function and 80 struct member has a short description which is marked with an [XXX] identifier. 81 The following chapters explain the meaning of those identifiers. 82 </para> 83 <sect1 id="Function_identifiers_XXX"> 84 <title>Function identifiers [XXX]</title> 85 <para> 86 The functions are marked with [XXX] identifiers in the short 87 comment. The identifiers explain the usage and scope of the 88 functions. Following identifiers are used: 89 </para> 90 <itemizedlist> 91 <listitem><para> 92 [MTD Interface]</para><para> 93 These functions provide the interface to the MTD kernel API. 94 They are not replacable and provide functionality 95 which is complete hardware independent. 96 </para></listitem> 97 <listitem><para> 98 [NAND Interface]</para><para> 99 These functions are exported and provide the interface to the NAND kernel API. 100 </para></listitem> 101 <listitem><para> 102 [GENERIC]</para><para> 103 Generic functions are not replacable and provide functionality 104 which is complete hardware independent. 105 </para></listitem> 106 <listitem><para> 107 [DEFAULT]</para><para> 108 Default functions provide hardware related functionality which is suitable 109 for most of the implementations. These functions can be replaced by the 110 board driver if neccecary. Those functions are called via pointers in the 111 NAND chip description structure. The board driver can set the functions which 112 should be replaced by board dependent functions before calling nand_scan(). 113 If the function pointer is NULL on entry to nand_scan() then the pointer 114 is set to the default function which is suitable for the detected chip type. 115 </para></listitem> 116 </itemizedlist> 117 </sect1> 118 <sect1 id="Struct_member_identifiers_XXX"> 119 <title>Struct member identifiers [XXX]</title> 120 <para> 121 The struct members are marked with [XXX] identifiers in the 122 comment. The identifiers explain the usage and scope of the 123 members. Following identifiers are used: 124 </para> 125 <itemizedlist> 126 <listitem><para> 127 [INTERN]</para><para> 128 These members are for NAND driver internal use only and must not be 129 modified. Most of these values are calculated from the chip geometry 130 information which is evaluated during nand_scan(). 131 </para></listitem> 132 <listitem><para> 133 [REPLACEABLE]</para><para> 134 Replaceable members hold hardware related functions which can be 135 provided by the board driver. The board driver can set the functions which 136 should be replaced by board dependent functions before calling nand_scan(). 137 If the function pointer is NULL on entry to nand_scan() then the pointer 138 is set to the default function which is suitable for the detected chip type. 139 </para></listitem> 140 <listitem><para> 141 [BOARDSPECIFIC]</para><para> 142 Board specific members hold hardware related information which must 143 be provided by the board driver. The board driver must set the function 144 pointers and datafields before calling nand_scan(). 145 </para></listitem> 146 <listitem><para> 147 [OPTIONAL]</para><para> 148 Optional members can hold information relevant for the board driver. The 149 generic NAND driver code does not use this information. 150 </para></listitem> 151 </itemizedlist> 152 </sect1> 153 </chapter> 154 155 <chapter id="basicboarddriver"> 156 <title>Basic board driver</title> 157 <para> 158 For most boards it will be sufficient to provide just the 159 basic functions and fill out some really board dependent 160 members in the nand chip description structure. 161 </para> 162 <sect1 id="Basic_defines"> 163 <title>Basic defines</title> 164 <para> 165 At least you have to provide a mtd structure and 166 a storage for the ioremap'ed chip address. 167 You can allocate the mtd structure using kmalloc 168 or you can allocate it statically. 169 In case of static allocation you have to allocate 170 a nand_chip structure too. 171 </para> 172 <para> 173 Kmalloc based example 174 </para> 175 <programlisting> 176static struct mtd_info *board_mtd; 177static void __iomem *baseaddr; 178 </programlisting> 179 <para> 180 Static example 181 </para> 182 <programlisting> 183static struct mtd_info board_mtd; 184static struct nand_chip board_chip; 185static void __iomem *baseaddr; 186 </programlisting> 187 </sect1> 188 <sect1 id="Partition_defines"> 189 <title>Partition defines</title> 190 <para> 191 If you want to divide your device into partitions, then 192 enable the configuration switch CONFIG_MTD_PARTITIONS and define 193 a partitioning scheme suitable to your board. 194 </para> 195 <programlisting> 196#define NUM_PARTITIONS 2 197static struct mtd_partition partition_info[] = { 198 { .name = "Flash partition 1", 199 .offset = 0, 200 .size = 8 * 1024 * 1024 }, 201 { .name = "Flash partition 2", 202 .offset = MTDPART_OFS_NEXT, 203 .size = MTDPART_SIZ_FULL }, 204}; 205 </programlisting> 206 </sect1> 207 <sect1 id="Hardware_control_functions"> 208 <title>Hardware control function</title> 209 <para> 210 The hardware control function provides access to the 211 control pins of the NAND chip(s). 212 The access can be done by GPIO pins or by address lines. 213 If you use address lines, make sure that the timing 214 requirements are met. 215 </para> 216 <para> 217 <emphasis>GPIO based example</emphasis> 218 </para> 219 <programlisting> 220static void board_hwcontrol(struct mtd_info *mtd, int cmd) 221{ 222 switch(cmd){ 223 case NAND_CTL_SETCLE: /* Set CLE pin high */ break; 224 case NAND_CTL_CLRCLE: /* Set CLE pin low */ break; 225 case NAND_CTL_SETALE: /* Set ALE pin high */ break; 226 case NAND_CTL_CLRALE: /* Set ALE pin low */ break; 227 case NAND_CTL_SETNCE: /* Set nCE pin low */ break; 228 case NAND_CTL_CLRNCE: /* Set nCE pin high */ break; 229 } 230} 231 </programlisting> 232 <para> 233 <emphasis>Address lines based example.</emphasis> It's assumed that the 234 nCE pin is driven by a chip select decoder. 235 </para> 236 <programlisting> 237static void board_hwcontrol(struct mtd_info *mtd, int cmd) 238{ 239 struct nand_chip *this = (struct nand_chip *) mtd->priv; 240 switch(cmd){ 241 case NAND_CTL_SETCLE: this->IO_ADDR_W |= CLE_ADRR_BIT; break; 242 case NAND_CTL_CLRCLE: this->IO_ADDR_W &= ~CLE_ADRR_BIT; break; 243 case NAND_CTL_SETALE: this->IO_ADDR_W |= ALE_ADRR_BIT; break; 244 case NAND_CTL_CLRALE: this->IO_ADDR_W &= ~ALE_ADRR_BIT; break; 245 } 246} 247 </programlisting> 248 </sect1> 249 <sect1 id="Device_ready_function"> 250 <title>Device ready function</title> 251 <para> 252 If the hardware interface has the ready busy pin of the NAND chip connected to a 253 GPIO or other accesible I/O pin, this function is used to read back the state of the 254 pin. The function has no arguments and should return 0, if the device is busy (R/B pin 255 is low) and 1, if the device is ready (R/B pin is high). 256 If the hardware interface does not give access to the ready busy pin, then 257 the function must not be defined and the function pointer this->dev_ready is set to NULL. 258 </para> 259 </sect1> 260 <sect1 id="Init_function"> 261 <title>Init function</title> 262 <para> 263 The init function allocates memory and sets up all the board 264 specific parameters and function pointers. When everything 265 is set up nand_scan() is called. This function tries to 266 detect and identify then chip. If a chip is found all the 267 internal data fields are initialized accordingly. 268 The structure(s) have to be zeroed out first and then filled with the neccecary 269 information about the device. 270 </para> 271 <programlisting> 272static int __init board_init (void) 273{ 274 struct nand_chip *this; 275 int err = 0; 276 277 /* Allocate memory for MTD device structure and private data */ 278 board_mtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); 279 if (!board_mtd) { 280 printk ("Unable to allocate NAND MTD device structure.\n"); 281 err = -ENOMEM; 282 goto out; 283 } 284 285 /* map physical address */ 286 baseaddr = ioremap(CHIP_PHYSICAL_ADDRESS, 1024); 287 if (!baseaddr) { 288 printk("Ioremap to access NAND chip failed\n"); 289 err = -EIO; 290 goto out_mtd; 291 } 292 293 /* Get pointer to private data */ 294 this = (struct nand_chip *) (); 295 /* Link the private data with the MTD structure */ 296 board_mtd->priv = this; 297 298 /* Set address of NAND IO lines */ 299 this->IO_ADDR_R = baseaddr; 300 this->IO_ADDR_W = baseaddr; 301 /* Reference hardware control function */ 302 this->hwcontrol = board_hwcontrol; 303 /* Set command delay time, see datasheet for correct value */ 304 this->chip_delay = CHIP_DEPENDEND_COMMAND_DELAY; 305 /* Assign the device ready function, if available */ 306 this->dev_ready = board_dev_ready; 307 this->eccmode = NAND_ECC_SOFT; 308 309 /* Scan to find existence of the device */ 310 if (nand_scan (board_mtd, 1)) { 311 err = -ENXIO; 312 goto out_ior; 313 } 314 315 add_mtd_partitions(board_mtd, partition_info, NUM_PARTITIONS); 316 goto out; 317 318out_ior: 319 iounmap(baseaddr); 320out_mtd: 321 kfree (board_mtd); 322out: 323 return err; 324} 325module_init(board_init); 326 </programlisting> 327 </sect1> 328 <sect1 id="Exit_function"> 329 <title>Exit function</title> 330 <para> 331 The exit function is only neccecary if the driver is 332 compiled as a module. It releases all resources which 333 are held by the chip driver and unregisters the partitions 334 in the MTD layer. 335 </para> 336 <programlisting> 337#ifdef MODULE 338static void __exit board_cleanup (void) 339{ 340 /* Release resources, unregister device */ 341 nand_release (board_mtd); 342 343 /* unmap physical address */ 344 iounmap(baseaddr); 345 346 /* Free the MTD device structure */ 347 kfree (board_mtd); 348} 349module_exit(board_cleanup); 350#endif 351 </programlisting> 352 </sect1> 353 </chapter> 354 355 <chapter id="boarddriversadvanced"> 356 <title>Advanced board driver functions</title> 357 <para> 358 This chapter describes the advanced functionality of the NAND 359 driver. For a list of functions which can be overridden by the board 360 driver see the documentation of the nand_chip structure. 361 </para> 362 <sect1 id="Multiple_chip_control"> 363 <title>Multiple chip control</title> 364 <para> 365 The nand driver can control chip arrays. Therefore the 366 board driver must provide an own select_chip function. This 367 function must (de)select the requested chip. 368 The function pointer in the nand_chip structure must 369 be set before calling nand_scan(). The maxchip parameter 370 of nand_scan() defines the maximum number of chips to 371 scan for. Make sure that the select_chip function can 372 handle the requested number of chips. 373 </para> 374 <para> 375 The nand driver concatenates the chips to one virtual 376 chip and provides this virtual chip to the MTD layer. 377 </para> 378 <para> 379 <emphasis>Note: The driver can only handle linear chip arrays 380 of equally sized chips. There is no support for 381 parallel arrays which extend the buswidth.</emphasis> 382 </para> 383 <para> 384 <emphasis>GPIO based example</emphasis> 385 </para> 386 <programlisting> 387static void board_select_chip (struct mtd_info *mtd, int chip) 388{ 389 /* Deselect all chips, set all nCE pins high */ 390 GPIO(BOARD_NAND_NCE) |= 0xff; 391 if (chip >= 0) 392 GPIO(BOARD_NAND_NCE) &= ~ (1 << chip); 393} 394 </programlisting> 395 <para> 396 <emphasis>Address lines based example.</emphasis> 397 Its assumed that the nCE pins are connected to an 398 address decoder. 399 </para> 400 <programlisting> 401static void board_select_chip (struct mtd_info *mtd, int chip) 402{ 403 struct nand_chip *this = (struct nand_chip *) mtd->priv; 404 405 /* Deselect all chips */ 406 this->IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK; 407 this->IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK; 408 switch (chip) { 409 case 0: 410 this->IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0; 411 this->IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0; 412 break; 413 .... 414 case n: 415 this->IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn; 416 this->IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn; 417 break; 418 } 419} 420 </programlisting> 421 </sect1> 422 <sect1 id="Hardware_ECC_support"> 423 <title>Hardware ECC support</title> 424 <sect2 id="Functions_and_constants"> 425 <title>Functions and constants</title> 426 <para> 427 The nand driver supports three different types of 428 hardware ECC. 429 <itemizedlist> 430 <listitem><para>NAND_ECC_HW3_256</para><para> 431 Hardware ECC generator providing 3 bytes ECC per 432 256 byte. 433 </para> </listitem> 434 <listitem><para>NAND_ECC_HW3_512</para><para> 435 Hardware ECC generator providing 3 bytes ECC per 436 512 byte. 437 </para> </listitem> 438 <listitem><para>NAND_ECC_HW6_512</para><para> 439 Hardware ECC generator providing 6 bytes ECC per 440 512 byte. 441 </para> </listitem> 442 <listitem><para>NAND_ECC_HW8_512</para><para> 443 Hardware ECC generator providing 6 bytes ECC per 444 512 byte. 445 </para> </listitem> 446 </itemizedlist> 447 If your hardware generator has a different functionality 448 add it at the appropriate place in nand_base.c 449 </para> 450 <para> 451 The board driver must provide following functions: 452 <itemizedlist> 453 <listitem><para>enable_hwecc</para><para> 454 This function is called before reading / writing to 455 the chip. Reset or initialize the hardware generator 456 in this function. The function is called with an 457 argument which let you distinguish between read 458 and write operations. 459 </para> </listitem> 460 <listitem><para>calculate_ecc</para><para> 461 This function is called after read / write from / to 462 the chip. Transfer the ECC from the hardware to 463 the buffer. If the option NAND_HWECC_SYNDROME is set 464 then the function is only called on write. See below. 465 </para> </listitem> 466 <listitem><para>correct_data</para><para> 467 In case of an ECC error this function is called for 468 error detection and correction. Return 1 respectively 2 469 in case the error can be corrected. If the error is 470 not correctable return -1. If your hardware generator 471 matches the default algorithm of the nand_ecc software 472 generator then use the correction function provided 473 by nand_ecc instead of implementing duplicated code. 474 </para> </listitem> 475 </itemizedlist> 476 </para> 477 </sect2> 478 <sect2 id="Hardware_ECC_with_syndrome_calculation"> 479 <title>Hardware ECC with syndrome calculation</title> 480 <para> 481 Many hardware ECC implementations provide Reed-Solomon 482 codes and calculate an error syndrome on read. The syndrome 483 must be converted to a standard Reed-Solomon syndrome 484 before calling the error correction code in the generic 485 Reed-Solomon library. 486 </para> 487 <para> 488 The ECC bytes must be placed immidiately after the data 489 bytes in order to make the syndrome generator work. This 490 is contrary to the usual layout used by software ECC. The 491 separation of data and out of band area is not longer 492 possible. The nand driver code handles this layout and 493 the remaining free bytes in the oob area are managed by 494 the autoplacement code. Provide a matching oob-layout 495 in this case. See rts_from4.c and diskonchip.c for 496 implementation reference. In those cases we must also 497 use bad block tables on FLASH, because the ECC layout is 498 interferring with the bad block marker positions. 499 See bad block table support for details. 500 </para> 501 </sect2> 502 </sect1> 503 <sect1 id="Bad_Block_table_support"> 504 <title>Bad block table support</title> 505 <para> 506 Most NAND chips mark the bad blocks at a defined 507 position in the spare area. Those blocks must 508 not be erased under any circumstances as the bad 509 block information would be lost. 510 It is possible to check the bad block mark each 511 time when the blocks are accessed by reading the 512 spare area of the first page in the block. This 513 is time consuming so a bad block table is used. 514 </para> 515 <para> 516 The nand driver supports various types of bad block 517 tables. 518 <itemizedlist> 519 <listitem><para>Per device</para><para> 520 The bad block table contains all bad block information 521 of the device which can consist of multiple chips. 522 </para> </listitem> 523 <listitem><para>Per chip</para><para> 524 A bad block table is used per chip and contains the 525 bad block information for this particular chip. 526 </para> </listitem> 527 <listitem><para>Fixed offset</para><para> 528 The bad block table is located at a fixed offset 529 in the chip (device). This applies to various 530 DiskOnChip devices. 531 </para> </listitem> 532 <listitem><para>Automatic placed</para><para> 533 The bad block table is automatically placed and 534 detected either at the end or at the beginning 535 of a chip (device) 536 </para> </listitem> 537 <listitem><para>Mirrored tables</para><para> 538 The bad block table is mirrored on the chip (device) to 539 allow updates of the bad block table without data loss. 540 </para> </listitem> 541 </itemizedlist> 542 </para> 543 <para> 544 nand_scan() calls the function nand_default_bbt(). 545 nand_default_bbt() selects appropriate default 546 bad block table desriptors depending on the chip information 547 which was retrieved by nand_scan(). 548 </para> 549 <para> 550 The standard policy is scanning the device for bad 551 blocks and build a ram based bad block table which 552 allows faster access than always checking the 553 bad block information on the flash chip itself. 554 </para> 555 <sect2 id="Flash_based_tables"> 556 <title>Flash based tables</title> 557 <para> 558 It may be desired or neccecary to keep a bad block table in FLASH. 559 For AG-AND chips this is mandatory, as they have no factory marked 560 bad blocks. They have factory marked good blocks. The marker pattern 561 is erased when the block is erased to be reused. So in case of 562 powerloss before writing the pattern back to the chip this block 563 would be lost and added to the bad blocks. Therefore we scan the 564 chip(s) when we detect them the first time for good blocks and 565 store this information in a bad block table before erasing any 566 of the blocks. 567 </para> 568 <para> 569 The blocks in which the tables are stored are procteted against 570 accidental access by marking them bad in the memory bad block 571 table. The bad block table management functions are allowed 572 to circumvernt this protection. 573 </para> 574 <para> 575 The simplest way to activate the FLASH based bad block table support 576 is to set the option NAND_USE_FLASH_BBT in the option field of 577 the nand chip structure before calling nand_scan(). For AG-AND 578 chips is this done by default. 579 This activates the default FLASH based bad block table functionality 580 of the NAND driver. The default bad block table options are 581 <itemizedlist> 582 <listitem><para>Store bad block table per chip</para></listitem> 583 <listitem><para>Use 2 bits per block</para></listitem> 584 <listitem><para>Automatic placement at the end of the chip</para></listitem> 585 <listitem><para>Use mirrored tables with version numbers</para></listitem> 586 <listitem><para>Reserve 4 blocks at the end of the chip</para></listitem> 587 </itemizedlist> 588 </para> 589 </sect2> 590 <sect2 id="User_defined_tables"> 591 <title>User defined tables</title> 592 <para> 593 User defined tables are created by filling out a 594 nand_bbt_descr structure and storing the pointer in the 595 nand_chip structure member bbt_td before calling nand_scan(). 596 If a mirror table is neccecary a second structure must be 597 created and a pointer to this structure must be stored 598 in bbt_md inside the nand_chip structure. If the bbt_md 599 member is set to NULL then only the main table is used 600 and no scan for the mirrored table is performed. 601 </para> 602 <para> 603 The most important field in the nand_bbt_descr structure 604 is the options field. The options define most of the 605 table properties. Use the predefined constants from 606 nand.h to define the options. 607 <itemizedlist> 608 <listitem><para>Number of bits per block</para> 609 <para>The supported number of bits is 1, 2, 4, 8.</para></listitem> 610 <listitem><para>Table per chip</para> 611 <para>Setting the constant NAND_BBT_PERCHIP selects that 612 a bad block table is managed for each chip in a chip array. 613 If this option is not set then a per device bad block table 614 is used.</para></listitem> 615 <listitem><para>Table location is absolute</para> 616 <para>Use the option constant NAND_BBT_ABSPAGE and 617 define the absolute page number where the bad block 618 table starts in the field pages. If you have selected bad block 619 tables per chip and you have a multi chip array then the start page 620 must be given for each chip in the chip array. Note: there is no scan 621 for a table ident pattern performed, so the fields 622 pattern, veroffs, offs, len can be left uninitialized</para></listitem> 623 <listitem><para>Table location is automatically detected</para> 624 <para>The table can either be located in the first or the last good 625 blocks of the chip (device). Set NAND_BBT_LASTBLOCK to place 626 the bad block table at the end of the chip (device). The 627 bad block tables are marked and identified by a pattern which 628 is stored in the spare area of the first page in the block which 629 holds the bad block table. Store a pointer to the pattern 630 in the pattern field. Further the length of the pattern has to be 631 stored in len and the offset in the spare area must be given 632 in the offs member of the nand_bbt_descr stucture. For mirrored 633 bad block tables different patterns are mandatory.</para></listitem> 634 <listitem><para>Table creation</para> 635 <para>Set the option NAND_BBT_CREATE to enable the table creation 636 if no table can be found during the scan. Usually this is done only 637 once if a new chip is found. </para></listitem> 638 <listitem><para>Table write support</para> 639 <para>Set the option NAND_BBT_WRITE to enable the table write support. 640 This allows the update of the bad block table(s) in case a block has 641 to be marked bad due to wear. The MTD interface function block_markbad 642 is calling the update function of the bad block table. If the write 643 support is enabled then the table is updated on FLASH.</para> 644 <para> 645 Note: Write support should only be enabled for mirrored tables with 646 version control. 647 </para></listitem> 648 <listitem><para>Table version control</para> 649 <para>Set the option NAND_BBT_VERSION to enable the table version control. 650 It's highly recommended to enable this for mirrored tables with write 651 support. It makes sure that the risk of loosing the bad block 652 table information is reduced to the loss of the information about the 653 one worn out block which should be marked bad. The version is stored in 654 4 consecutive bytes in the spare area of the device. The position of 655 the version number is defined by the member veroffs in the bad block table 656 descriptor.</para></listitem> 657 <listitem><para>Save block contents on write</para> 658 <para> 659 In case that the block which holds the bad block table does contain 660 other useful information, set the option NAND_BBT_SAVECONTENT. When 661 the bad block table is written then the whole block is read the bad 662 block table is updated and the block is erased and everything is 663 written back. If this option is not set only the bad block table 664 is written and everything else in the block is ignored and erased. 665 </para></listitem> 666 <listitem><para>Number of reserved blocks</para> 667 <para> 668 For automatic placement some blocks must be reserved for 669 bad block table storage. The number of reserved blocks is defined 670 in the maxblocks member of the babd block table description structure. 671 Reserving 4 blocks for mirrored tables should be a reasonable number. 672 This also limits the number of blocks which are scanned for the bad 673 block table ident pattern. 674 </para></listitem> 675 </itemizedlist> 676 </para> 677 </sect2> 678 </sect1> 679 <sect1 id="Spare_area_placement"> 680 <title>Spare area (auto)placement</title> 681 <para> 682 The nand driver implements different possibilities for 683 placement of filesystem data in the spare area, 684 <itemizedlist> 685 <listitem><para>Placement defined by fs driver</para></listitem> 686 <listitem><para>Automatic placement</para></listitem> 687 </itemizedlist> 688 The default placement function is automatic placement. The 689 nand driver has built in default placement schemes for the 690 various chiptypes. If due to hardware ECC functionality the 691 default placement does not fit then the board driver can 692 provide a own placement scheme. 693 </para> 694 <para> 695 File system drivers can provide a own placement scheme which 696 is used instead of the default placement scheme. 697 </para> 698 <para> 699 Placement schemes are defined by a nand_oobinfo structure 700 <programlisting> 701struct nand_oobinfo { 702 int useecc; 703 int eccbytes; 704 int eccpos[24]; 705 int oobfree[8][2]; 706}; 707 </programlisting> 708 <itemizedlist> 709 <listitem><para>useecc</para><para> 710 The useecc member controls the ecc and placement function. The header 711 file include/mtd/mtd-abi.h contains constants to select ecc and 712 placement. MTD_NANDECC_OFF switches off the ecc complete. This is 713 not recommended and available for testing and diagnosis only. 714 MTD_NANDECC_PLACE selects caller defined placement, MTD_NANDECC_AUTOPLACE 715 selects automatic placement. 716 </para></listitem> 717 <listitem><para>eccbytes</para><para> 718 The eccbytes member defines the number of ecc bytes per page. 719 </para></listitem> 720 <listitem><para>eccpos</para><para> 721 The eccpos array holds the byte offsets in the spare area where 722 the ecc codes are placed. 723 </para></listitem> 724 <listitem><para>oobfree</para><para> 725 The oobfree array defines the areas in the spare area which can be 726 used for automatic placement. The information is given in the format 727 {offset, size}. offset defines the start of the usable area, size the 728 length in bytes. More than one area can be defined. The list is terminated 729 by an {0, 0} entry. 730 </para></listitem> 731 </itemizedlist> 732 </para> 733 <sect2 id="Placement_defined_by_fs_driver"> 734 <title>Placement defined by fs driver</title> 735 <para> 736 The calling function provides a pointer to a nand_oobinfo 737 structure which defines the ecc placement. For writes the 738 caller must provide a spare area buffer along with the 739 data buffer. The spare area buffer size is (number of pages) * 740 (size of spare area). For reads the buffer size is 741 (number of pages) * ((size of spare area) + (number of ecc 742 steps per page) * sizeof (int)). The driver stores the 743 result of the ecc check for each tuple in the spare buffer. 744 The storage sequence is 745 </para> 746 <para> 747 <spare data page 0><ecc result 0>...<ecc result n> 748 </para> 749 <para> 750 ... 751 </para> 752 <para> 753 <spare data page n><ecc result 0>...<ecc result n> 754 </para> 755 <para> 756 This is a legacy mode used by YAFFS1. 757 </para> 758 <para> 759 If the spare area buffer is NULL then only the ECC placement is 760 done according to the given scheme in the nand_oobinfo structure. 761 </para> 762 </sect2> 763 <sect2 id="Automatic_placement"> 764 <title>Automatic placement</title> 765 <para> 766 Automatic placement uses the built in defaults to place the 767 ecc bytes in the spare area. If filesystem data have to be stored / 768 read into the spare area then the calling function must provide a 769 buffer. The buffer size per page is determined by the oobfree array in 770 the nand_oobinfo structure. 771 </para> 772 <para> 773 If the spare area buffer is NULL then only the ECC placement is 774 done according to the default builtin scheme. 775 </para> 776 </sect2> 777 <sect2 id="User_space_placement_selection"> 778 <title>User space placement selection</title> 779 <para> 780 All non ecc functions like mtd->read and mtd->write use an internal 781 structure, which can be set by an ioctl. This structure is preset 782 to the autoplacement default. 783 <programlisting> 784 ioctl (fd, MEMSETOOBSEL, oobsel); 785 </programlisting> 786 oobsel is a pointer to a user supplied structure of type 787 nand_oobconfig. The contents of this structure must match the 788 criteria of the filesystem, which will be used. See an example in utils/nandwrite.c. 789 </para> 790 </sect2> 791 </sect1> 792 <sect1 id="Spare_area_autoplacement_default"> 793 <title>Spare area autoplacement default schemes</title> 794 <sect2 id="pagesize_256"> 795 <title>256 byte pagesize</title> 796<informaltable><tgroup cols="3"><tbody> 797<row> 798<entry>Offset</entry> 799<entry>Content</entry> 800<entry>Comment</entry> 801</row> 802<row> 803<entry>0x00</entry> 804<entry>ECC byte 0</entry> 805<entry>Error correction code byte 0</entry> 806</row> 807<row> 808<entry>0x01</entry> 809<entry>ECC byte 1</entry> 810<entry>Error correction code byte 1</entry> 811</row> 812<row> 813<entry>0x02</entry> 814<entry>ECC byte 2</entry> 815<entry>Error correction code byte 2</entry> 816</row> 817<row> 818<entry>0x03</entry> 819<entry>Autoplace 0</entry> 820<entry></entry> 821</row> 822<row> 823<entry>0x04</entry> 824<entry>Autoplace 1</entry> 825<entry></entry> 826</row> 827<row> 828<entry>0x05</entry> 829<entry>Bad block marker</entry> 830<entry>If any bit in this byte is zero, then this block is bad. 831This applies only to the first page in a block. In the remaining 832pages this byte is reserved</entry> 833</row> 834<row> 835<entry>0x06</entry> 836<entry>Autoplace 2</entry> 837<entry></entry> 838</row> 839<row> 840<entry>0x07</entry> 841<entry>Autoplace 3</entry> 842<entry></entry> 843</row> 844</tbody></tgroup></informaltable> 845 </sect2> 846 <sect2 id="pagesize_512"> 847 <title>512 byte pagesize</title> 848<informaltable><tgroup cols="3"><tbody> 849<row> 850<entry>Offset</entry> 851<entry>Content</entry> 852<entry>Comment</entry> 853</row> 854<row> 855<entry>0x00</entry> 856<entry>ECC byte 0</entry> 857<entry>Error correction code byte 0 of the lower 256 Byte data in 858this page</entry> 859</row> 860<row> 861<entry>0x01</entry> 862<entry>ECC byte 1</entry> 863<entry>Error correction code byte 1 of the lower 256 Bytes of data 864in this page</entry> 865</row> 866<row> 867<entry>0x02</entry> 868<entry>ECC byte 2</entry> 869<entry>Error correction code byte 2 of the lower 256 Bytes of data 870in this page</entry> 871</row> 872<row> 873<entry>0x03</entry> 874<entry>ECC byte 3</entry> 875<entry>Error correction code byte 0 of the upper 256 Bytes of data 876in this page</entry> 877</row> 878<row> 879<entry>0x04</entry> 880<entry>reserved</entry> 881<entry>reserved</entry> 882</row> 883<row> 884<entry>0x05</entry> 885<entry>Bad block marker</entry> 886<entry>If any bit in this byte is zero, then this block is bad. 887This applies only to the first page in a block. In the remaining 888pages this byte is reserved</entry> 889</row> 890<row> 891<entry>0x06</entry> 892<entry>ECC byte 4</entry> 893<entry>Error correction code byte 1 of the upper 256 Bytes of data 894in this page</entry> 895</row> 896<row> 897<entry>0x07</entry> 898<entry>ECC byte 5</entry> 899<entry>Error correction code byte 2 of the upper 256 Bytes of data 900in this page</entry> 901</row> 902<row> 903<entry>0x08 - 0x0F</entry> 904<entry>Autoplace 0 - 7</entry> 905<entry></entry> 906</row> 907</tbody></tgroup></informaltable> 908 </sect2> 909 <sect2 id="pagesize_2048"> 910 <title>2048 byte pagesize</title> 911<informaltable><tgroup cols="3"><tbody> 912<row> 913<entry>Offset</entry> 914<entry>Content</entry> 915<entry>Comment</entry> 916</row> 917<row> 918<entry>0x00</entry> 919<entry>Bad block marker</entry> 920<entry>If any bit in this byte is zero, then this block is bad. 921This applies only to the first page in a block. In the remaining 922pages this byte is reserved</entry> 923</row> 924<row> 925<entry>0x01</entry> 926<entry>Reserved</entry> 927<entry>Reserved</entry> 928</row> 929<row> 930<entry>0x02-0x27</entry> 931<entry>Autoplace 0 - 37</entry> 932<entry></entry> 933</row> 934<row> 935<entry>0x28</entry> 936<entry>ECC byte 0</entry> 937<entry>Error correction code byte 0 of the first 256 Byte data in 938this page</entry> 939</row> 940<row> 941<entry>0x29</entry> 942<entry>ECC byte 1</entry> 943<entry>Error correction code byte 1 of the first 256 Bytes of data 944in this page</entry> 945</row> 946<row> 947<entry>0x2A</entry> 948<entry>ECC byte 2</entry> 949<entry>Error correction code byte 2 of the first 256 Bytes data in 950this page</entry> 951</row> 952<row> 953<entry>0x2B</entry> 954<entry>ECC byte 3</entry> 955<entry>Error correction code byte 0 of the second 256 Bytes of data 956in this page</entry> 957</row> 958<row> 959<entry>0x2C</entry> 960<entry>ECC byte 4</entry> 961<entry>Error correction code byte 1 of the second 256 Bytes of data 962in this page</entry> 963</row> 964<row> 965<entry>0x2D</entry> 966<entry>ECC byte 5</entry> 967<entry>Error correction code byte 2 of the second 256 Bytes of data 968in this page</entry> 969</row> 970<row> 971<entry>0x2E</entry> 972<entry>ECC byte 6</entry> 973<entry>Error correction code byte 0 of the third 256 Bytes of data 974in this page</entry> 975</row> 976<row> 977<entry>0x2F</entry> 978<entry>ECC byte 7</entry> 979<entry>Error correction code byte 1 of the third 256 Bytes of data 980in this page</entry> 981</row> 982<row> 983<entry>0x30</entry> 984<entry>ECC byte 8</entry> 985<entry>Error correction code byte 2 of the third 256 Bytes of data 986in this page</entry> 987</row> 988<row> 989<entry>0x31</entry> 990<entry>ECC byte 9</entry> 991<entry>Error correction code byte 0 of the fourth 256 Bytes of data 992in this page</entry> 993</row> 994<row> 995<entry>0x32</entry> 996<entry>ECC byte 10</entry> 997<entry>Error correction code byte 1 of the fourth 256 Bytes of data 998in this page</entry> 999</row> 1000<row> 1001<entry>0x33</entry> 1002<entry>ECC byte 11</entry> 1003<entry>Error correction code byte 2 of the fourth 256 Bytes of data 1004in this page</entry> 1005</row> 1006<row> 1007<entry>0x34</entry> 1008<entry>ECC byte 12</entry> 1009<entry>Error correction code byte 0 of the fifth 256 Bytes of data 1010in this page</entry> 1011</row> 1012<row> 1013<entry>0x35</entry> 1014<entry>ECC byte 13</entry> 1015<entry>Error correction code byte 1 of the fifth 256 Bytes of data 1016in this page</entry> 1017</row> 1018<row> 1019<entry>0x36</entry> 1020<entry>ECC byte 14</entry> 1021<entry>Error correction code byte 2 of the fifth 256 Bytes of data 1022in this page</entry> 1023</row> 1024<row> 1025<entry>0x37</entry> 1026<entry>ECC byte 15</entry> 1027<entry>Error correction code byte 0 of the sixt 256 Bytes of data 1028in this page</entry> 1029</row> 1030<row> 1031<entry>0x38</entry> 1032<entry>ECC byte 16</entry> 1033<entry>Error correction code byte 1 of the sixt 256 Bytes of data 1034in this page</entry> 1035</row> 1036<row> 1037<entry>0x39</entry> 1038<entry>ECC byte 17</entry> 1039<entry>Error correction code byte 2 of the sixt 256 Bytes of data 1040in this page</entry> 1041</row> 1042<row> 1043<entry>0x3A</entry> 1044<entry>ECC byte 18</entry> 1045<entry>Error correction code byte 0 of the seventh 256 Bytes of 1046data in this page</entry> 1047</row> 1048<row> 1049<entry>0x3B</entry> 1050<entry>ECC byte 19</entry> 1051<entry>Error correction code byte 1 of the seventh 256 Bytes of 1052data in this page</entry> 1053</row> 1054<row> 1055<entry>0x3C</entry> 1056<entry>ECC byte 20</entry> 1057<entry>Error correction code byte 2 of the seventh 256 Bytes of 1058data in this page</entry> 1059</row> 1060<row> 1061<entry>0x3D</entry> 1062<entry>ECC byte 21</entry> 1063<entry>Error correction code byte 0 of the eigth 256 Bytes of data 1064in this page</entry> 1065</row> 1066<row> 1067<entry>0x3E</entry> 1068<entry>ECC byte 22</entry> 1069<entry>Error correction code byte 1 of the eigth 256 Bytes of data 1070in this page</entry> 1071</row> 1072<row> 1073<entry>0x3F</entry> 1074<entry>ECC byte 23</entry> 1075<entry>Error correction code byte 2 of the eigth 256 Bytes of data 1076in this page</entry> 1077</row> 1078</tbody></tgroup></informaltable> 1079 </sect2> 1080 </sect1> 1081 </chapter> 1082 1083 <chapter id="filesystems"> 1084 <title>Filesystem support</title> 1085 <para> 1086 The NAND driver provides all neccecary functions for a 1087 filesystem via the MTD interface. 1088 </para> 1089 <para> 1090 Filesystems must be aware of the NAND pecularities and 1091 restrictions. One major restrictions of NAND Flash is, that you cannot 1092 write as often as you want to a page. The consecutive writes to a page, 1093 before erasing it again, are restricted to 1-3 writes, depending on the 1094 manufacturers specifications. This applies similar to the spare area. 1095 </para> 1096 <para> 1097 Therefore NAND aware filesystems must either write in page size chunks 1098 or hold a writebuffer to collect smaller writes until they sum up to 1099 pagesize. Available NAND aware filesystems: JFFS2, YAFFS. 1100 </para> 1101 <para> 1102 The spare area usage to store filesystem data is controlled by 1103 the spare area placement functionality which is described in one 1104 of the earlier chapters. 1105 </para> 1106 </chapter> 1107 <chapter id="tools"> 1108 <title>Tools</title> 1109 <para> 1110 The MTD project provides a couple of helpful tools to handle NAND Flash. 1111 <itemizedlist> 1112 <listitem><para>flasherase, flasheraseall: Erase and format FLASH partitions</para></listitem> 1113 <listitem><para>nandwrite: write filesystem images to NAND FLASH</para></listitem> 1114 <listitem><para>nanddump: dump the contents of a NAND FLASH partitions</para></listitem> 1115 </itemizedlist> 1116 </para> 1117 <para> 1118 These tools are aware of the NAND restrictions. Please use those tools 1119 instead of complaining about errors which are caused by non NAND aware 1120 access methods. 1121 </para> 1122 </chapter> 1123 1124 <chapter id="defines"> 1125 <title>Constants</title> 1126 <para> 1127 This chapter describes the constants which might be relevant for a driver developer. 1128 </para> 1129 <sect1 id="Chip_option_constants"> 1130 <title>Chip option constants</title> 1131 <sect2 id="Constants_for_chip_id_table"> 1132 <title>Constants for chip id table</title> 1133 <para> 1134 These constants are defined in nand.h. They are ored together to describe 1135 the chip functionality. 1136 <programlisting> 1137/* Chip can not auto increment pages */ 1138#define NAND_NO_AUTOINCR 0x00000001 1139/* Buswitdh is 16 bit */ 1140#define NAND_BUSWIDTH_16 0x00000002 1141/* Device supports partial programming without padding */ 1142#define NAND_NO_PADDING 0x00000004 1143/* Chip has cache program function */ 1144#define NAND_CACHEPRG 0x00000008 1145/* Chip has copy back function */ 1146#define NAND_COPYBACK 0x00000010 1147/* AND Chip which has 4 banks and a confusing page / block 1148 * assignment. See Renesas datasheet for further information */ 1149#define NAND_IS_AND 0x00000020 1150/* Chip has a array of 4 pages which can be read without 1151 * additional ready /busy waits */ 1152#define NAND_4PAGE_ARRAY 0x00000040 1153 </programlisting> 1154 </para> 1155 </sect2> 1156 <sect2 id="Constants_for_runtime_options"> 1157 <title>Constants for runtime options</title> 1158 <para> 1159 These constants are defined in nand.h. They are ored together to describe 1160 the functionality. 1161 <programlisting> 1162/* Use a flash based bad block table. This option is parsed by the 1163 * default bad block table function (nand_default_bbt). */ 1164#define NAND_USE_FLASH_BBT 0x00010000 1165/* The hw ecc generator provides a syndrome instead a ecc value on read 1166 * This can only work if we have the ecc bytes directly behind the 1167 * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */ 1168#define NAND_HWECC_SYNDROME 0x00020000 1169 </programlisting> 1170 </para> 1171 </sect2> 1172 </sect1> 1173 1174 <sect1 id="EEC_selection_constants"> 1175 <title>ECC selection constants</title> 1176 <para> 1177 Use these constants to select the ECC algorithm. 1178 <programlisting> 1179/* No ECC. Usage is not recommended ! */ 1180#define NAND_ECC_NONE 0 1181/* Software ECC 3 byte ECC per 256 Byte data */ 1182#define NAND_ECC_SOFT 1 1183/* Hardware ECC 3 byte ECC per 256 Byte data */ 1184#define NAND_ECC_HW3_256 2 1185/* Hardware ECC 3 byte ECC per 512 Byte data */ 1186#define NAND_ECC_HW3_512 3 1187/* Hardware ECC 6 byte ECC per 512 Byte data */ 1188#define NAND_ECC_HW6_512 4 1189/* Hardware ECC 6 byte ECC per 512 Byte data */ 1190#define NAND_ECC_HW8_512 6 1191 </programlisting> 1192 </para> 1193 </sect1> 1194 1195 <sect1 id="Hardware_control_related_constants"> 1196 <title>Hardware control related constants</title> 1197 <para> 1198 These constants describe the requested hardware access function when 1199 the boardspecific hardware control function is called 1200 <programlisting> 1201/* Select the chip by setting nCE to low */ 1202#define NAND_CTL_SETNCE 1 1203/* Deselect the chip by setting nCE to high */ 1204#define NAND_CTL_CLRNCE 2 1205/* Select the command latch by setting CLE to high */ 1206#define NAND_CTL_SETCLE 3 1207/* Deselect the command latch by setting CLE to low */ 1208#define NAND_CTL_CLRCLE 4 1209/* Select the address latch by setting ALE to high */ 1210#define NAND_CTL_SETALE 5 1211/* Deselect the address latch by setting ALE to low */ 1212#define NAND_CTL_CLRALE 6 1213/* Set write protection by setting WP to high. Not used! */ 1214#define NAND_CTL_SETWP 7 1215/* Clear write protection by setting WP to low. Not used! */ 1216#define NAND_CTL_CLRWP 8 1217 </programlisting> 1218 </para> 1219 </sect1> 1220 1221 <sect1 id="Bad_block_table_constants"> 1222 <title>Bad block table related constants</title> 1223 <para> 1224 These constants describe the options used for bad block 1225 table descriptors. 1226 <programlisting> 1227/* Options for the bad block table descriptors */ 1228 1229/* The number of bits used per block in the bbt on the device */ 1230#define NAND_BBT_NRBITS_MSK 0x0000000F 1231#define NAND_BBT_1BIT 0x00000001 1232#define NAND_BBT_2BIT 0x00000002 1233#define NAND_BBT_4BIT 0x00000004 1234#define NAND_BBT_8BIT 0x00000008 1235/* The bad block table is in the last good block of the device */ 1236#define NAND_BBT_LASTBLOCK 0x00000010 1237/* The bbt is at the given page, else we must scan for the bbt */ 1238#define NAND_BBT_ABSPAGE 0x00000020 1239/* The bbt is at the given page, else we must scan for the bbt */ 1240#define NAND_BBT_SEARCH 0x00000040 1241/* bbt is stored per chip on multichip devices */ 1242#define NAND_BBT_PERCHIP 0x00000080 1243/* bbt has a version counter at offset veroffs */ 1244#define NAND_BBT_VERSION 0x00000100 1245/* Create a bbt if none axists */ 1246#define NAND_BBT_CREATE 0x00000200 1247/* Search good / bad pattern through all pages of a block */ 1248#define NAND_BBT_SCANALLPAGES 0x00000400 1249/* Scan block empty during good / bad block scan */ 1250#define NAND_BBT_SCANEMPTY 0x00000800 1251/* Write bbt if neccecary */ 1252#define NAND_BBT_WRITE 0x00001000 1253/* Read and write back block contents when writing bbt */ 1254#define NAND_BBT_SAVECONTENT 0x00002000 1255 </programlisting> 1256 </para> 1257 </sect1> 1258 1259 </chapter> 1260 1261 <chapter id="structs"> 1262 <title>Structures</title> 1263 <para> 1264 This chapter contains the autogenerated documentation of the structures which are 1265 used in the NAND driver and might be relevant for a driver developer. Each 1266 struct member has a short description which is marked with an [XXX] identifier. 1267 See the chapter "Documentation hints" for an explanation. 1268 </para> 1269!Iinclude/linux/mtd/nand.h 1270 </chapter> 1271 1272 <chapter id="pubfunctions"> 1273 <title>Public Functions Provided</title> 1274 <para> 1275 This chapter contains the autogenerated documentation of the NAND kernel API functions 1276 which are exported. Each function has a short description which is marked with an [XXX] identifier. 1277 See the chapter "Documentation hints" for an explanation. 1278 </para> 1279!Edrivers/mtd/nand/nand_base.c 1280!Edrivers/mtd/nand/nand_bbt.c 1281!Edrivers/mtd/nand/nand_ecc.c 1282 </chapter> 1283 1284 <chapter id="intfunctions"> 1285 <title>Internal Functions Provided</title> 1286 <para> 1287 This chapter contains the autogenerated documentation of the NAND driver internal functions. 1288 Each function has a short description which is marked with an [XXX] identifier. 1289 See the chapter "Documentation hints" for an explanation. 1290 The functions marked with [DEFAULT] might be relevant for a board driver developer. 1291 </para> 1292!Idrivers/mtd/nand/nand_base.c 1293!Idrivers/mtd/nand/nand_bbt.c 1294<!-- No internal functions for kernel-doc: 1295X!Idrivers/mtd/nand/nand_ecc.c 1296--> 1297 </chapter> 1298 1299 <chapter id="credits"> 1300 <title>Credits</title> 1301 <para> 1302 The following people have contributed to the NAND driver: 1303 <orderedlist> 1304 <listitem><para>Steven J. Hill<email>sjhill@realitydiluted.com</email></para></listitem> 1305 <listitem><para>David Woodhouse<email>dwmw2@infradead.org</email></para></listitem> 1306 <listitem><para>Thomas Gleixner<email>tglx@linutronix.de</email></para></listitem> 1307 </orderedlist> 1308 A lot of users have provided bugfixes, improvements and helping hands for testing. 1309 Thanks a lot. 1310 </para> 1311 <para> 1312 The following people have contributed to this document: 1313 <orderedlist> 1314 <listitem><para>Thomas Gleixner<email>tglx@linutronix.de</email></para></listitem> 1315 </orderedlist> 1316 </para> 1317 </chapter> 1318</book> 1319