1/*
2 * MMX optimized forward DCT
3 * The gcc porting is Copyright (c) 2001 Fabrice Bellard.
4 * cleanup/optimizations are Copyright (c) 2002-2004 Michael Niedermayer <michaelni@gmx.at>
5 * SSE2 optimization is Copyright (c) 2004 Denes Balatoni.
6 *
7 * from  fdctam32.c - AP922 MMX(3D-Now) forward-DCT
8 *
9 *  Intel Application Note AP-922 - fast, precise implementation of DCT
10 *        http://developer.intel.com/vtune/cbts/appnotes.htm
11 *
12 * Also of inspiration:
13 * a page about fdct at http://www.geocities.com/ssavekar/dct.htm
14 * Skal's fdct at http://skal.planet-d.net/coding/dct.html
15 *
16 * This file is part of Libav.
17 *
18 * Libav is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU Lesser General Public
20 * License as published by the Free Software Foundation; either
21 * version 2.1 of the License, or (at your option) any later version.
22 *
23 * Libav is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
26 * Lesser General Public License for more details.
27 *
28 * You should have received a copy of the GNU Lesser General Public
29 * License along with Libav; if not, write to the Free Software
30 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
31 */
32
33#include "libavutil/common.h"
34#include "libavutil/x86_cpu.h"
35#include "libavcodec/dsputil.h"
36
37//////////////////////////////////////////////////////////////////////
38//
39// constants for the forward DCT
40// -----------------------------
41//
42// Be sure to check that your compiler is aligning all constants to QWORD
43// (8-byte) memory boundaries!  Otherwise the unaligned memory access will
44// severely stall MMX execution.
45//
46//////////////////////////////////////////////////////////////////////
47
48#define BITS_FRW_ACC   3 //; 2 or 3 for accuracy
49#define SHIFT_FRW_COL  BITS_FRW_ACC
50#define SHIFT_FRW_ROW  (BITS_FRW_ACC + 17 - 3)
51#define RND_FRW_ROW    (1 << (SHIFT_FRW_ROW-1))
52//#define RND_FRW_COL    (1 << (SHIFT_FRW_COL-1))
53
54#define X8(x) x,x,x,x,x,x,x,x
55
56//concatenated table, for forward DCT transformation
57DECLARE_ALIGNED(16, static const int16_t, fdct_tg_all_16)[24] = {
58    X8(13036),  // tg * (2<<16) + 0.5
59    X8(27146),  // tg * (2<<16) + 0.5
60    X8(-21746)  // tg * (2<<16) + 0.5
61};
62
63DECLARE_ALIGNED(16, static const int16_t, ocos_4_16)[8] = {
64    X8(23170)   //cos * (2<<15) + 0.5
65};
66
67DECLARE_ALIGNED(16, static const int16_t, fdct_one_corr)[8] = { X8(1) };
68
69DECLARE_ALIGNED(8, static const int32_t, fdct_r_row)[2] = {RND_FRW_ROW, RND_FRW_ROW };
70
71static struct
72{
73 DECLARE_ALIGNED(16, const int32_t, fdct_r_row_sse2)[4];
74} fdct_r_row_sse2 =
75{{
76 RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW
77}};
78//DECLARE_ALIGNED(16, static const long, fdct_r_row_sse2)[4] = {RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW};
79
80DECLARE_ALIGNED(8, static const int16_t, tab_frw_01234567)[] = {  // forward_dct coeff table
81  16384,   16384,   22725,   19266,
82  16384,   16384,   12873,    4520,
83  21407,    8867,   19266,   -4520,
84  -8867,  -21407,  -22725,  -12873,
85  16384,  -16384,   12873,  -22725,
86 -16384,   16384,    4520,   19266,
87   8867,  -21407,    4520,  -12873,
88  21407,   -8867,   19266,  -22725,
89
90  22725,   22725,   31521,   26722,
91  22725,   22725,   17855,    6270,
92  29692,   12299,   26722,   -6270,
93 -12299,  -29692,  -31521,  -17855,
94  22725,  -22725,   17855,  -31521,
95 -22725,   22725,    6270,   26722,
96  12299,  -29692,    6270,  -17855,
97  29692,  -12299,   26722,  -31521,
98
99  21407,   21407,   29692,   25172,
100  21407,   21407,   16819,    5906,
101  27969,   11585,   25172,   -5906,
102 -11585,  -27969,  -29692,  -16819,
103  21407,  -21407,   16819,  -29692,
104 -21407,   21407,    5906,   25172,
105  11585,  -27969,    5906,  -16819,
106  27969,  -11585,   25172,  -29692,
107
108  19266,   19266,   26722,   22654,
109  19266,   19266,   15137,    5315,
110  25172,   10426,   22654,   -5315,
111 -10426,  -25172,  -26722,  -15137,
112  19266,  -19266,   15137,  -26722,
113 -19266,   19266,    5315,   22654,
114  10426,  -25172,    5315,  -15137,
115  25172,  -10426,   22654,  -26722,
116
117  16384,   16384,   22725,   19266,
118  16384,   16384,   12873,    4520,
119  21407,    8867,   19266,   -4520,
120  -8867,  -21407,  -22725,  -12873,
121  16384,  -16384,   12873,  -22725,
122 -16384,   16384,    4520,   19266,
123   8867,  -21407,    4520,  -12873,
124  21407,   -8867,   19266,  -22725,
125
126  19266,   19266,   26722,   22654,
127  19266,   19266,   15137,    5315,
128  25172,   10426,   22654,   -5315,
129 -10426,  -25172,  -26722,  -15137,
130  19266,  -19266,   15137,  -26722,
131 -19266,   19266,    5315,   22654,
132  10426,  -25172,    5315,  -15137,
133  25172,  -10426,   22654,  -26722,
134
135  21407,   21407,   29692,   25172,
136  21407,   21407,   16819,    5906,
137  27969,   11585,   25172,   -5906,
138 -11585,  -27969,  -29692,  -16819,
139  21407,  -21407,   16819,  -29692,
140 -21407,   21407,    5906,   25172,
141  11585,  -27969,    5906,  -16819,
142  27969,  -11585,   25172,  -29692,
143
144  22725,   22725,   31521,   26722,
145  22725,   22725,   17855,    6270,
146  29692,   12299,   26722,   -6270,
147 -12299,  -29692,  -31521,  -17855,
148  22725,  -22725,   17855,  -31521,
149 -22725,   22725,    6270,   26722,
150  12299,  -29692,    6270,  -17855,
151  29692,  -12299,   26722,  -31521,
152};
153
154static struct
155{
156 DECLARE_ALIGNED(16, const int16_t, tab_frw_01234567_sse2)[256];
157} tab_frw_01234567_sse2 =
158{{
159//DECLARE_ALIGNED(16, static const int16_t, tab_frw_01234567_sse2)[] = {  // forward_dct coeff table
160#define TABLE_SSE2 C4,  C4,  C1,  C3, -C6, -C2, -C1, -C5, \
161                   C4,  C4,  C5,  C7,  C2,  C6,  C3, -C7, \
162                  -C4,  C4,  C7,  C3,  C6, -C2,  C7, -C5, \
163                   C4, -C4,  C5, -C1,  C2, -C6,  C3, -C1,
164// c1..c7 * cos(pi/4) * 2^15
165#define C1 22725
166#define C2 21407
167#define C3 19266
168#define C4 16384
169#define C5 12873
170#define C6 8867
171#define C7 4520
172TABLE_SSE2
173
174#undef C1
175#undef C2
176#undef C3
177#undef C4
178#undef C5
179#undef C6
180#undef C7
181#define C1 31521
182#define C2 29692
183#define C3 26722
184#define C4 22725
185#define C5 17855
186#define C6 12299
187#define C7 6270
188TABLE_SSE2
189
190#undef C1
191#undef C2
192#undef C3
193#undef C4
194#undef C5
195#undef C6
196#undef C7
197#define C1 29692
198#define C2 27969
199#define C3 25172
200#define C4 21407
201#define C5 16819
202#define C6 11585
203#define C7 5906
204TABLE_SSE2
205
206#undef C1
207#undef C2
208#undef C3
209#undef C4
210#undef C5
211#undef C6
212#undef C7
213#define C1 26722
214#define C2 25172
215#define C3 22654
216#define C4 19266
217#define C5 15137
218#define C6 10426
219#define C7 5315
220TABLE_SSE2
221
222#undef C1
223#undef C2
224#undef C3
225#undef C4
226#undef C5
227#undef C6
228#undef C7
229#define C1 22725
230#define C2 21407
231#define C3 19266
232#define C4 16384
233#define C5 12873
234#define C6 8867
235#define C7 4520
236TABLE_SSE2
237
238#undef C1
239#undef C2
240#undef C3
241#undef C4
242#undef C5
243#undef C6
244#undef C7
245#define C1 26722
246#define C2 25172
247#define C3 22654
248#define C4 19266
249#define C5 15137
250#define C6 10426
251#define C7 5315
252TABLE_SSE2
253
254#undef C1
255#undef C2
256#undef C3
257#undef C4
258#undef C5
259#undef C6
260#undef C7
261#define C1 29692
262#define C2 27969
263#define C3 25172
264#define C4 21407
265#define C5 16819
266#define C6 11585
267#define C7 5906
268TABLE_SSE2
269
270#undef C1
271#undef C2
272#undef C3
273#undef C4
274#undef C5
275#undef C6
276#undef C7
277#define C1 31521
278#define C2 29692
279#define C3 26722
280#define C4 22725
281#define C5 17855
282#define C6 12299
283#define C7 6270
284TABLE_SSE2
285}};
286
287#define S(s) AV_TOSTRING(s) //AV_STRINGIFY is too long
288
289#define FDCT_COL(cpu, mm, mov)\
290static av_always_inline void fdct_col_##cpu(const int16_t *in, int16_t *out, int offset)\
291{\
292    __asm__ volatile (\
293        #mov"      16(%0),  %%"#mm"0 \n\t" \
294        #mov"      96(%0),  %%"#mm"1 \n\t" \
295        #mov"    %%"#mm"0,  %%"#mm"2 \n\t" \
296        #mov"      32(%0),  %%"#mm"3 \n\t" \
297        "paddsw  %%"#mm"1,  %%"#mm"0 \n\t" \
298        #mov"      80(%0),  %%"#mm"4 \n\t" \
299        "psllw  $"S(SHIFT_FRW_COL)", %%"#mm"0 \n\t" \
300        #mov"        (%0),  %%"#mm"5 \n\t" \
301        "paddsw  %%"#mm"3,  %%"#mm"4 \n\t" \
302        "paddsw   112(%0),  %%"#mm"5 \n\t" \
303        "psllw  $"S(SHIFT_FRW_COL)", %%"#mm"4 \n\t" \
304        #mov"    %%"#mm"0,  %%"#mm"6 \n\t" \
305        "psubsw  %%"#mm"1,  %%"#mm"2 \n\t" \
306        #mov"      16(%1),  %%"#mm"1 \n\t" \
307        "psubsw  %%"#mm"4,  %%"#mm"0 \n\t" \
308        #mov"      48(%0),  %%"#mm"7 \n\t" \
309        "pmulhw  %%"#mm"0,  %%"#mm"1 \n\t" \
310        "paddsw    64(%0),  %%"#mm"7 \n\t" \
311        "psllw  $"S(SHIFT_FRW_COL)", %%"#mm"5 \n\t" \
312        "paddsw  %%"#mm"4,  %%"#mm"6 \n\t" \
313        "psllw  $"S(SHIFT_FRW_COL)", %%"#mm"7 \n\t" \
314        #mov"    %%"#mm"5,  %%"#mm"4 \n\t" \
315        "psubsw  %%"#mm"7,  %%"#mm"5 \n\t" \
316        "paddsw  %%"#mm"5,  %%"#mm"1 \n\t" \
317        "paddsw  %%"#mm"7,  %%"#mm"4 \n\t" \
318        "por         (%2),  %%"#mm"1 \n\t" \
319        "psllw  $"S(SHIFT_FRW_COL)"+1, %%"#mm"2 \n\t" \
320        "pmulhw    16(%1),  %%"#mm"5 \n\t" \
321        #mov"    %%"#mm"4,  %%"#mm"7 \n\t" \
322        "psubsw    80(%0),  %%"#mm"3 \n\t" \
323        "psubsw  %%"#mm"6,  %%"#mm"4 \n\t" \
324        #mov"    %%"#mm"1,    32(%3) \n\t" \
325        "paddsw  %%"#mm"6,  %%"#mm"7 \n\t" \
326        #mov"      48(%0),  %%"#mm"1 \n\t" \
327        "psllw  $"S(SHIFT_FRW_COL)"+1, %%"#mm"3 \n\t" \
328        "psubsw    64(%0),  %%"#mm"1 \n\t" \
329        #mov"    %%"#mm"2,  %%"#mm"6 \n\t" \
330        #mov"    %%"#mm"4,    64(%3) \n\t" \
331        "paddsw  %%"#mm"3,  %%"#mm"2 \n\t" \
332        "pmulhw      (%4),  %%"#mm"2 \n\t" \
333        "psubsw  %%"#mm"3,  %%"#mm"6 \n\t" \
334        "pmulhw      (%4),  %%"#mm"6 \n\t" \
335        "psubsw  %%"#mm"0,  %%"#mm"5 \n\t" \
336        "por         (%2),  %%"#mm"5 \n\t" \
337        "psllw  $"S(SHIFT_FRW_COL)", %%"#mm"1 \n\t" \
338        "por         (%2),  %%"#mm"2 \n\t" \
339        #mov"    %%"#mm"1,  %%"#mm"4 \n\t" \
340        #mov"        (%0),  %%"#mm"3 \n\t" \
341        "paddsw  %%"#mm"6,  %%"#mm"1 \n\t" \
342        "psubsw   112(%0),  %%"#mm"3 \n\t" \
343        "psubsw  %%"#mm"6,  %%"#mm"4 \n\t" \
344        #mov"        (%1),  %%"#mm"0 \n\t" \
345        "psllw  $"S(SHIFT_FRW_COL)", %%"#mm"3 \n\t" \
346        #mov"      32(%1),  %%"#mm"6 \n\t" \
347        "pmulhw  %%"#mm"1,  %%"#mm"0 \n\t" \
348        #mov"    %%"#mm"7,      (%3) \n\t" \
349        "pmulhw  %%"#mm"4,  %%"#mm"6 \n\t" \
350        #mov"    %%"#mm"5,    96(%3) \n\t" \
351        #mov"    %%"#mm"3,  %%"#mm"7 \n\t" \
352        #mov"      32(%1),  %%"#mm"5 \n\t" \
353        "psubsw  %%"#mm"2,  %%"#mm"7 \n\t" \
354        "paddsw  %%"#mm"2,  %%"#mm"3 \n\t" \
355        "pmulhw  %%"#mm"7,  %%"#mm"5 \n\t" \
356        "paddsw  %%"#mm"3,  %%"#mm"0 \n\t" \
357        "paddsw  %%"#mm"4,  %%"#mm"6 \n\t" \
358        "pmulhw      (%1),  %%"#mm"3 \n\t" \
359        "por         (%2),  %%"#mm"0 \n\t" \
360        "paddsw  %%"#mm"7,  %%"#mm"5 \n\t" \
361        "psubsw  %%"#mm"6,  %%"#mm"7 \n\t" \
362        #mov"    %%"#mm"0,    16(%3) \n\t" \
363        "paddsw  %%"#mm"4,  %%"#mm"5 \n\t" \
364        #mov"    %%"#mm"7,    48(%3) \n\t" \
365        "psubsw  %%"#mm"1,  %%"#mm"3 \n\t" \
366        #mov"    %%"#mm"5,    80(%3) \n\t" \
367        #mov"    %%"#mm"3,   112(%3) \n\t" \
368        : \
369        : "r" (in  + offset), "r" (fdct_tg_all_16), "r" (fdct_one_corr), \
370          "r" (out + offset), "r" (ocos_4_16)); \
371}
372
373FDCT_COL(mmx, mm, movq)
374FDCT_COL(sse2, xmm, movdqa)
375
376static av_always_inline void fdct_row_sse2(const int16_t *in, int16_t *out)
377{
378    __asm__ volatile(
379#define FDCT_ROW_SSE2_H1(i,t)                    \
380        "movq      " #i "(%0), %%xmm2      \n\t" \
381        "movq      " #i "+8(%0), %%xmm0    \n\t" \
382        "movdqa    " #t "+32(%1), %%xmm3   \n\t" \
383        "movdqa    " #t "+48(%1), %%xmm7   \n\t" \
384        "movdqa    " #t "(%1), %%xmm4      \n\t" \
385        "movdqa    " #t "+16(%1), %%xmm5   \n\t"
386
387#define FDCT_ROW_SSE2_H2(i,t)                    \
388        "movq      " #i "(%0), %%xmm2      \n\t" \
389        "movq      " #i "+8(%0), %%xmm0    \n\t" \
390        "movdqa    " #t "+32(%1), %%xmm3   \n\t" \
391        "movdqa    " #t "+48(%1), %%xmm7   \n\t"
392
393#define FDCT_ROW_SSE2(i)                      \
394        "movq      %%xmm2, %%xmm1       \n\t" \
395        "pshuflw   $27, %%xmm0, %%xmm0  \n\t" \
396        "paddsw    %%xmm0, %%xmm1       \n\t" \
397        "psubsw    %%xmm0, %%xmm2       \n\t" \
398        "punpckldq %%xmm2, %%xmm1       \n\t" \
399        "pshufd    $78, %%xmm1, %%xmm2  \n\t" \
400        "pmaddwd   %%xmm2, %%xmm3       \n\t" \
401        "pmaddwd   %%xmm1, %%xmm7       \n\t" \
402        "pmaddwd   %%xmm5, %%xmm2       \n\t" \
403        "pmaddwd   %%xmm4, %%xmm1       \n\t" \
404        "paddd     %%xmm7, %%xmm3       \n\t" \
405        "paddd     %%xmm2, %%xmm1       \n\t" \
406        "paddd     %%xmm6, %%xmm3       \n\t" \
407        "paddd     %%xmm6, %%xmm1       \n\t" \
408        "psrad     %3, %%xmm3           \n\t" \
409        "psrad     %3, %%xmm1           \n\t" \
410        "packssdw  %%xmm3, %%xmm1       \n\t" \
411        "movdqa    %%xmm1, " #i "(%4)   \n\t"
412
413        "movdqa    (%2), %%xmm6         \n\t"
414        FDCT_ROW_SSE2_H1(0,0)
415        FDCT_ROW_SSE2(0)
416        FDCT_ROW_SSE2_H2(64,0)
417        FDCT_ROW_SSE2(64)
418
419        FDCT_ROW_SSE2_H1(16,64)
420        FDCT_ROW_SSE2(16)
421        FDCT_ROW_SSE2_H2(112,64)
422        FDCT_ROW_SSE2(112)
423
424        FDCT_ROW_SSE2_H1(32,128)
425        FDCT_ROW_SSE2(32)
426        FDCT_ROW_SSE2_H2(96,128)
427        FDCT_ROW_SSE2(96)
428
429        FDCT_ROW_SSE2_H1(48,192)
430        FDCT_ROW_SSE2(48)
431        FDCT_ROW_SSE2_H2(80,192)
432        FDCT_ROW_SSE2(80)
433        :
434        : "r" (in), "r" (tab_frw_01234567_sse2.tab_frw_01234567_sse2),
435          "r" (fdct_r_row_sse2.fdct_r_row_sse2), "i" (SHIFT_FRW_ROW), "r" (out)
436          XMM_CLOBBERS_ONLY("%xmm0", "%xmm1", "%xmm2", "%xmm3",
437                            "%xmm4", "%xmm5", "%xmm6", "%xmm7")
438    );
439}
440
441static av_always_inline void fdct_row_mmx2(const int16_t *in, int16_t *out, const int16_t *table)
442{
443    __asm__ volatile (
444        "pshufw    $0x1B, 8(%0), %%mm5 \n\t"
445        "movq       (%0), %%mm0 \n\t"
446        "movq      %%mm0, %%mm1 \n\t"
447        "paddsw    %%mm5, %%mm0 \n\t"
448        "psubsw    %%mm5, %%mm1 \n\t"
449        "movq      %%mm0, %%mm2 \n\t"
450        "punpckldq %%mm1, %%mm0 \n\t"
451        "punpckhdq %%mm1, %%mm2 \n\t"
452        "movq       (%1), %%mm1 \n\t"
453        "movq      8(%1), %%mm3 \n\t"
454        "movq     16(%1), %%mm4 \n\t"
455        "movq     24(%1), %%mm5 \n\t"
456        "movq     32(%1), %%mm6 \n\t"
457        "movq     40(%1), %%mm7 \n\t"
458        "pmaddwd   %%mm0, %%mm1 \n\t"
459        "pmaddwd   %%mm2, %%mm3 \n\t"
460        "pmaddwd   %%mm0, %%mm4 \n\t"
461        "pmaddwd   %%mm2, %%mm5 \n\t"
462        "pmaddwd   %%mm0, %%mm6 \n\t"
463        "pmaddwd   %%mm2, %%mm7 \n\t"
464        "pmaddwd  48(%1), %%mm0 \n\t"
465        "pmaddwd  56(%1), %%mm2 \n\t"
466        "paddd     %%mm1, %%mm3 \n\t"
467        "paddd     %%mm4, %%mm5 \n\t"
468        "paddd     %%mm6, %%mm7 \n\t"
469        "paddd     %%mm0, %%mm2 \n\t"
470        "movq       (%2), %%mm0 \n\t"
471        "paddd     %%mm0, %%mm3 \n\t"
472        "paddd     %%mm0, %%mm5 \n\t"
473        "paddd     %%mm0, %%mm7 \n\t"
474        "paddd     %%mm0, %%mm2 \n\t"
475        "psrad $"S(SHIFT_FRW_ROW)", %%mm3 \n\t"
476        "psrad $"S(SHIFT_FRW_ROW)", %%mm5 \n\t"
477        "psrad $"S(SHIFT_FRW_ROW)", %%mm7 \n\t"
478        "psrad $"S(SHIFT_FRW_ROW)", %%mm2 \n\t"
479        "packssdw  %%mm5, %%mm3 \n\t"
480        "packssdw  %%mm2, %%mm7 \n\t"
481        "movq      %%mm3,  (%3) \n\t"
482        "movq      %%mm7, 8(%3) \n\t"
483        :
484        : "r" (in), "r" (table), "r" (fdct_r_row), "r" (out));
485}
486
487static av_always_inline void fdct_row_mmx(const int16_t *in, int16_t *out, const int16_t *table)
488{
489    //FIXME reorder (I do not have an old MMX-only CPU here to benchmark ...)
490    __asm__ volatile(
491        "movd     12(%0), %%mm1 \n\t"
492        "punpcklwd 8(%0), %%mm1 \n\t"
493        "movq      %%mm1, %%mm2 \n\t"
494        "psrlq     $0x20, %%mm1 \n\t"
495        "movq      0(%0), %%mm0 \n\t"
496        "punpcklwd %%mm2, %%mm1 \n\t"
497        "movq      %%mm0, %%mm5 \n\t"
498        "paddsw    %%mm1, %%mm0 \n\t"
499        "psubsw    %%mm1, %%mm5 \n\t"
500        "movq      %%mm0, %%mm2 \n\t"
501        "punpckldq %%mm5, %%mm0 \n\t"
502        "punpckhdq %%mm5, %%mm2 \n\t"
503        "movq      0(%1), %%mm1 \n\t"
504        "movq      8(%1), %%mm3 \n\t"
505        "movq     16(%1), %%mm4 \n\t"
506        "movq     24(%1), %%mm5 \n\t"
507        "movq     32(%1), %%mm6 \n\t"
508        "movq     40(%1), %%mm7 \n\t"
509        "pmaddwd   %%mm0, %%mm1 \n\t"
510        "pmaddwd   %%mm2, %%mm3 \n\t"
511        "pmaddwd   %%mm0, %%mm4 \n\t"
512        "pmaddwd   %%mm2, %%mm5 \n\t"
513        "pmaddwd   %%mm0, %%mm6 \n\t"
514        "pmaddwd   %%mm2, %%mm7 \n\t"
515        "pmaddwd  48(%1), %%mm0 \n\t"
516        "pmaddwd  56(%1), %%mm2 \n\t"
517        "paddd     %%mm1, %%mm3 \n\t"
518        "paddd     %%mm4, %%mm5 \n\t"
519        "paddd     %%mm6, %%mm7 \n\t"
520        "paddd     %%mm0, %%mm2 \n\t"
521        "movq       (%2), %%mm0 \n\t"
522        "paddd     %%mm0, %%mm3 \n\t"
523        "paddd     %%mm0, %%mm5 \n\t"
524        "paddd     %%mm0, %%mm7 \n\t"
525        "paddd     %%mm0, %%mm2 \n\t"
526        "psrad $"S(SHIFT_FRW_ROW)", %%mm3 \n\t"
527        "psrad $"S(SHIFT_FRW_ROW)", %%mm5 \n\t"
528        "psrad $"S(SHIFT_FRW_ROW)", %%mm7 \n\t"
529        "psrad $"S(SHIFT_FRW_ROW)", %%mm2 \n\t"
530        "packssdw  %%mm5, %%mm3 \n\t"
531        "packssdw  %%mm2, %%mm7 \n\t"
532        "movq      %%mm3, 0(%3) \n\t"
533        "movq      %%mm7, 8(%3) \n\t"
534        :
535        : "r" (in), "r" (table), "r" (fdct_r_row), "r" (out));
536}
537
538void ff_fdct_mmx(int16_t *block)
539{
540    DECLARE_ALIGNED(8, int64_t, align_tmp)[16];
541    int16_t * block1= (int16_t*)align_tmp;
542    const int16_t *table= tab_frw_01234567;
543    int i;
544
545    fdct_col_mmx(block, block1, 0);
546    fdct_col_mmx(block, block1, 4);
547
548    for(i=8;i>0;i--) {
549        fdct_row_mmx(block1, block, table);
550        block1 += 8;
551        table += 32;
552        block += 8;
553    }
554}
555
556void ff_fdct_mmx2(int16_t *block)
557{
558    DECLARE_ALIGNED(8, int64_t, align_tmp)[16];
559    int16_t *block1= (int16_t*)align_tmp;
560    const int16_t *table= tab_frw_01234567;
561    int i;
562
563    fdct_col_mmx(block, block1, 0);
564    fdct_col_mmx(block, block1, 4);
565
566    for(i=8;i>0;i--) {
567        fdct_row_mmx2(block1, block, table);
568        block1 += 8;
569        table += 32;
570        block += 8;
571    }
572}
573
574void ff_fdct_sse2(int16_t *block)
575{
576    DECLARE_ALIGNED(16, int64_t, align_tmp)[16];
577    int16_t * const block1= (int16_t*)align_tmp;
578
579    fdct_col_sse2(block, block1, 0);
580    fdct_row_sse2(block1, block);
581}
582
583