1/* $NetBSD: sun50i-a100-ccu.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 3/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ 4/* 5 * Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com> 6 */ 7 8#ifndef _DT_BINDINGS_RESET_SUN50I_A100_H_ 9#define _DT_BINDINGS_RESET_SUN50I_A100_H_ 10 11#define RST_MBUS 0 12#define RST_BUS_DE 1 13#define RST_BUS_G2D 2 14#define RST_BUS_GPU 3 15#define RST_BUS_CE 4 16#define RST_BUS_VE 5 17#define RST_BUS_DMA 6 18#define RST_BUS_MSGBOX 7 19#define RST_BUS_SPINLOCK 8 20#define RST_BUS_HSTIMER 9 21#define RST_BUS_DBG 10 22#define RST_BUS_PSI 11 23#define RST_BUS_PWM 12 24#define RST_BUS_DRAM 13 25#define RST_BUS_NAND 14 26#define RST_BUS_MMC0 15 27#define RST_BUS_MMC1 16 28#define RST_BUS_MMC2 17 29#define RST_BUS_UART0 18 30#define RST_BUS_UART1 19 31#define RST_BUS_UART2 20 32#define RST_BUS_UART3 21 33#define RST_BUS_UART4 22 34#define RST_BUS_I2C0 23 35#define RST_BUS_I2C1 24 36#define RST_BUS_I2C2 25 37#define RST_BUS_I2C3 26 38#define RST_BUS_SPI0 27 39#define RST_BUS_SPI1 28 40#define RST_BUS_SPI2 29 41#define RST_BUS_EMAC 30 42#define RST_BUS_IR_RX 31 43#define RST_BUS_IR_TX 32 44#define RST_BUS_GPADC 33 45#define RST_BUS_THS 34 46#define RST_BUS_I2S0 35 47#define RST_BUS_I2S1 36 48#define RST_BUS_I2S2 37 49#define RST_BUS_I2S3 38 50#define RST_BUS_SPDIF 39 51#define RST_BUS_DMIC 40 52#define RST_BUS_AUDIO_CODEC 41 53#define RST_USB_PHY0 42 54#define RST_USB_PHY1 43 55#define RST_BUS_OHCI0 44 56#define RST_BUS_OHCI1 45 57#define RST_BUS_EHCI0 46 58#define RST_BUS_EHCI1 47 59#define RST_BUS_OTG 48 60#define RST_BUS_LRADC 49 61#define RST_BUS_DPSS_TOP0 50 62#define RST_BUS_DPSS_TOP1 51 63#define RST_BUS_MIPI_DSI 52 64#define RST_BUS_TCON_LCD 53 65#define RST_BUS_LVDS 54 66#define RST_BUS_LEDC 55 67#define RST_BUS_CSI 56 68#define RST_BUS_CSI_ISP 57 69 70#endif /* _DT_BINDINGS_RESET_SUN50I_A100_H_ */ 71