1/*	$NetBSD: qcom,gcc-msm8939.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $	*/
2
3/* SPDX-License-Identifier: GPL-2.0-only */
4/*
5 * Copyright 2020 Linaro Limited
6 */
7
8#ifndef _DT_BINDINGS_RESET_MSM_GCC_8939_H
9#define _DT_BINDINGS_RESET_MSM_GCC_8939_H
10
11#define GCC_BLSP1_BCR			0
12#define GCC_BLSP1_QUP1_BCR		1
13#define GCC_BLSP1_UART1_BCR		2
14#define GCC_BLSP1_QUP2_BCR		3
15#define GCC_BLSP1_UART2_BCR		4
16#define GCC_BLSP1_QUP3_BCR		5
17#define GCC_BLSP1_QUP4_BCR		6
18#define GCC_BLSP1_QUP5_BCR		7
19#define GCC_BLSP1_QUP6_BCR		8
20#define GCC_IMEM_BCR			9
21#define GCC_SMMU_BCR			10
22#define GCC_APSS_TCU_BCR		11
23#define GCC_SMMU_XPU_BCR		12
24#define GCC_PCNOC_TBU_BCR		13
25#define GCC_PRNG_BCR			14
26#define GCC_BOOT_ROM_BCR		15
27#define GCC_CRYPTO_BCR			16
28#define GCC_SEC_CTRL_BCR		17
29#define GCC_AUDIO_CORE_BCR		18
30#define GCC_ULT_AUDIO_BCR		19
31#define GCC_DEHR_BCR			20
32#define GCC_SYSTEM_NOC_BCR		21
33#define GCC_PCNOC_BCR			22
34#define GCC_TCSR_BCR			23
35#define GCC_QDSS_BCR			24
36#define GCC_DCD_BCR			25
37#define GCC_MSG_RAM_BCR			26
38#define GCC_MPM_BCR			27
39#define GCC_SPMI_BCR			28
40#define GCC_SPDM_BCR			29
41#define GCC_MM_SPDM_BCR			30
42#define GCC_BIMC_BCR			31
43#define GCC_RBCPR_BCR			32
44#define GCC_TLMM_BCR			33
45#define GCC_USB_HS_BCR			34
46#define GCC_USB2A_PHY_BCR		35
47#define GCC_SDCC1_BCR			36
48#define GCC_SDCC2_BCR			37
49#define GCC_PDM_BCR			38
50#define GCC_SNOC_BUS_TIMEOUT0_BCR	39
51#define GCC_PCNOC_BUS_TIMEOUT0_BCR	40
52#define GCC_PCNOC_BUS_TIMEOUT1_BCR	41
53#define GCC_PCNOC_BUS_TIMEOUT2_BCR	42
54#define GCC_PCNOC_BUS_TIMEOUT3_BCR	43
55#define GCC_PCNOC_BUS_TIMEOUT4_BCR	44
56#define GCC_PCNOC_BUS_TIMEOUT5_BCR	45
57#define GCC_PCNOC_BUS_TIMEOUT6_BCR	46
58#define GCC_PCNOC_BUS_TIMEOUT7_BCR	47
59#define GCC_PCNOC_BUS_TIMEOUT8_BCR	48
60#define GCC_PCNOC_BUS_TIMEOUT9_BCR	49
61#define GCC_MMSS_BCR			50
62#define GCC_VENUS0_BCR			51
63#define GCC_MDSS_BCR			52
64#define GCC_CAMSS_PHY0_BCR		53
65#define GCC_CAMSS_CSI0_BCR		54
66#define GCC_CAMSS_CSI0PHY_BCR		55
67#define GCC_CAMSS_CSI0RDI_BCR		56
68#define GCC_CAMSS_CSI0PIX_BCR		57
69#define GCC_CAMSS_PHY1_BCR		58
70#define GCC_CAMSS_CSI1_BCR		59
71#define GCC_CAMSS_CSI1PHY_BCR		60
72#define GCC_CAMSS_CSI1RDI_BCR		61
73#define GCC_CAMSS_CSI1PIX_BCR		62
74#define GCC_CAMSS_ISPIF_BCR		63
75#define GCC_CAMSS_CCI_BCR		64
76#define GCC_CAMSS_MCLK0_BCR		65
77#define GCC_CAMSS_MCLK1_BCR		66
78#define GCC_CAMSS_GP0_BCR		67
79#define GCC_CAMSS_GP1_BCR		68
80#define GCC_CAMSS_TOP_BCR		69
81#define GCC_CAMSS_MICRO_BCR		70
82#define GCC_CAMSS_JPEG_BCR		71
83#define GCC_CAMSS_VFE_BCR		72
84#define GCC_CAMSS_CSI_VFE0_BCR		73
85#define GCC_OXILI_BCR			74
86#define GCC_GMEM_BCR			75
87#define GCC_CAMSS_AHB_BCR		76
88#define GCC_MDP_TBU_BCR			77
89#define GCC_GFX_TBU_BCR			78
90#define GCC_GFX_TCU_BCR			79
91#define GCC_MSS_TBU_AXI_BCR		80
92#define GCC_MSS_TBU_GSS_AXI_BCR		81
93#define GCC_MSS_TBU_Q6_AXI_BCR		82
94#define GCC_GTCU_AHB_BCR		83
95#define GCC_SMMU_CFG_BCR		84
96#define GCC_VFE_TBU_BCR			85
97#define GCC_VENUS_TBU_BCR		86
98#define GCC_JPEG_TBU_BCR		87
99#define GCC_PRONTO_TBU_BCR		88
100#define GCC_SMMU_CATS_BCR		89
101#define GCC_BLSP1_UART3_BCR		90
102#define GCC_CAMSS_CSI2_BCR		91
103#define GCC_CAMSS_CSI2PHY_BCR		92
104#define GCC_CAMSS_CSI2RDI_BCR		93
105#define GCC_CAMSS_CSI2PIX_BCR		94
106#define GCC_USB_FS_BCR			95
107#define GCC_BLSP1_QUP4_SPI_APPS_CBCR	96
108#define GCC_CAMSS_MCLK2_BCR		97
109#define GCC_CPP_TBU_BCR			98
110#define GCC_MDP_RT_TBU_BCR		99
111
112#endif
113