stm32f7-rcc.h revision 1.1.1.1 
1/*	$NetBSD: stm32f7-rcc.h,v 1.1.1.1 2017/07/27 18:10:51 jmcneill Exp $	*/
2
3/*
4 * This header provides constants for the STM32F7 RCC IP
5 */
6
7#ifndef _DT_BINDINGS_MFD_STM32F7_RCC_H
8#define _DT_BINDINGS_MFD_STM32F7_RCC_H
9
10/* AHB1 */
11#define STM32F7_RCC_AHB1_GPIOA		0
12#define STM32F7_RCC_AHB1_GPIOB		1
13#define STM32F7_RCC_AHB1_GPIOC		2
14#define STM32F7_RCC_AHB1_GPIOD		3
15#define STM32F7_RCC_AHB1_GPIOE		4
16#define STM32F7_RCC_AHB1_GPIOF		5
17#define STM32F7_RCC_AHB1_GPIOG		6
18#define STM32F7_RCC_AHB1_GPIOH		7
19#define STM32F7_RCC_AHB1_GPIOI		8
20#define STM32F7_RCC_AHB1_GPIOJ		9
21#define STM32F7_RCC_AHB1_GPIOK		10
22#define STM32F7_RCC_AHB1_CRC		12
23#define STM32F7_RCC_AHB1_BKPSRAM	18
24#define STM32F7_RCC_AHB1_DTCMRAM	20
25#define STM32F7_RCC_AHB1_DMA1		21
26#define STM32F7_RCC_AHB1_DMA2		22
27#define STM32F7_RCC_AHB1_DMA2D		23
28#define STM32F7_RCC_AHB1_ETHMAC		25
29#define STM32F7_RCC_AHB1_ETHMACTX	26
30#define STM32F7_RCC_AHB1_ETHMACRX	27
31#define STM32FF_RCC_AHB1_ETHMACPTP	28
32#define STM32F7_RCC_AHB1_OTGHS		29
33#define STM32F7_RCC_AHB1_OTGHSULPI	30
34
35#define STM32F7_AHB1_RESET(bit) (STM32F7_RCC_AHB1_##bit + (0x10 * 8))
36#define STM32F7_AHB1_CLOCK(bit) (STM32F7_RCC_AHB1_##bit)
37
38
39/* AHB2 */
40#define STM32F7_RCC_AHB2_DCMI		0
41#define STM32F7_RCC_AHB2_CRYP		4
42#define STM32F7_RCC_AHB2_HASH		5
43#define STM32F7_RCC_AHB2_RNG		6
44#define STM32F7_RCC_AHB2_OTGFS		7
45
46#define STM32F7_AHB2_RESET(bit)	(STM32F7_RCC_AHB2_##bit + (0x14 * 8))
47#define STM32F7_AHB2_CLOCK(bit)	(STM32F7_RCC_AHB2_##bit + 0x20)
48
49/* AHB3 */
50#define STM32F7_RCC_AHB3_FMC		0
51#define STM32F7_RCC_AHB3_QSPI		1
52
53#define STM32F7_AHB3_RESET(bit)	(STM32F7_RCC_AHB3_##bit + (0x18 * 8))
54#define STM32F7_AHB3_CLOCK(bit)	(STM32F7_RCC_AHB3_##bit + 0x40)
55
56/* APB1 */
57#define STM32F7_RCC_APB1_TIM2		0
58#define STM32F7_RCC_APB1_TIM3		1
59#define STM32F7_RCC_APB1_TIM4		2
60#define STM32F7_RCC_APB1_TIM5		3
61#define STM32F7_RCC_APB1_TIM6		4
62#define STM32F7_RCC_APB1_TIM7		5
63#define STM32F7_RCC_APB1_TIM12		6
64#define STM32F7_RCC_APB1_TIM13		7
65#define STM32F7_RCC_APB1_TIM14		8
66#define STM32F7_RCC_APB1_LPTIM1		9
67#define STM32F7_RCC_APB1_WWDG		11
68#define STM32F7_RCC_APB1_SPI2		14
69#define STM32F7_RCC_APB1_SPI3		15
70#define STM32F7_RCC_APB1_SPDIFRX	16
71#define STM32F7_RCC_APB1_UART2		17
72#define STM32F7_RCC_APB1_UART3		18
73#define STM32F7_RCC_APB1_UART4		19
74#define STM32F7_RCC_APB1_UART5		20
75#define STM32F7_RCC_APB1_I2C1		21
76#define STM32F7_RCC_APB1_I2C2		22
77#define STM32F7_RCC_APB1_I2C3		23
78#define STM32F7_RCC_APB1_I2C4		24
79#define STM32F7_RCC_APB1_CAN1		25
80#define STM32F7_RCC_APB1_CAN2		26
81#define STM32F7_RCC_APB1_CEC		27
82#define STM32F7_RCC_APB1_PWR		28
83#define STM32F7_RCC_APB1_DAC		29
84#define STM32F7_RCC_APB1_UART7		30
85#define STM32F7_RCC_APB1_UART8		31
86
87#define STM32F7_APB1_RESET(bit)	(STM32F7_RCC_APB1_##bit + (0x20 * 8))
88#define STM32F7_APB1_CLOCK(bit)	(STM32F7_RCC_APB1_##bit + 0x80)
89
90/* APB2 */
91#define STM32F7_RCC_APB2_TIM1		0
92#define STM32F7_RCC_APB2_TIM8		1
93#define STM32F7_RCC_APB2_USART1		4
94#define STM32F7_RCC_APB2_USART6		5
95#define STM32F7_RCC_APB2_ADC1		8
96#define STM32F7_RCC_APB2_ADC2		9
97#define STM32F7_RCC_APB2_ADC3		10
98#define STM32F7_RCC_APB2_SDMMC1		11
99#define STM32F7_RCC_APB2_SPI1		12
100#define STM32F7_RCC_APB2_SPI4		13
101#define STM32F7_RCC_APB2_SYSCFG		14
102#define STM32F7_RCC_APB2_TIM9		16
103#define STM32F7_RCC_APB2_TIM10		17
104#define STM32F7_RCC_APB2_TIM11		18
105#define STM32F7_RCC_APB2_SPI5		20
106#define STM32F7_RCC_APB2_SPI6		21
107#define STM32F7_RCC_APB2_SAI1		22
108#define STM32F7_RCC_APB2_SAI2		23
109#define STM32F7_RCC_APB2_LTDC		26
110
111#define STM32F7_APB2_RESET(bit)	(STM32F7_RCC_APB2_##bit + (0x24 * 8))
112#define STM32F7_APB2_CLOCK(bit)	(STM32F7_RCC_APB2_##bit + 0xA0)
113
114#endif /* _DT_BINDINGS_MFD_STM32F7_RCC_H */
115