1/*	$NetBSD: stm32f7-rcc.h,v 1.1.1.3 2018/04/28 18:25:53 jmcneill Exp $	*/
2
3/* SPDX-License-Identifier: GPL-2.0 */
4/*
5 * This header provides constants for the STM32F7 RCC IP
6 */
7
8#ifndef _DT_BINDINGS_MFD_STM32F7_RCC_H
9#define _DT_BINDINGS_MFD_STM32F7_RCC_H
10
11/* AHB1 */
12#define STM32F7_RCC_AHB1_GPIOA		0
13#define STM32F7_RCC_AHB1_GPIOB		1
14#define STM32F7_RCC_AHB1_GPIOC		2
15#define STM32F7_RCC_AHB1_GPIOD		3
16#define STM32F7_RCC_AHB1_GPIOE		4
17#define STM32F7_RCC_AHB1_GPIOF		5
18#define STM32F7_RCC_AHB1_GPIOG		6
19#define STM32F7_RCC_AHB1_GPIOH		7
20#define STM32F7_RCC_AHB1_GPIOI		8
21#define STM32F7_RCC_AHB1_GPIOJ		9
22#define STM32F7_RCC_AHB1_GPIOK		10
23#define STM32F7_RCC_AHB1_CRC		12
24#define STM32F7_RCC_AHB1_BKPSRAM	18
25#define STM32F7_RCC_AHB1_DTCMRAM	20
26#define STM32F7_RCC_AHB1_DMA1		21
27#define STM32F7_RCC_AHB1_DMA2		22
28#define STM32F7_RCC_AHB1_DMA2D		23
29#define STM32F7_RCC_AHB1_ETHMAC		25
30#define STM32F7_RCC_AHB1_ETHMACTX	26
31#define STM32F7_RCC_AHB1_ETHMACRX	27
32#define STM32FF_RCC_AHB1_ETHMACPTP	28
33#define STM32F7_RCC_AHB1_OTGHS		29
34#define STM32F7_RCC_AHB1_OTGHSULPI	30
35
36#define STM32F7_AHB1_RESET(bit) (STM32F7_RCC_AHB1_##bit + (0x10 * 8))
37#define STM32F7_AHB1_CLOCK(bit) (STM32F7_RCC_AHB1_##bit)
38
39
40/* AHB2 */
41#define STM32F7_RCC_AHB2_DCMI		0
42#define STM32F7_RCC_AHB2_CRYP		4
43#define STM32F7_RCC_AHB2_HASH		5
44#define STM32F7_RCC_AHB2_RNG		6
45#define STM32F7_RCC_AHB2_OTGFS		7
46
47#define STM32F7_AHB2_RESET(bit)	(STM32F7_RCC_AHB2_##bit + (0x14 * 8))
48#define STM32F7_AHB2_CLOCK(bit)	(STM32F7_RCC_AHB2_##bit + 0x20)
49
50/* AHB3 */
51#define STM32F7_RCC_AHB3_FMC		0
52#define STM32F7_RCC_AHB3_QSPI		1
53
54#define STM32F7_AHB3_RESET(bit)	(STM32F7_RCC_AHB3_##bit + (0x18 * 8))
55#define STM32F7_AHB3_CLOCK(bit)	(STM32F7_RCC_AHB3_##bit + 0x40)
56
57/* APB1 */
58#define STM32F7_RCC_APB1_TIM2		0
59#define STM32F7_RCC_APB1_TIM3		1
60#define STM32F7_RCC_APB1_TIM4		2
61#define STM32F7_RCC_APB1_TIM5		3
62#define STM32F7_RCC_APB1_TIM6		4
63#define STM32F7_RCC_APB1_TIM7		5
64#define STM32F7_RCC_APB1_TIM12		6
65#define STM32F7_RCC_APB1_TIM13		7
66#define STM32F7_RCC_APB1_TIM14		8
67#define STM32F7_RCC_APB1_LPTIM1		9
68#define STM32F7_RCC_APB1_WWDG		11
69#define STM32F7_RCC_APB1_SPI2		14
70#define STM32F7_RCC_APB1_SPI3		15
71#define STM32F7_RCC_APB1_SPDIFRX	16
72#define STM32F7_RCC_APB1_UART2		17
73#define STM32F7_RCC_APB1_UART3		18
74#define STM32F7_RCC_APB1_UART4		19
75#define STM32F7_RCC_APB1_UART5		20
76#define STM32F7_RCC_APB1_I2C1		21
77#define STM32F7_RCC_APB1_I2C2		22
78#define STM32F7_RCC_APB1_I2C3		23
79#define STM32F7_RCC_APB1_I2C4		24
80#define STM32F7_RCC_APB1_CAN1		25
81#define STM32F7_RCC_APB1_CAN2		26
82#define STM32F7_RCC_APB1_CEC		27
83#define STM32F7_RCC_APB1_PWR		28
84#define STM32F7_RCC_APB1_DAC		29
85#define STM32F7_RCC_APB1_UART7		30
86#define STM32F7_RCC_APB1_UART8		31
87
88#define STM32F7_APB1_RESET(bit)	(STM32F7_RCC_APB1_##bit + (0x20 * 8))
89#define STM32F7_APB1_CLOCK(bit)	(STM32F7_RCC_APB1_##bit + 0x80)
90
91/* APB2 */
92#define STM32F7_RCC_APB2_TIM1		0
93#define STM32F7_RCC_APB2_TIM8		1
94#define STM32F7_RCC_APB2_USART1		4
95#define STM32F7_RCC_APB2_USART6		5
96#define STM32F7_RCC_APB2_SDMMC2		7
97#define STM32F7_RCC_APB2_ADC1		8
98#define STM32F7_RCC_APB2_ADC2		9
99#define STM32F7_RCC_APB2_ADC3		10
100#define STM32F7_RCC_APB2_SDMMC1		11
101#define STM32F7_RCC_APB2_SPI1		12
102#define STM32F7_RCC_APB2_SPI4		13
103#define STM32F7_RCC_APB2_SYSCFG		14
104#define STM32F7_RCC_APB2_TIM9		16
105#define STM32F7_RCC_APB2_TIM10		17
106#define STM32F7_RCC_APB2_TIM11		18
107#define STM32F7_RCC_APB2_SPI5		20
108#define STM32F7_RCC_APB2_SPI6		21
109#define STM32F7_RCC_APB2_SAI1		22
110#define STM32F7_RCC_APB2_SAI2		23
111#define STM32F7_RCC_APB2_LTDC		26
112
113#define STM32F7_APB2_RESET(bit)	(STM32F7_RCC_APB2_##bit + (0x24 * 8))
114#define STM32F7_APB2_CLOCK(bit)	(STM32F7_RCC_APB2_##bit + 0xA0)
115
116#endif /* _DT_BINDINGS_MFD_STM32F7_RCC_H */
117