1/* $NetBSD: qcom,gcc-msm8939.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 3/* SPDX-License-Identifier: GPL-2.0-only */ 4/* 5 * Copyright 2020 Linaro Limited 6 */ 7 8#ifndef _DT_BINDINGS_CLK_MSM_GCC_8939_H 9#define _DT_BINDINGS_CLK_MSM_GCC_8939_H 10 11#define GPLL0 0 12#define GPLL0_VOTE 1 13#define BIMC_PLL 2 14#define BIMC_PLL_VOTE 3 15#define GPLL1 4 16#define GPLL1_VOTE 5 17#define GPLL2 6 18#define GPLL2_VOTE 7 19#define PCNOC_BFDCD_CLK_SRC 8 20#define SYSTEM_NOC_BFDCD_CLK_SRC 9 21#define CAMSS_AHB_CLK_SRC 10 22#define APSS_AHB_CLK_SRC 11 23#define CSI0_CLK_SRC 12 24#define CSI1_CLK_SRC 13 25#define GFX3D_CLK_SRC 14 26#define VFE0_CLK_SRC 15 27#define BLSP1_QUP1_I2C_APPS_CLK_SRC 16 28#define BLSP1_QUP1_SPI_APPS_CLK_SRC 17 29#define BLSP1_QUP2_I2C_APPS_CLK_SRC 18 30#define BLSP1_QUP2_SPI_APPS_CLK_SRC 19 31#define BLSP1_QUP3_I2C_APPS_CLK_SRC 20 32#define BLSP1_QUP3_SPI_APPS_CLK_SRC 21 33#define BLSP1_QUP4_I2C_APPS_CLK_SRC 22 34#define BLSP1_QUP4_SPI_APPS_CLK_SRC 23 35#define BLSP1_QUP5_I2C_APPS_CLK_SRC 24 36#define BLSP1_QUP5_SPI_APPS_CLK_SRC 25 37#define BLSP1_QUP6_I2C_APPS_CLK_SRC 26 38#define BLSP1_QUP6_SPI_APPS_CLK_SRC 27 39#define BLSP1_UART1_APPS_CLK_SRC 28 40#define BLSP1_UART2_APPS_CLK_SRC 29 41#define CCI_CLK_SRC 30 42#define CAMSS_GP0_CLK_SRC 31 43#define CAMSS_GP1_CLK_SRC 32 44#define JPEG0_CLK_SRC 33 45#define MCLK0_CLK_SRC 34 46#define MCLK1_CLK_SRC 35 47#define CSI0PHYTIMER_CLK_SRC 36 48#define CSI1PHYTIMER_CLK_SRC 37 49#define CPP_CLK_SRC 38 50#define CRYPTO_CLK_SRC 39 51#define GP1_CLK_SRC 40 52#define GP2_CLK_SRC 41 53#define GP3_CLK_SRC 42 54#define BYTE0_CLK_SRC 43 55#define ESC0_CLK_SRC 44 56#define MDP_CLK_SRC 45 57#define PCLK0_CLK_SRC 46 58#define VSYNC_CLK_SRC 47 59#define PDM2_CLK_SRC 48 60#define SDCC1_APPS_CLK_SRC 49 61#define SDCC2_APPS_CLK_SRC 50 62#define APSS_TCU_CLK_SRC 51 63#define USB_HS_SYSTEM_CLK_SRC 52 64#define VCODEC0_CLK_SRC 53 65#define GCC_BLSP1_AHB_CLK 54 66#define GCC_BLSP1_SLEEP_CLK 55 67#define GCC_BLSP1_QUP1_I2C_APPS_CLK 56 68#define GCC_BLSP1_QUP1_SPI_APPS_CLK 57 69#define GCC_BLSP1_QUP2_I2C_APPS_CLK 58 70#define GCC_BLSP1_QUP2_SPI_APPS_CLK 59 71#define GCC_BLSP1_QUP3_I2C_APPS_CLK 60 72#define GCC_BLSP1_QUP3_SPI_APPS_CLK 61 73#define GCC_BLSP1_QUP4_I2C_APPS_CLK 62 74#define GCC_BLSP1_QUP4_SPI_APPS_CLK 63 75#define GCC_BLSP1_QUP5_I2C_APPS_CLK 64 76#define GCC_BLSP1_QUP5_SPI_APPS_CLK 65 77#define GCC_BLSP1_QUP6_I2C_APPS_CLK 66 78#define GCC_BLSP1_QUP6_SPI_APPS_CLK 67 79#define GCC_BLSP1_UART1_APPS_CLK 68 80#define GCC_BLSP1_UART2_APPS_CLK 69 81#define GCC_BOOT_ROM_AHB_CLK 70 82#define GCC_CAMSS_CCI_AHB_CLK 71 83#define GCC_CAMSS_CCI_CLK 72 84#define GCC_CAMSS_CSI0_AHB_CLK 73 85#define GCC_CAMSS_CSI0_CLK 74 86#define GCC_CAMSS_CSI0PHY_CLK 75 87#define GCC_CAMSS_CSI0PIX_CLK 76 88#define GCC_CAMSS_CSI0RDI_CLK 77 89#define GCC_CAMSS_CSI1_AHB_CLK 78 90#define GCC_CAMSS_CSI1_CLK 79 91#define GCC_CAMSS_CSI1PHY_CLK 80 92#define GCC_CAMSS_CSI1PIX_CLK 81 93#define GCC_CAMSS_CSI1RDI_CLK 82 94#define GCC_CAMSS_CSI_VFE0_CLK 83 95#define GCC_CAMSS_GP0_CLK 84 96#define GCC_CAMSS_GP1_CLK 85 97#define GCC_CAMSS_ISPIF_AHB_CLK 86 98#define GCC_CAMSS_JPEG0_CLK 87 99#define GCC_CAMSS_JPEG_AHB_CLK 88 100#define GCC_CAMSS_JPEG_AXI_CLK 89 101#define GCC_CAMSS_MCLK0_CLK 90 102#define GCC_CAMSS_MCLK1_CLK 91 103#define GCC_CAMSS_MICRO_AHB_CLK 92 104#define GCC_CAMSS_CSI0PHYTIMER_CLK 93 105#define GCC_CAMSS_CSI1PHYTIMER_CLK 94 106#define GCC_CAMSS_AHB_CLK 95 107#define GCC_CAMSS_TOP_AHB_CLK 96 108#define GCC_CAMSS_CPP_AHB_CLK 97 109#define GCC_CAMSS_CPP_CLK 98 110#define GCC_CAMSS_VFE0_CLK 99 111#define GCC_CAMSS_VFE_AHB_CLK 100 112#define GCC_CAMSS_VFE_AXI_CLK 101 113#define GCC_CRYPTO_AHB_CLK 102 114#define GCC_CRYPTO_AXI_CLK 103 115#define GCC_CRYPTO_CLK 104 116#define GCC_OXILI_GMEM_CLK 105 117#define GCC_GP1_CLK 106 118#define GCC_GP2_CLK 107 119#define GCC_GP3_CLK 108 120#define GCC_MDSS_AHB_CLK 109 121#define GCC_MDSS_AXI_CLK 110 122#define GCC_MDSS_BYTE0_CLK 111 123#define GCC_MDSS_ESC0_CLK 112 124#define GCC_MDSS_MDP_CLK 113 125#define GCC_MDSS_PCLK0_CLK 114 126#define GCC_MDSS_VSYNC_CLK 115 127#define GCC_MSS_CFG_AHB_CLK 116 128#define GCC_OXILI_AHB_CLK 117 129#define GCC_OXILI_GFX3D_CLK 118 130#define GCC_PDM2_CLK 119 131#define GCC_PDM_AHB_CLK 120 132#define GCC_PRNG_AHB_CLK 121 133#define GCC_SDCC1_AHB_CLK 122 134#define GCC_SDCC1_APPS_CLK 123 135#define GCC_SDCC2_AHB_CLK 124 136#define GCC_SDCC2_APPS_CLK 125 137#define GCC_GTCU_AHB_CLK 126 138#define GCC_JPEG_TBU_CLK 127 139#define GCC_MDP_TBU_CLK 128 140#define GCC_SMMU_CFG_CLK 129 141#define GCC_VENUS_TBU_CLK 130 142#define GCC_VFE_TBU_CLK 131 143#define GCC_USB2A_PHY_SLEEP_CLK 132 144#define GCC_USB_HS_AHB_CLK 133 145#define GCC_USB_HS_SYSTEM_CLK 134 146#define GCC_VENUS0_AHB_CLK 135 147#define GCC_VENUS0_AXI_CLK 136 148#define GCC_VENUS0_VCODEC0_CLK 137 149#define BIMC_DDR_CLK_SRC 138 150#define GCC_APSS_TCU_CLK 139 151#define GCC_GFX_TCU_CLK 140 152#define BIMC_GPU_CLK_SRC 141 153#define GCC_BIMC_GFX_CLK 142 154#define GCC_BIMC_GPU_CLK 143 155#define ULTAUDIO_LPAIF_PRI_I2S_CLK_SRC 144 156#define ULTAUDIO_LPAIF_SEC_I2S_CLK_SRC 145 157#define ULTAUDIO_LPAIF_AUX_I2S_CLK_SRC 146 158#define ULTAUDIO_XO_CLK_SRC 147 159#define ULTAUDIO_AHBFABRIC_CLK_SRC 148 160#define CODEC_DIGCODEC_CLK_SRC 149 161#define GCC_ULTAUDIO_PCNOC_MPORT_CLK 150 162#define GCC_ULTAUDIO_PCNOC_SWAY_CLK 151 163#define GCC_ULTAUDIO_AVSYNC_XO_CLK 152 164#define GCC_ULTAUDIO_STC_XO_CLK 153 165#define GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK 154 166#define GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_LPM_CLK 155 167#define GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK 156 168#define GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK 157 169#define GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK 158 170#define GCC_CODEC_DIGCODEC_CLK 159 171#define GCC_MSS_Q6_BIMC_AXI_CLK 160 172#define GPLL3 161 173#define GPLL3_VOTE 162 174#define GPLL4 163 175#define GPLL4_VOTE 164 176#define GPLL5 165 177#define GPLL5_VOTE 166 178#define GPLL6 167 179#define GPLL6_VOTE 168 180#define BYTE1_CLK_SRC 169 181#define GCC_MDSS_BYTE1_CLK 170 182#define ESC1_CLK_SRC 171 183#define GCC_MDSS_ESC1_CLK 172 184#define PCLK1_CLK_SRC 173 185#define GCC_MDSS_PCLK1_CLK 174 186#define GCC_GFX_TBU_CLK 175 187#define GCC_CPP_TBU_CLK 176 188#define GCC_MDP_RT_TBU_CLK 177 189#define USB_FS_SYSTEM_CLK_SRC 178 190#define USB_FS_IC_CLK_SRC 179 191#define GCC_USB_FS_AHB_CLK 180 192#define GCC_USB_FS_IC_CLK 181 193#define GCC_USB_FS_SYSTEM_CLK 182 194#define GCC_VENUS0_CORE0_VCODEC0_CLK 183 195#define GCC_VENUS0_CORE1_VCODEC0_CLK 184 196#define GCC_OXILI_TIMER_CLK 185 197 198/* Indexes for GDSCs */ 199#define BIMC_GDSC 0 200#define VENUS_GDSC 1 201#define MDSS_GDSC 2 202#define JPEG_GDSC 3 203#define VFE_GDSC 4 204#define OXILI_GDSC 5 205#define VENUS_CORE0_GDSC 6 206#define VENUS_CORE1_GDSC 7 207 208#endif 209