ttm_placement.h revision 1.2
1/* $NetBSD: ttm_placement.h,v 1.2 2018/08/27 04:58:38 riastradh Exp $ */ 2 3/************************************************************************** 4 * 5 * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA 6 * All Rights Reserved. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the 10 * "Software"), to deal in the Software without restriction, including 11 * without limitation the rights to use, copy, modify, merge, publish, 12 * distribute, sub license, and/or sell copies of the Software, and to 13 * permit persons to whom the Software is furnished to do so, subject to 14 * the following conditions: 15 * 16 * The above copyright notice and this permission notice (including the 17 * next paragraph) shall be included in all copies or substantial portions 18 * of the Software. 19 * 20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 22 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 23 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 24 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 25 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 26 * USE OR OTHER DEALINGS IN THE SOFTWARE. 27 * 28 **************************************************************************/ 29/* 30 * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> 31 */ 32 33#ifndef _TTM_PLACEMENT_H_ 34#define _TTM_PLACEMENT_H_ 35/* 36 * Memory regions for data placement. 37 */ 38 39#define TTM_PL_SYSTEM 0 40#define TTM_PL_TT 1 41#define TTM_PL_VRAM 2 42#define TTM_PL_PRIV0 3 43#define TTM_PL_PRIV1 4 44#define TTM_PL_PRIV2 5 45#define TTM_PL_PRIV3 6 46#define TTM_PL_PRIV4 7 47#define TTM_PL_PRIV5 8 48#define TTM_PL_SWAPPED 15 49 50#define TTM_PL_FLAG_SYSTEM (1 << TTM_PL_SYSTEM) 51#define TTM_PL_FLAG_TT (1 << TTM_PL_TT) 52#define TTM_PL_FLAG_VRAM (1 << TTM_PL_VRAM) 53#define TTM_PL_FLAG_PRIV0 (1 << TTM_PL_PRIV0) 54#define TTM_PL_FLAG_PRIV1 (1 << TTM_PL_PRIV1) 55#define TTM_PL_FLAG_PRIV2 (1 << TTM_PL_PRIV2) 56#define TTM_PL_FLAG_PRIV3 (1 << TTM_PL_PRIV3) 57#define TTM_PL_FLAG_PRIV4 (1 << TTM_PL_PRIV4) 58#define TTM_PL_FLAG_PRIV5 (1 << TTM_PL_PRIV5) 59#define TTM_PL_FLAG_SWAPPED (1 << TTM_PL_SWAPPED) 60#define TTM_PL_MASK_MEM 0x0000FFFF 61 62/* 63 * Other flags that affects data placement. 64 * TTM_PL_FLAG_CACHED indicates cache-coherent mappings 65 * if available. 66 * TTM_PL_FLAG_SHARED means that another application may 67 * reference the buffer. 68 * TTM_PL_FLAG_NO_EVICT means that the buffer may never 69 * be evicted to make room for other buffers. 70 * TTM_PL_FLAG_TOPDOWN requests to be placed from the 71 * top of the memory area, instead of the bottom. 72 */ 73 74#define TTM_PL_FLAG_CACHED (1 << 16) 75#define TTM_PL_FLAG_UNCACHED (1 << 17) 76#define TTM_PL_FLAG_WC (1 << 18) 77#define TTM_PL_FLAG_SHARED (1 << 20) 78#define TTM_PL_FLAG_NO_EVICT (1 << 21) 79#define TTM_PL_FLAG_TOPDOWN (1 << 22) 80 81#define TTM_PL_MASK_CACHING (TTM_PL_FLAG_CACHED | \ 82 TTM_PL_FLAG_UNCACHED | \ 83 TTM_PL_FLAG_WC) 84 85#define TTM_PL_MASK_MEMTYPE (TTM_PL_MASK_MEM | TTM_PL_MASK_CACHING) 86 87/* 88 * Access flags to be used for CPU- and GPU- mappings. 89 * The idea is that the TTM synchronization mechanism will 90 * allow concurrent READ access and exclusive write access. 91 * Currently GPU- and CPU accesses are exclusive. 92 */ 93 94#define TTM_ACCESS_READ (1 << 0) 95#define TTM_ACCESS_WRITE (1 << 1) 96 97#endif 98