r600_reg.h revision 1.2
1/* $NetBSD: r600_reg.h,v 1.2 2018/08/27 04:58:36 riastradh Exp $ */ 2 3/* 4 * Copyright 2008 Advanced Micro Devices, Inc. 5 * Copyright 2008 Red Hat Inc. 6 * Copyright 2009 Jerome Glisse. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 24 * OTHER DEALINGS IN THE SOFTWARE. 25 * 26 * Authors: Dave Airlie 27 * Alex Deucher 28 * Jerome Glisse 29 */ 30#ifndef __R600_REG_H__ 31#define __R600_REG_H__ 32 33#define R600_PCIE_PORT_INDEX 0x0038 34#define R600_PCIE_PORT_DATA 0x003c 35 36#define R600_RCU_INDEX 0x0100 37#define R600_RCU_DATA 0x0104 38 39#define R600_UVD_CTX_INDEX 0xf4a0 40#define R600_UVD_CTX_DATA 0xf4a4 41 42#define R600_MC_VM_FB_LOCATION 0x2180 43#define R600_MC_FB_BASE_MASK 0x0000FFFF 44#define R600_MC_FB_BASE_SHIFT 0 45#define R600_MC_FB_TOP_MASK 0xFFFF0000 46#define R600_MC_FB_TOP_SHIFT 16 47#define R600_MC_VM_AGP_TOP 0x2184 48#define R600_MC_AGP_TOP_MASK 0x0003FFFF 49#define R600_MC_AGP_TOP_SHIFT 0 50#define R600_MC_VM_AGP_BOT 0x2188 51#define R600_MC_AGP_BOT_MASK 0x0003FFFF 52#define R600_MC_AGP_BOT_SHIFT 0 53#define R600_MC_VM_AGP_BASE 0x218c 54#define R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2190 55#define R600_LOGICAL_PAGE_NUMBER_MASK 0x000FFFFF 56#define R600_LOGICAL_PAGE_NUMBER_SHIFT 0 57#define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2194 58#define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x2198 59 60#define R700_MC_VM_FB_LOCATION 0x2024 61#define R700_MC_FB_BASE_MASK 0x0000FFFF 62#define R700_MC_FB_BASE_SHIFT 0 63#define R700_MC_FB_TOP_MASK 0xFFFF0000 64#define R700_MC_FB_TOP_SHIFT 16 65#define R700_MC_VM_AGP_TOP 0x2028 66#define R700_MC_AGP_TOP_MASK 0x0003FFFF 67#define R700_MC_AGP_TOP_SHIFT 0 68#define R700_MC_VM_AGP_BOT 0x202c 69#define R700_MC_AGP_BOT_MASK 0x0003FFFF 70#define R700_MC_AGP_BOT_SHIFT 0 71#define R700_MC_VM_AGP_BASE 0x2030 72#define R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034 73#define R700_LOGICAL_PAGE_NUMBER_MASK 0x000FFFFF 74#define R700_LOGICAL_PAGE_NUMBER_SHIFT 0 75#define R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038 76#define R700_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203c 77 78#define R600_RAMCFG 0x2408 79# define R600_CHANSIZE (1 << 7) 80# define R600_CHANSIZE_OVERRIDE (1 << 10) 81 82 83#define R600_GENERAL_PWRMGT 0x618 84# define R600_OPEN_DRAIN_PADS (1 << 11) 85 86#define R600_LOWER_GPIO_ENABLE 0x710 87#define R600_CTXSW_VID_LOWER_GPIO_CNTL 0x718 88#define R600_HIGH_VID_LOWER_GPIO_CNTL 0x71c 89#define R600_MEDIUM_VID_LOWER_GPIO_CNTL 0x720 90#define R600_LOW_VID_LOWER_GPIO_CNTL 0x724 91 92#define R600_D1GRPH_SWAP_CONTROL 0x610C 93# define R600_D1GRPH_SWAP_ENDIAN_NONE (0 << 0) 94# define R600_D1GRPH_SWAP_ENDIAN_16BIT (1 << 0) 95# define R600_D1GRPH_SWAP_ENDIAN_32BIT (2 << 0) 96# define R600_D1GRPH_SWAP_ENDIAN_64BIT (3 << 0) 97 98#define R600_HDP_NONSURFACE_BASE 0x2c04 99 100#define R600_BUS_CNTL 0x5420 101# define R600_BIOS_ROM_DIS (1 << 1) 102#define R600_CONFIG_CNTL 0x5424 103#define R600_CONFIG_MEMSIZE 0x5428 104#define R600_CONFIG_F0_BASE 0x542C 105#define R600_CONFIG_APER_SIZE 0x5430 106 107#define R600_BIF_FB_EN 0x5490 108#define R600_FB_READ_EN (1 << 0) 109#define R600_FB_WRITE_EN (1 << 1) 110 111#define R600_CITF_CNTL 0x200c 112#define R600_BLACKOUT_MASK 0x00000003 113 114#define R700_MC_CITF_CNTL 0x25c0 115 116#define R600_ROM_CNTL 0x1600 117# define R600_SCK_OVERWRITE (1 << 1) 118# define R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT 28 119# define R600_SCK_PRESCALE_CRYSTAL_CLK_MASK (0xf << 28) 120 121#define R600_CG_SPLL_FUNC_CNTL 0x600 122# define R600_SPLL_BYPASS_EN (1 << 3) 123#define R600_CG_SPLL_STATUS 0x60c 124# define R600_SPLL_CHG_STATUS (1 << 1) 125 126#define R600_BIOS_0_SCRATCH 0x1724 127#define R600_BIOS_1_SCRATCH 0x1728 128#define R600_BIOS_2_SCRATCH 0x172c 129#define R600_BIOS_3_SCRATCH 0x1730 130#define R600_BIOS_4_SCRATCH 0x1734 131#define R600_BIOS_5_SCRATCH 0x1738 132#define R600_BIOS_6_SCRATCH 0x173c 133#define R600_BIOS_7_SCRATCH 0x1740 134 135/* Audio, these regs were reverse enginered, 136 * so the chance is high that the naming is wrong 137 * R6xx+ ??? */ 138 139/* Audio clocks */ 140#define R600_AUDIO_PLL1_MUL 0x0514 141#define R600_AUDIO_PLL1_DIV 0x0518 142#define R600_AUDIO_PLL2_MUL 0x0524 143#define R600_AUDIO_PLL2_DIV 0x0528 144#define R600_AUDIO_CLK_SRCSEL 0x0534 145 146/* Audio general */ 147#define R600_AUDIO_ENABLE 0x7300 148#define R600_AUDIO_TIMING 0x7344 149 150/* Audio params */ 151#define R600_AUDIO_VENDOR_ID 0x7380 152#define R600_AUDIO_REVISION_ID 0x7384 153#define R600_AUDIO_ROOT_NODE_COUNT 0x7388 154#define R600_AUDIO_NID1_NODE_COUNT 0x738c 155#define R600_AUDIO_NID1_TYPE 0x7390 156#define R600_AUDIO_SUPPORTED_SIZE_RATE 0x7394 157#define R600_AUDIO_SUPPORTED_CODEC 0x7398 158#define R600_AUDIO_SUPPORTED_POWER_STATES 0x739c 159#define R600_AUDIO_NID2_CAPS 0x73a0 160#define R600_AUDIO_NID3_CAPS 0x73a4 161#define R600_AUDIO_NID3_PIN_CAPS 0x73a8 162 163/* Audio conn list */ 164#define R600_AUDIO_CONN_LIST_LEN 0x73ac 165#define R600_AUDIO_CONN_LIST 0x73b0 166 167/* Audio verbs */ 168#define R600_AUDIO_RATE_BPS_CHANNEL 0x73c0 169#define R600_AUDIO_PLAYING 0x73c4 170#define R600_AUDIO_IMPLEMENTATION_ID 0x73c8 171#define R600_AUDIO_CONFIG_DEFAULT 0x73cc 172#define R600_AUDIO_PIN_SENSE 0x73d0 173#define R600_AUDIO_PIN_WIDGET_CNTL 0x73d4 174#define R600_AUDIO_STATUS_BITS 0x73d8 175 176#define DCE2_HDMI_OFFSET0 (0x7400 - 0x7400) 177#define DCE2_HDMI_OFFSET1 (0x7700 - 0x7400) 178/* DCE3.2 second instance starts at 0x7800 */ 179#define DCE3_HDMI_OFFSET0 (0x7400 - 0x7400) 180#define DCE3_HDMI_OFFSET1 (0x7800 - 0x7400) 181 182#endif 183