1/*	$NetBSD: nouveau_nvkm_subdev_timer_nv40.c,v 1.3 2021/12/18 23:45:42 riastradh Exp $	*/
2
3/*
4 * Copyright 2012 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs
25 */
26#include <sys/cdefs.h>
27__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_timer_nv40.c,v 1.3 2021/12/18 23:45:42 riastradh Exp $");
28
29#include "priv.h"
30#include "regsnv04.h"
31
32static void
33nv40_timer_init(struct nvkm_timer *tmr)
34{
35	struct nvkm_subdev *subdev = &tmr->subdev;
36	struct nvkm_device *device = subdev->device;
37	u32 f = 0; /*XXX: figure this out */
38	u32 n, d;
39
40	/* aim for 31.25MHz, which gives us nanosecond timestamps */
41	d = 1000000 / 32;
42	n = f;
43
44	if (!f) {
45		n = nvkm_rd32(device, NV04_PTIMER_NUMERATOR);
46		d = nvkm_rd32(device, NV04_PTIMER_DENOMINATOR);
47		if (!n || !d) {
48			n = 1;
49			d = 1;
50		}
51		nvkm_warn(subdev, "unknown input clock freq\n");
52	}
53
54	/* reduce ratio to acceptable values */
55	while (((n % 5) == 0) && ((d % 5) == 0)) {
56		n /= 5;
57		d /= 5;
58	}
59
60	while (((n % 2) == 0) && ((d % 2) == 0)) {
61		n /= 2;
62		d /= 2;
63	}
64
65	while (n > 0xffff || d > 0xffff) {
66		n >>= 1;
67		d >>= 1;
68	}
69
70	nvkm_debug(subdev, "input frequency : %dHz\n", f);
71	nvkm_debug(subdev, "numerator       : %08x\n", n);
72	nvkm_debug(subdev, "denominator     : %08x\n", d);
73	nvkm_debug(subdev, "timer frequency : %dHz\n", f * d / n);
74
75	nvkm_wr32(device, NV04_PTIMER_NUMERATOR, n);
76	nvkm_wr32(device, NV04_PTIMER_DENOMINATOR, d);
77}
78
79static const struct nvkm_timer_func
80nv40_timer = {
81	.init = nv40_timer_init,
82	.intr = nv04_timer_intr,
83	.read = nv04_timer_read,
84	.time = nv04_timer_time,
85	.alarm_init = nv04_timer_alarm_init,
86	.alarm_fini = nv04_timer_alarm_fini,
87};
88
89int
90nv40_timer_new(struct nvkm_device *device, int index, struct nvkm_timer **ptmr)
91{
92	return nvkm_timer_new_(&nv40_timer, device, index, ptmr);
93}
94