1/* $NetBSD: nouveau_nvkm_subdev_ltc_gp10b.c,v 1.3 2021/12/19 10:51:58 riastradh Exp $ */ 2 3/* 4 * Copyright (c) 2019 NVIDIA Corporation. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Thierry Reding 25 */ 26 27#include <sys/cdefs.h> 28__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_ltc_gp10b.c,v 1.3 2021/12/19 10:51:58 riastradh Exp $"); 29 30#include "priv.h" 31 32static void 33gp10b_ltc_init(struct nvkm_ltc *ltc) 34{ 35 struct nvkm_device *device = ltc->subdev.device; 36 struct iommu_fwspec *spec; 37 38 nvkm_wr32(device, 0x17e27c, ltc->ltc_nr); 39 nvkm_wr32(device, 0x17e000, ltc->ltc_nr); 40 nvkm_wr32(device, 0x100800, ltc->ltc_nr); 41 42#ifdef __NetBSD__ /* XXX arm64 iort smmu iommu */ 43 __USE(spec); 44#else 45 spec = dev_iommu_fwspec_get(device->dev); 46 if (spec) { 47 u32 sid = spec->ids[0] & 0xffff; 48 49 /* stream ID */ 50 nvkm_wr32(device, 0x160000, sid << 2); 51 } 52#endif 53} 54 55static const struct nvkm_ltc_func 56gp10b_ltc = { 57 .oneinit = gp100_ltc_oneinit, 58 .init = gp10b_ltc_init, 59 .intr = gp100_ltc_intr, 60 .cbc_clear = gm107_ltc_cbc_clear, 61 .cbc_wait = gm107_ltc_cbc_wait, 62 .zbc = 16, 63 .zbc_clear_color = gm107_ltc_zbc_clear_color, 64 .zbc_clear_depth = gm107_ltc_zbc_clear_depth, 65 .zbc_clear_stencil = gp102_ltc_zbc_clear_stencil, 66 .invalidate = gf100_ltc_invalidate, 67 .flush = gf100_ltc_flush, 68}; 69 70int 71gp10b_ltc_new(struct nvkm_device *device, int index, struct nvkm_ltc **pltc) 72{ 73 return nvkm_ltc_new_(&gp10b_ltc, device, index, pltc); 74} 75