nouveau_nvkm_subdev_ltc_gm107.c revision 1.2
1/*	$NetBSD: nouveau_nvkm_subdev_ltc_gm107.c,v 1.2 2018/08/27 04:58:34 riastradh Exp $	*/
2
3/*
4 * Copyright 2014 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs
25 */
26#include <sys/cdefs.h>
27__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_ltc_gm107.c,v 1.2 2018/08/27 04:58:34 riastradh Exp $");
28
29#include "priv.h"
30
31#include <subdev/fb.h>
32#include <subdev/timer.h>
33
34static void
35gm107_ltc_cbc_clear(struct nvkm_ltc *ltc, u32 start, u32 limit)
36{
37	struct nvkm_device *device = ltc->subdev.device;
38	nvkm_wr32(device, 0x17e270, start);
39	nvkm_wr32(device, 0x17e274, limit);
40	nvkm_wr32(device, 0x17e26c, 0x00000004);
41}
42
43static void
44gm107_ltc_cbc_wait(struct nvkm_ltc *ltc)
45{
46	struct nvkm_device *device = ltc->subdev.device;
47	int c, s;
48	for (c = 0; c < ltc->ltc_nr; c++) {
49		for (s = 0; s < ltc->lts_nr; s++) {
50			const u32 addr = 0x14046c + (c * 0x2000) + (s * 0x200);
51			nvkm_msec(device, 2000,
52				if (!nvkm_rd32(device, addr))
53					break;
54			);
55		}
56	}
57}
58
59static void
60gm107_ltc_zbc_clear_color(struct nvkm_ltc *ltc, int i, const u32 color[4])
61{
62	struct nvkm_device *device = ltc->subdev.device;
63	nvkm_mask(device, 0x17e338, 0x0000000f, i);
64	nvkm_wr32(device, 0x17e33c, color[0]);
65	nvkm_wr32(device, 0x17e340, color[1]);
66	nvkm_wr32(device, 0x17e344, color[2]);
67	nvkm_wr32(device, 0x17e348, color[3]);
68}
69
70static void
71gm107_ltc_zbc_clear_depth(struct nvkm_ltc *ltc, int i, const u32 depth)
72{
73	struct nvkm_device *device = ltc->subdev.device;
74	nvkm_mask(device, 0x17e338, 0x0000000f, i);
75	nvkm_wr32(device, 0x17e34c, depth);
76}
77
78static void
79gm107_ltc_lts_isr(struct nvkm_ltc *ltc, int c, int s)
80{
81	struct nvkm_subdev *subdev = &ltc->subdev;
82	struct nvkm_device *device = subdev->device;
83	u32 base = 0x140000 + (c * 0x2000) + (s * 0x400);
84	u32 stat = nvkm_rd32(device, base + 0x00c);
85
86	if (stat) {
87		nvkm_error(subdev, "LTC%d_LTS%d: %08x\n", c, s, stat);
88		nvkm_wr32(device, base + 0x00c, stat);
89	}
90}
91
92static void
93gm107_ltc_intr(struct nvkm_ltc *ltc)
94{
95	struct nvkm_device *device = ltc->subdev.device;
96	u32 mask;
97
98	mask = nvkm_rd32(device, 0x00017c);
99	while (mask) {
100		u32 s, c = __ffs(mask);
101		for (s = 0; s < ltc->lts_nr; s++)
102			gm107_ltc_lts_isr(ltc, c, s);
103		mask &= ~(1 << c);
104	}
105}
106
107static int
108gm107_ltc_oneinit(struct nvkm_ltc *ltc)
109{
110	struct nvkm_device *device = ltc->subdev.device;
111	const u32 parts = nvkm_rd32(device, 0x022438);
112	const u32  mask = nvkm_rd32(device, 0x021c14);
113	const u32 slice = nvkm_rd32(device, 0x17e280) >> 28;
114	int i;
115
116	for (i = 0; i < parts; i++) {
117		if (!(mask & (1 << i)))
118			ltc->ltc_nr++;
119	}
120	ltc->lts_nr = slice;
121
122	return gf100_ltc_oneinit_tag_ram(ltc);
123}
124
125static void
126gm107_ltc_init(struct nvkm_ltc *ltc)
127{
128	struct nvkm_device *device = ltc->subdev.device;
129	u32 lpg128 = !(nvkm_rd32(device, 0x100c80) & 0x00000001);
130
131	nvkm_wr32(device, 0x17e27c, ltc->ltc_nr);
132	nvkm_wr32(device, 0x17e278, ltc->tag_base);
133	nvkm_mask(device, 0x17e264, 0x00000002, lpg128 ? 0x00000002 : 0x00000000);
134}
135
136static const struct nvkm_ltc_func
137gm107_ltc = {
138	.oneinit = gm107_ltc_oneinit,
139	.init = gm107_ltc_init,
140	.intr = gm107_ltc_intr,
141	.cbc_clear = gm107_ltc_cbc_clear,
142	.cbc_wait = gm107_ltc_cbc_wait,
143	.zbc = 16,
144	.zbc_clear_color = gm107_ltc_zbc_clear_color,
145	.zbc_clear_depth = gm107_ltc_zbc_clear_depth,
146	.invalidate = gf100_ltc_invalidate,
147	.flush = gf100_ltc_flush,
148};
149
150int
151gm107_ltc_new(struct nvkm_device *device, int index, struct nvkm_ltc **pltc)
152{
153	return nvkm_ltc_new_(&gm107_ltc, device, index, pltc);
154}
155