1/* $NetBSD: nouveau_nvkm_engine_sw_nv50.c,v 1.3 2021/12/18 23:45:37 riastradh Exp $ */ 2 3/* 4 * Copyright 2012 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Ben Skeggs 25 */ 26#include <sys/cdefs.h> 27__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_sw_nv50.c,v 1.3 2021/12/18 23:45:37 riastradh Exp $"); 28 29#include "nv50.h" 30 31#include <core/gpuobj.h> 32#include <engine/disp.h> 33#include <engine/fifo/chan.h> 34#include <subdev/bar.h> 35 36#include <nvif/class.h> 37#include <nvif/event.h> 38 39/******************************************************************************* 40 * software context 41 ******************************************************************************/ 42 43static int 44nv50_sw_chan_vblsem_release(struct nvkm_notify *notify) 45{ 46 struct nv50_sw_chan *chan = 47 container_of(notify, typeof(*chan), vblank.notify[notify->index]); 48 struct nvkm_sw *sw = chan->base.sw; 49 struct nvkm_device *device = sw->engine.subdev.device; 50 51 nvkm_wr32(device, 0x001704, chan->base.fifo->inst->addr >> 12); 52 nvkm_wr32(device, 0x001710, 0x80000000 | chan->vblank.ctxdma); 53 nvkm_bar_flush(device->bar); 54 55 if (device->chipset == 0x50) { 56 nvkm_wr32(device, 0x001570, chan->vblank.offset); 57 nvkm_wr32(device, 0x001574, chan->vblank.value); 58 } else { 59 nvkm_wr32(device, 0x060010, chan->vblank.offset); 60 nvkm_wr32(device, 0x060014, chan->vblank.value); 61 } 62 63 return NVKM_NOTIFY_DROP; 64} 65 66static bool 67nv50_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data) 68{ 69 struct nv50_sw_chan *chan = nv50_sw_chan(base); 70 struct nvkm_engine *engine = chan->base.object.engine; 71 struct nvkm_device *device = engine->subdev.device; 72 switch (mthd) { 73 case 0x018c: chan->vblank.ctxdma = data; return true; 74 case 0x0400: chan->vblank.offset = data; return true; 75 case 0x0404: chan->vblank.value = data; return true; 76 case 0x0408: 77 if (data < device->disp->vblank.index_nr) { 78 nvkm_notify_get(&chan->vblank.notify[data]); 79 return true; 80 } 81 break; 82 default: 83 break; 84 } 85 return false; 86} 87 88void * 89nv50_sw_chan_dtor(struct nvkm_sw_chan *base) 90{ 91 struct nv50_sw_chan *chan = nv50_sw_chan(base); 92 int i; 93 for (i = 0; i < ARRAY_SIZE(chan->vblank.notify); i++) 94 nvkm_notify_fini(&chan->vblank.notify[i]); 95 return chan; 96} 97 98static const struct nvkm_sw_chan_func 99nv50_sw_chan = { 100 .dtor = nv50_sw_chan_dtor, 101 .mthd = nv50_sw_chan_mthd, 102}; 103 104static int 105nv50_sw_chan_new(struct nvkm_sw *sw, struct nvkm_fifo_chan *fifoch, 106 const struct nvkm_oclass *oclass, struct nvkm_object **pobject) 107{ 108 struct nvkm_disp *disp = sw->engine.subdev.device->disp; 109 struct nv50_sw_chan *chan; 110 int ret, i; 111 112 if (!(chan = kzalloc(sizeof(*chan), GFP_KERNEL))) 113 return -ENOMEM; 114 *pobject = &chan->base.object; 115 116 ret = nvkm_sw_chan_ctor(&nv50_sw_chan, sw, fifoch, oclass, &chan->base); 117 if (ret) 118 return ret; 119 120 for (i = 0; disp && i < disp->vblank.index_nr; i++) { 121 ret = nvkm_notify_init(NULL, &disp->vblank, 122 nv50_sw_chan_vblsem_release, false, 123 &(struct nvif_notify_head_req_v0) { 124 .head = i, 125 }, 126 sizeof(struct nvif_notify_head_req_v0), 127 sizeof(struct nvif_notify_head_rep_v0), 128 &chan->vblank.notify[i]); 129 if (ret) 130 return ret; 131 } 132 133 return 0; 134} 135 136/******************************************************************************* 137 * software engine/subdev functions 138 ******************************************************************************/ 139 140static const struct nvkm_sw_func 141nv50_sw = { 142 .chan_new = nv50_sw_chan_new, 143 .sclass = { 144 { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV50 } }, 145 {} 146 } 147}; 148 149int 150nv50_sw_new(struct nvkm_device *device, int index, struct nvkm_sw **psw) 151{ 152 return nvkm_sw_new_(&nv50_sw, device, index, psw); 153} 154