nouveau_nvkm_engine_sec_g98.c revision 1.3 
1/*	$NetBSD: nouveau_nvkm_engine_sec_g98.c,v 1.3 2021/12/18 23:45:37 riastradh Exp $	*/
2
3/*
4 * Copyright 2012 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs
25 */
26#include <sys/cdefs.h>
27__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_sec_g98.c,v 1.3 2021/12/18 23:45:37 riastradh Exp $");
28
29#include <engine/sec.h>
30#include <engine/fifo.h>
31#include "fuc/g98.fuc0s.h"
32
33#include <core/client.h>
34#include <core/enum.h>
35#include <core/gpuobj.h>
36
37#include <nvif/class.h>
38
39static const struct nvkm_enum g98_sec_isr_error_name[] = {
40	{ 0x0000, "ILLEGAL_MTHD" },
41	{ 0x0001, "INVALID_BITFIELD" },
42	{ 0x0002, "INVALID_ENUM" },
43	{ 0x0003, "QUERY" },
44	{}
45};
46
47static void
48g98_sec_intr(struct nvkm_falcon *sec, struct nvkm_fifo_chan *chan)
49{
50	struct nvkm_subdev *subdev = &sec->engine.subdev;
51	struct nvkm_device *device = subdev->device;
52	u32 ssta = nvkm_rd32(device, 0x087040) & 0x0000ffff;
53	u32 addr = nvkm_rd32(device, 0x087040) >> 16;
54	u32 mthd = (addr & 0x07ff) << 2;
55	u32 subc = (addr & 0x3800) >> 11;
56	u32 data = nvkm_rd32(device, 0x087044);
57	const struct nvkm_enum *en =
58		nvkm_enum_find(g98_sec_isr_error_name, ssta);
59
60	nvkm_error(subdev, "DISPATCH_ERROR %04x [%s] ch %d [%010"PRIx64" %s] "
61			   "subc %d mthd %04x data %08x\n", ssta,
62		   en ? en->name : "UNKNOWN", chan ? chan->chid : -1,
63		   chan ? chan->inst->addr : 0,
64		   chan ? chan->object.client->name : "unknown",
65		   subc, mthd, data);
66}
67
68static const struct nvkm_falcon_func
69g98_sec = {
70	.code.data = g98_sec_code,
71	.code.size = sizeof(g98_sec_code),
72	.data.data = g98_sec_data,
73	.data.size = sizeof(g98_sec_data),
74	.intr = g98_sec_intr,
75	.sclass = {
76		{ -1, -1, G98_SEC },
77		{}
78	}
79};
80
81int
82g98_sec_new(struct nvkm_device *device, int index,
83	    struct nvkm_engine **pengine)
84{
85	return nvkm_falcon_new_(&g98_sec, device, index,
86				true, 0x087000, pengine);
87}
88