1/* $NetBSD: nouveau_nvkm_engine_pm_nv50.c,v 1.3 2021/12/18 23:45:37 riastradh Exp $ */ 2 3/* 4 * Copyright 2013 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Ben Skeggs 25 */ 26#include <sys/cdefs.h> 27__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_pm_nv50.c,v 1.3 2021/12/18 23:45:37 riastradh Exp $"); 28 29#include "nv40.h" 30 31const struct nvkm_specsrc 32nv50_zcull_sources[] = { 33 { 0x402ca4, (const struct nvkm_specmux[]) { 34 { 0x7fff, 0, "unk0" }, 35 {} 36 }, "pgraph_zcull_pm_unka4" }, 37 {} 38}; 39 40const struct nvkm_specsrc 41nv50_zrop_sources[] = { 42 { 0x40708c, (const struct nvkm_specmux[]) { 43 { 0xf, 0, "sel0", true }, 44 { 0xf, 16, "sel1", true }, 45 {} 46 }, "pgraph_rop0_zrop_pm_mux" }, 47 {} 48}; 49 50static const struct nvkm_specsrc 51nv50_prop_sources[] = { 52 { 0x40be50, (const struct nvkm_specmux[]) { 53 { 0x1f, 0, "sel", true }, 54 {} 55 }, "pgraph_tpc3_prop_pm_mux" }, 56 {} 57}; 58 59static const struct nvkm_specsrc 60nv50_crop_sources[] = { 61 { 0x407008, (const struct nvkm_specmux[]) { 62 { 0x7, 0, "sel0", true }, 63 { 0x7, 16, "sel1", true }, 64 {} 65 }, "pgraph_rop0_crop_pm_mux" }, 66 {} 67}; 68 69static const struct nvkm_specsrc 70nv50_tex_sources[] = { 71 { 0x40b808, (const struct nvkm_specmux[]) { 72 { 0x3fff, 0, "unk0" }, 73 {} 74 }, "pgraph_tpc3_tex_unk08" }, 75 {} 76}; 77 78static const struct nvkm_specsrc 79nv50_vfetch_sources[] = { 80 { 0x400c0c, (const struct nvkm_specmux[]) { 81 { 0x1, 0, "unk0" }, 82 {} 83 }, "pgraph_vfetch_unk0c" }, 84 {} 85}; 86 87static const struct nvkm_specdom 88nv50_pm[] = { 89 { 0x20, (const struct nvkm_specsig[]) { 90 {} 91 }, &nv40_perfctr_func }, 92 { 0xf0, (const struct nvkm_specsig[]) { 93 { 0xc8, "pc01_gr_idle" }, 94 { 0x7f, "pc01_strmout_00" }, 95 { 0x80, "pc01_strmout_01" }, 96 { 0xdc, "pc01_trast_00" }, 97 { 0xdd, "pc01_trast_01" }, 98 { 0xde, "pc01_trast_02" }, 99 { 0xdf, "pc01_trast_03" }, 100 { 0xe2, "pc01_trast_04" }, 101 { 0xe3, "pc01_trast_05" }, 102 { 0x7c, "pc01_vattr_00" }, 103 { 0x7d, "pc01_vattr_01" }, 104 { 0x26, "pc01_vfetch_00", nv50_vfetch_sources }, 105 { 0x27, "pc01_vfetch_01", nv50_vfetch_sources }, 106 { 0x28, "pc01_vfetch_02", nv50_vfetch_sources }, 107 { 0x29, "pc01_vfetch_03", nv50_vfetch_sources }, 108 { 0x2a, "pc01_vfetch_04", nv50_vfetch_sources }, 109 { 0x2b, "pc01_vfetch_05", nv50_vfetch_sources }, 110 { 0x2c, "pc01_vfetch_06", nv50_vfetch_sources }, 111 { 0x2d, "pc01_vfetch_07", nv50_vfetch_sources }, 112 { 0x2e, "pc01_vfetch_08", nv50_vfetch_sources }, 113 { 0x2f, "pc01_vfetch_09", nv50_vfetch_sources }, 114 { 0x30, "pc01_vfetch_0a", nv50_vfetch_sources }, 115 { 0x31, "pc01_vfetch_0b", nv50_vfetch_sources }, 116 { 0x32, "pc01_vfetch_0c", nv50_vfetch_sources }, 117 { 0x33, "pc01_vfetch_0d", nv50_vfetch_sources }, 118 { 0x34, "pc01_vfetch_0e", nv50_vfetch_sources }, 119 { 0x35, "pc01_vfetch_0f", nv50_vfetch_sources }, 120 { 0x36, "pc01_vfetch_10", nv50_vfetch_sources }, 121 { 0x37, "pc01_vfetch_11", nv50_vfetch_sources }, 122 { 0x38, "pc01_vfetch_12", nv50_vfetch_sources }, 123 { 0x39, "pc01_vfetch_13", nv50_vfetch_sources }, 124 { 0x3a, "pc01_vfetch_14", nv50_vfetch_sources }, 125 { 0x3b, "pc01_vfetch_15", nv50_vfetch_sources }, 126 { 0x3c, "pc01_vfetch_16", nv50_vfetch_sources }, 127 { 0x3d, "pc01_vfetch_17", nv50_vfetch_sources }, 128 { 0x3e, "pc01_vfetch_18", nv50_vfetch_sources }, 129 { 0x3f, "pc01_vfetch_19", nv50_vfetch_sources }, 130 { 0x20, "pc01_zcull_00", nv50_zcull_sources }, 131 { 0x21, "pc01_zcull_01", nv50_zcull_sources }, 132 { 0x22, "pc01_zcull_02", nv50_zcull_sources }, 133 { 0x23, "pc01_zcull_03", nv50_zcull_sources }, 134 { 0x24, "pc01_zcull_04", nv50_zcull_sources }, 135 { 0x25, "pc01_zcull_05", nv50_zcull_sources }, 136 { 0xae, "pc01_unk00" }, 137 { 0xee, "pc01_trailer" }, 138 {} 139 }, &nv40_perfctr_func }, 140 { 0xf0, (const struct nvkm_specsig[]) { 141 { 0x52, "pc02_crop_00", nv50_crop_sources }, 142 { 0x53, "pc02_crop_01", nv50_crop_sources }, 143 { 0x54, "pc02_crop_02", nv50_crop_sources }, 144 { 0x55, "pc02_crop_03", nv50_crop_sources }, 145 { 0x00, "pc02_prop_00", nv50_prop_sources }, 146 { 0x01, "pc02_prop_01", nv50_prop_sources }, 147 { 0x02, "pc02_prop_02", nv50_prop_sources }, 148 { 0x03, "pc02_prop_03", nv50_prop_sources }, 149 { 0x04, "pc02_prop_04", nv50_prop_sources }, 150 { 0x05, "pc02_prop_05", nv50_prop_sources }, 151 { 0x06, "pc02_prop_06", nv50_prop_sources }, 152 { 0x07, "pc02_prop_07", nv50_prop_sources }, 153 { 0x70, "pc02_tex_00", nv50_tex_sources }, 154 { 0x71, "pc02_tex_01", nv50_tex_sources }, 155 { 0x72, "pc02_tex_02", nv50_tex_sources }, 156 { 0x73, "pc02_tex_03", nv50_tex_sources }, 157 { 0x40, "pc02_tex_04", nv50_tex_sources }, 158 { 0x41, "pc02_tex_05", nv50_tex_sources }, 159 { 0x42, "pc02_tex_06", nv50_tex_sources }, 160 { 0x6c, "pc02_zrop_00", nv50_zrop_sources }, 161 { 0x6d, "pc02_zrop_01", nv50_zrop_sources }, 162 { 0x6e, "pc02_zrop_02", nv50_zrop_sources }, 163 { 0x6f, "pc02_zrop_03", nv50_zrop_sources }, 164 { 0xee, "pc02_trailer" }, 165 {} 166 }, &nv40_perfctr_func }, 167 { 0x20, (const struct nvkm_specsig[]) { 168 {} 169 }, &nv40_perfctr_func }, 170 { 0x20, (const struct nvkm_specsig[]) { 171 {} 172 }, &nv40_perfctr_func }, 173 {} 174}; 175 176int 177nv50_pm_new(struct nvkm_device *device, int index, struct nvkm_pm **ppm) 178{ 179 return nv40_pm_new_(nv50_pm, device, index, ppm); 180} 181