1/*	$NetBSD: nouveau_nvkm_engine_disp_wndwgv100.c,v 1.3 2021/12/19 10:51:57 riastradh Exp $	*/
2
3/*
4 * Copyright 2018 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24#include <sys/cdefs.h>
25__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_wndwgv100.c,v 1.3 2021/12/19 10:51:57 riastradh Exp $");
26
27#include "channv50.h"
28
29#include <core/client.h>
30
31#include <nvif/clc37e.h>
32#include <nvif/unpack.h>
33
34static const struct nv50_disp_mthd_list
35gv100_disp_wndw_mthd_base = {
36	.mthd = 0x0000,
37	.addr = 0x000000,
38	.data = {
39		{ 0x0200, 0x690200 },
40		{ 0x020c, 0x69020c },
41		{ 0x0210, 0x690210 },
42		{ 0x0214, 0x690214 },
43		{ 0x0218, 0x690218 },
44		{ 0x021c, 0x69021c },
45		{ 0x0220, 0x690220 },
46		{ 0x0224, 0x690224 },
47		{ 0x0228, 0x690228 },
48		{ 0x022c, 0x69022c },
49		{ 0x0230, 0x690230 },
50		{ 0x0234, 0x690234 },
51		{ 0x0238, 0x690238 },
52		{ 0x0240, 0x690240 },
53		{ 0x0244, 0x690244 },
54		{ 0x0248, 0x690248 },
55		{ 0x024c, 0x69024c },
56		{ 0x0250, 0x690250 },
57		{ 0x0254, 0x690254 },
58		{ 0x0260, 0x690260 },
59		{ 0x0264, 0x690264 },
60		{ 0x0268, 0x690268 },
61		{ 0x026c, 0x69026c },
62		{ 0x0270, 0x690270 },
63		{ 0x0274, 0x690274 },
64		{ 0x0280, 0x690280 },
65		{ 0x0284, 0x690284 },
66		{ 0x0288, 0x690288 },
67		{ 0x028c, 0x69028c },
68		{ 0x0290, 0x690290 },
69		{ 0x0298, 0x690298 },
70		{ 0x029c, 0x69029c },
71		{ 0x02a0, 0x6902a0 },
72		{ 0x02a4, 0x6902a4 },
73		{ 0x02a8, 0x6902a8 },
74		{ 0x02ac, 0x6902ac },
75		{ 0x02b0, 0x6902b0 },
76		{ 0x02b4, 0x6902b4 },
77		{ 0x02b8, 0x6902b8 },
78		{ 0x02bc, 0x6902bc },
79		{ 0x02c0, 0x6902c0 },
80		{ 0x02c4, 0x6902c4 },
81		{ 0x02c8, 0x6902c8 },
82		{ 0x02cc, 0x6902cc },
83		{ 0x02d0, 0x6902d0 },
84		{ 0x02d4, 0x6902d4 },
85		{ 0x02d8, 0x6902d8 },
86		{ 0x02dc, 0x6902dc },
87		{ 0x02e0, 0x6902e0 },
88		{ 0x02e4, 0x6902e4 },
89		{ 0x02e8, 0x6902e8 },
90		{ 0x02ec, 0x6902ec },
91		{ 0x02f0, 0x6902f0 },
92		{ 0x02f4, 0x6902f4 },
93		{ 0x02f8, 0x6902f8 },
94		{ 0x02fc, 0x6902fc },
95		{ 0x0300, 0x690300 },
96		{ 0x0304, 0x690304 },
97		{ 0x0308, 0x690308 },
98		{ 0x0310, 0x690310 },
99		{ 0x0314, 0x690314 },
100		{ 0x0318, 0x690318 },
101		{ 0x031c, 0x69031c },
102		{ 0x0320, 0x690320 },
103		{ 0x0324, 0x690324 },
104		{ 0x0328, 0x690328 },
105		{ 0x032c, 0x69032c },
106		{ 0x033c, 0x69033c },
107		{ 0x0340, 0x690340 },
108		{ 0x0344, 0x690344 },
109		{ 0x0348, 0x690348 },
110		{ 0x034c, 0x69034c },
111		{ 0x0350, 0x690350 },
112		{ 0x0354, 0x690354 },
113		{ 0x0358, 0x690358 },
114		{ 0x0364, 0x690364 },
115		{ 0x0368, 0x690368 },
116		{ 0x036c, 0x69036c },
117		{ 0x0370, 0x690370 },
118		{ 0x0374, 0x690374 },
119		{ 0x0380, 0x690380 },
120		{}
121	}
122};
123
124const struct nv50_disp_chan_mthd
125gv100_disp_wndw_mthd = {
126	.name = "Window",
127	.addr = 0x001000,
128	.prev = 0x000800,
129	.data = {
130		{ "Global", 1, &gv100_disp_wndw_mthd_base },
131		{}
132	}
133};
134
135static void
136gv100_disp_wndw_intr(struct nv50_disp_chan *chan, bool en)
137{
138	struct nvkm_device *device = chan->disp->base.engine.subdev.device;
139	const u32 mask = 0x00000001 << chan->head;
140	const u32 data = en ? mask : 0;
141	nvkm_mask(device, 0x611da4, mask, data);
142}
143
144const struct nv50_disp_chan_func
145gv100_disp_wndw = {
146	.init = gv100_disp_dmac_init,
147	.fini = gv100_disp_dmac_fini,
148	.intr = gv100_disp_wndw_intr,
149	.user = gv100_disp_chan_user,
150	.bind = gv100_disp_dmac_bind,
151};
152
153static int
154gv100_disp_wndw_new_(const struct nv50_disp_chan_func *func,
155		     const struct nv50_disp_chan_mthd *mthd,
156		     struct nv50_disp *disp, int chid,
157		     const struct nvkm_oclass *oclass, void *argv, u32 argc,
158		     struct nvkm_object **pobject)
159{
160	union {
161		struct nvc37e_window_channel_dma_v0 v0;
162	} *args = argv;
163	struct nvkm_object *parent = oclass->parent;
164	int wndw, ret = -ENOSYS;
165	u64 push;
166
167	nvif_ioctl(parent, "create window channel dma size %d\n", argc);
168	if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
169		nvif_ioctl(parent, "create window channel dma vers %d "
170				   "pushbuf %016"PRIx64" index %d\n",
171			   args->v0.version, args->v0.pushbuf, args->v0.index);
172		if (!(disp->wndw.mask & BIT(args->v0.index)))
173			return -EINVAL;
174		push = args->v0.pushbuf;
175		wndw = args->v0.index;
176	} else
177		return ret;
178
179	return nv50_disp_dmac_new_(func, mthd, disp, chid + wndw,
180				   wndw, push, oclass, pobject);
181}
182
183int
184gv100_disp_wndw_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
185		    struct nv50_disp *disp, struct nvkm_object **pobject)
186{
187	return gv100_disp_wndw_new_(&gv100_disp_wndw, &gv100_disp_wndw_mthd,
188				    disp, 1, oclass, argv, argc, pobject);
189}
190