160786Sps/* $NetBSD: nouveau_nvkm_engine_disp_rootgp102.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $ */ 2161475Sdelphij 360786Sps/* 460786Sps * Copyright 2016 Red Hat Inc. 560786Sps * 660786Sps * Permission is hereby granted, free of charge, to any person obtaining a 760786Sps * copy of this software and associated documentation files (the "Software"), 860786Sps * to deal in the Software without restriction, including without limitation 960786Sps * the rights to use, copy, modify, merge, publish, distribute, sublicense, 1060786Sps * and/or sell copies of the Software, and to permit persons to whom the 1160786Sps * Software is furnished to do so, subject to the following conditions: 1260786Sps * 1360786Sps * The above copyright notice and this permission notice shall be included in 1460786Sps * all copies or substantial portions of the Software. 1560786Sps * 1660786Sps * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1760786Sps * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1860786Sps * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1960786Sps * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 2060786Sps * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 2160786Sps * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 2260786Sps * OTHER DEALINGS IN THE SOFTWARE. 2360786Sps * 2460786Sps * Authors: Ben Skeggs <bskeggs@redhat.com> 2560786Sps */ 2660786Sps#include <sys/cdefs.h> 2760786Sps__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_rootgp102.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $"); 2860786Sps 2960786Sps#include "rootnv50.h" 3060786Sps#include "channv50.h" 3160786Sps 3260786Sps#include <nvif/class.h> 3360786Sps 3460786Spsstatic const struct nv50_disp_root_func 3560786Spsgp102_disp_root = { 3660786Sps .user = { 3760786Sps {{0,0,GK104_DISP_CURSOR }, gp102_disp_curs_new }, 3860786Sps {{0,0,GK104_DISP_OVERLAY }, gp102_disp_oimm_new }, 3960786Sps {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, gp102_disp_base_new }, 4060786Sps {{0,0,GP102_DISP_CORE_CHANNEL_DMA }, gp102_disp_core_new }, 4160786Sps {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gp102_disp_ovly_new }, 4260786Sps {} 4360786Sps }, 4460786Sps}; 4560786Sps 4660786Spsstatic int 4760786Spsgp102_disp_root_new(struct nvkm_disp *disp, const struct nvkm_oclass *oclass, 4860786Sps void *data, u32 size, struct nvkm_object **pobject) 4960786Sps{ 5060786Sps return nv50_disp_root_new_(&gp102_disp_root, disp, oclass, 5160786Sps data, size, pobject); 5260786Sps} 5360786Sps 5460786Spsconst struct nvkm_disp_oclass 5560786Spsgp102_disp_root_oclass = { 5660786Sps .base.oclass = GP102_DISP, 5760786Sps .base.minver = -1, 5860786Sps .base.maxver = -1, 5960786Sps .ctor = gp102_disp_root_new, 6060786Sps}; 6160786Sps