1/* $NetBSD: intel_bios.c,v 1.4 2021/12/19 12:24:49 riastradh Exp $ */ 2 3/* 4 * Copyright �� 2006 Intel Corporation 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 23 * SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 * 28 */ 29 30#include <sys/cdefs.h> 31__KERNEL_RCSID(0, "$NetBSD: intel_bios.c,v 1.4 2021/12/19 12:24:49 riastradh Exp $"); 32 33#include <drm/drm_dp_helper.h> 34#include <drm/i915_drm.h> 35 36#include "display/intel_display.h" 37#include "display/intel_display_types.h" 38#include "display/intel_gmbus.h" 39 40#include "i915_drv.h" 41 42#define _INTEL_BIOS_PRIVATE 43#include "intel_vbt_defs.h" 44 45/** 46 * DOC: Video BIOS Table (VBT) 47 * 48 * The Video BIOS Table, or VBT, provides platform and board specific 49 * configuration information to the driver that is not discoverable or available 50 * through other means. The configuration is mostly related to display 51 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 52 * the PCI ROM. 53 * 54 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 55 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 56 * contain the actual configuration information. The VBT Header, and thus the 57 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 58 * BDB Header. The data blocks are concatenated after the BDB Header. The data 59 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 60 * data. (Block 53, the MIPI Sequence Block is an exception.) 61 * 62 * The driver parses the VBT during load. The relevant information is stored in 63 * driver private data for ease of use, and the actual VBT is not read after 64 * that. 65 */ 66 67/* Wrapper for VBT child device config */ 68struct display_device_data { 69 struct child_device_config child; 70 struct dsc_compression_parameters_entry *dsc; 71 struct list_head node; 72}; 73 74#define SLAVE_ADDR1 0x70 75#define SLAVE_ADDR2 0x72 76 77/* Get BDB block size given a pointer to Block ID. */ 78static u32 _get_blocksize(const u8 *block_base) 79{ 80 /* The MIPI Sequence Block v3+ has a separate size field. */ 81 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 82 return *((const u32 *)(block_base + 4)); 83 else 84 return *((const u16 *)(block_base + 1)); 85} 86 87/* Get BDB block size give a pointer to data after Block ID and Block Size. */ 88static u32 get_blocksize(const void *block_data) 89{ 90 return _get_blocksize(block_data - 3); 91} 92 93static const void * 94find_section(const void *_bdb, enum bdb_block_id section_id) 95{ 96 const struct bdb_header *bdb = _bdb; 97 const u8 *base = _bdb; 98 int index = 0; 99 u32 total, current_size; 100 enum bdb_block_id current_id; 101 102 /* skip to first section */ 103 index += bdb->header_size; 104 total = bdb->bdb_size; 105 106 /* walk the sections looking for section_id */ 107 while (index + 3 < total) { 108 current_id = *(base + index); 109 current_size = _get_blocksize(base + index); 110 index += 3; 111 112 if (index + current_size > total) 113 return NULL; 114 115 if (current_id == section_id) 116 return base + index; 117 118 index += current_size; 119 } 120 121 return NULL; 122} 123 124static void 125fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 126 const struct lvds_dvo_timing *dvo_timing) 127{ 128 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 129 dvo_timing->hactive_lo; 130 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 131 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 132 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 133 ((dvo_timing->hsync_pulse_width_hi << 8) | 134 dvo_timing->hsync_pulse_width_lo); 135 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 136 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 137 138 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 139 dvo_timing->vactive_lo; 140 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 141 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 142 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 143 ((dvo_timing->vsync_pulse_width_hi << 4) | 144 dvo_timing->vsync_pulse_width_lo); 145 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 146 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 147 panel_fixed_mode->clock = dvo_timing->clock * 10; 148 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 149 150 if (dvo_timing->hsync_positive) 151 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 152 else 153 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 154 155 if (dvo_timing->vsync_positive) 156 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 157 else 158 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 159 160 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 161 dvo_timing->himage_lo; 162 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 163 dvo_timing->vimage_lo; 164 165 /* Some VBTs have bogus h/vtotal values */ 166 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 167 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 168 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 169 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 170 171 drm_mode_set_name(panel_fixed_mode); 172} 173 174static const struct lvds_dvo_timing * 175get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, 176 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, 177 int index) 178{ 179 /* 180 * the size of fp_timing varies on the different platform. 181 * So calculate the DVO timing relative offset in LVDS data 182 * entry to get the DVO timing entry 183 */ 184 185 int lfp_data_size = 186 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - 187 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; 188 int dvo_timing_offset = 189 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - 190 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; 191 const char *entry = (const char *)lvds_lfp_data->data + 192 lfp_data_size * index; 193 194 return (const struct lvds_dvo_timing *)(entry + dvo_timing_offset); 195} 196 197/* get lvds_fp_timing entry 198 * this function may return NULL if the corresponding entry is invalid 199 */ 200static const struct lvds_fp_timing * 201get_lvds_fp_timing(const struct bdb_header *bdb, 202 const struct bdb_lvds_lfp_data *data, 203 const struct bdb_lvds_lfp_data_ptrs *ptrs, 204 int index) 205{ 206 size_t data_ofs = (const u8 *)data - (const u8 *)bdb; 207 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ 208 size_t ofs; 209 210 if (index >= ARRAY_SIZE(ptrs->ptr)) 211 return NULL; 212 ofs = ptrs->ptr[index].fp_timing_offset; 213 if (ofs < data_ofs || 214 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) 215 return NULL; 216 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); 217} 218 219/* Parse general panel options */ 220static void 221parse_panel_options(struct drm_i915_private *dev_priv, 222 const struct bdb_header *bdb) 223{ 224 const struct bdb_lvds_options *lvds_options; 225 int panel_type; 226 int drrs_mode; 227 int ret; 228 229 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); 230 if (!lvds_options) 231 return; 232 233 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; 234 235 ret = intel_opregion_get_panel_type(dev_priv); 236 if (ret >= 0) { 237 WARN_ON(ret > 0xf); 238 panel_type = ret; 239 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type); 240 } else { 241 if (lvds_options->panel_type > 0xf) { 242 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n", 243 lvds_options->panel_type); 244 return; 245 } 246 panel_type = lvds_options->panel_type; 247 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type); 248 } 249 250 dev_priv->vbt.panel_type = panel_type; 251 252 drrs_mode = (lvds_options->dps_panel_type_bits 253 >> (panel_type * 2)) & MODE_MASK; 254 /* 255 * VBT has static DRRS = 0 and seamless DRRS = 2. 256 * The below piece of code is required to adjust vbt.drrs_type 257 * to match the enum drrs_support_type. 258 */ 259 switch (drrs_mode) { 260 case 0: 261 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; 262 DRM_DEBUG_KMS("DRRS supported mode is static\n"); 263 break; 264 case 2: 265 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; 266 DRM_DEBUG_KMS("DRRS supported mode is seamless\n"); 267 break; 268 default: 269 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 270 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n"); 271 break; 272 } 273} 274 275/* Try to find integrated panel timing data */ 276static void 277parse_lfp_panel_dtd(struct drm_i915_private *dev_priv, 278 const struct bdb_header *bdb) 279{ 280 const struct bdb_lvds_lfp_data *lvds_lfp_data; 281 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 282 const struct lvds_dvo_timing *panel_dvo_timing; 283 const struct lvds_fp_timing *fp_timing; 284 struct drm_display_mode *panel_fixed_mode; 285 int panel_type = dev_priv->vbt.panel_type; 286 287 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); 288 if (!lvds_lfp_data) 289 return; 290 291 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); 292 if (!lvds_lfp_data_ptrs) 293 return; 294 295 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 296 lvds_lfp_data_ptrs, 297 panel_type); 298 299 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 300 if (!panel_fixed_mode) 301 return; 302 303 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 304 305 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 306 307 DRM_DEBUG_KMS("Found panel mode in BIOS VBT legacy lfp table:\n"); 308 drm_mode_debug_printmodeline(panel_fixed_mode); 309 310 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, 311 lvds_lfp_data_ptrs, 312 panel_type); 313 if (fp_timing) { 314 /* check the resolution, just to be sure */ 315 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 316 fp_timing->y_res == panel_fixed_mode->vdisplay) { 317 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 318 DRM_DEBUG_KMS("VBT initial LVDS value %x\n", 319 dev_priv->vbt.bios_lvds_val); 320 } 321 } 322} 323 324static void 325parse_generic_dtd(struct drm_i915_private *dev_priv, 326 const struct bdb_header *bdb) 327{ 328 const struct bdb_generic_dtd *generic_dtd; 329 const struct generic_dtd_entry *dtd; 330 struct drm_display_mode *panel_fixed_mode; 331 int num_dtd; 332 333 generic_dtd = find_section(bdb, BDB_GENERIC_DTD); 334 if (!generic_dtd) 335 return; 336 337 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 338 DRM_ERROR("GDTD size %u is too small.\n", 339 generic_dtd->gdtd_size); 340 return; 341 } else if (generic_dtd->gdtd_size != 342 sizeof(struct generic_dtd_entry)) { 343 DRM_ERROR("Unexpected GDTD size %u\n", generic_dtd->gdtd_size); 344 /* DTD has unknown fields, but keep going */ 345 } 346 347 num_dtd = (get_blocksize(generic_dtd) - 348 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 349 if (dev_priv->vbt.panel_type >= num_dtd) { 350 DRM_ERROR("Panel type %d not found in table of %d DTD's\n", 351 dev_priv->vbt.panel_type, num_dtd); 352 return; 353 } 354 355 dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type]; 356 357 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 358 if (!panel_fixed_mode) 359 return; 360 361 panel_fixed_mode->hdisplay = dtd->hactive; 362 panel_fixed_mode->hsync_start = 363 panel_fixed_mode->hdisplay + dtd->hfront_porch; 364 panel_fixed_mode->hsync_end = 365 panel_fixed_mode->hsync_start + dtd->hsync; 366 panel_fixed_mode->htotal = 367 panel_fixed_mode->hdisplay + dtd->hblank; 368 369 panel_fixed_mode->vdisplay = dtd->vactive; 370 panel_fixed_mode->vsync_start = 371 panel_fixed_mode->vdisplay + dtd->vfront_porch; 372 panel_fixed_mode->vsync_end = 373 panel_fixed_mode->vsync_start + dtd->vsync; 374 panel_fixed_mode->vtotal = 375 panel_fixed_mode->vdisplay + dtd->vblank; 376 377 panel_fixed_mode->clock = dtd->pixel_clock; 378 panel_fixed_mode->width_mm = dtd->width_mm; 379 panel_fixed_mode->height_mm = dtd->height_mm; 380 381 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 382 drm_mode_set_name(panel_fixed_mode); 383 384 if (dtd->hsync_positive_polarity) 385 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 386 else 387 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 388 389 if (dtd->vsync_positive_polarity) 390 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 391 else 392 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 393 394 DRM_DEBUG_KMS("Found panel mode in BIOS VBT generic dtd table:\n"); 395 drm_mode_debug_printmodeline(panel_fixed_mode); 396 397 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 398} 399 400static void 401parse_panel_dtd(struct drm_i915_private *dev_priv, 402 const struct bdb_header *bdb) 403{ 404 /* 405 * Older VBTs provided provided DTD information for internal displays 406 * through the "LFP panel DTD" block (42). As of VBT revision 229, 407 * that block is now deprecated and DTD information should be provided 408 * via a newer "generic DTD" block (58). Just to be safe, we'll 409 * try the new generic DTD block first on VBT >= 229, but still fall 410 * back to trying the old LFP block if that fails. 411 */ 412 if (bdb->version >= 229) 413 parse_generic_dtd(dev_priv, bdb); 414 if (!dev_priv->vbt.lfp_lvds_vbt_mode) 415 parse_lfp_panel_dtd(dev_priv, bdb); 416} 417 418static void 419parse_lfp_backlight(struct drm_i915_private *dev_priv, 420 const struct bdb_header *bdb) 421{ 422 const struct bdb_lfp_backlight_data *backlight_data; 423 const struct lfp_backlight_data_entry *entry; 424 int panel_type = dev_priv->vbt.panel_type; 425 426 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); 427 if (!backlight_data) 428 return; 429 430 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 431 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n", 432 backlight_data->entry_size); 433 return; 434 } 435 436 entry = &backlight_data->data[panel_type]; 437 438 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 439 if (!dev_priv->vbt.backlight.present) { 440 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n", 441 entry->type); 442 return; 443 } 444 445 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 446 if (bdb->version >= 191 && 447 get_blocksize(backlight_data) >= sizeof(*backlight_data)) { 448 const struct lfp_backlight_control_method *method; 449 450 method = &backlight_data->backlight_control[panel_type]; 451 dev_priv->vbt.backlight.type = method->type; 452 dev_priv->vbt.backlight.controller = method->controller; 453 } 454 455 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 456 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; 457 dev_priv->vbt.backlight.min_brightness = entry->min_brightness; 458 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, " 459 "active %s, min brightness %u, level %u, controller %u\n", 460 dev_priv->vbt.backlight.pwm_freq_hz, 461 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", 462 dev_priv->vbt.backlight.min_brightness, 463 backlight_data->level[panel_type], 464 dev_priv->vbt.backlight.controller); 465} 466 467/* Try to find sdvo panel data */ 468static void 469parse_sdvo_panel_data(struct drm_i915_private *dev_priv, 470 const struct bdb_header *bdb) 471{ 472 const struct bdb_sdvo_panel_dtds *dtds; 473 struct drm_display_mode *panel_fixed_mode; 474 int index; 475 476 index = i915_modparams.vbt_sdvo_panel_type; 477 if (index == -2) { 478 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n"); 479 return; 480 } 481 482 if (index == -1) { 483 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 484 485 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); 486 if (!sdvo_lvds_options) 487 return; 488 489 index = sdvo_lvds_options->panel_type; 490 } 491 492 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS); 493 if (!dtds) 494 return; 495 496 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 497 if (!panel_fixed_mode) 498 return; 499 500 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 501 502 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 503 504 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); 505 drm_mode_debug_printmodeline(panel_fixed_mode); 506} 507 508static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv, 509 bool alternate) 510{ 511 switch (INTEL_GEN(dev_priv)) { 512 case 2: 513 return alternate ? 66667 : 48000; 514 case 3: 515 case 4: 516 return alternate ? 100000 : 96000; 517 default: 518 return alternate ? 100000 : 120000; 519 } 520} 521 522static void 523parse_general_features(struct drm_i915_private *dev_priv, 524 const struct bdb_header *bdb) 525{ 526 const struct bdb_general_features *general; 527 528 general = find_section(bdb, BDB_GENERAL_FEATURES); 529 if (!general) 530 return; 531 532 dev_priv->vbt.int_tv_support = general->int_tv_support; 533 /* int_crt_support can't be trusted on earlier platforms */ 534 if (bdb->version >= 155 && 535 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv))) 536 dev_priv->vbt.int_crt_support = general->int_crt_support; 537 dev_priv->vbt.lvds_use_ssc = general->enable_ssc; 538 dev_priv->vbt.lvds_ssc_freq = 539 intel_bios_ssc_frequency(dev_priv, general->ssc_freq); 540 dev_priv->vbt.display_clock_mode = general->display_clock_mode; 541 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 542 if (bdb->version >= 181) { 543 dev_priv->vbt.orientation = general->rotate_180 ? 544 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 545 DRM_MODE_PANEL_ORIENTATION_NORMAL; 546 } else { 547 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 548 } 549 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 550 dev_priv->vbt.int_tv_support, 551 dev_priv->vbt.int_crt_support, 552 dev_priv->vbt.lvds_use_ssc, 553 dev_priv->vbt.lvds_ssc_freq, 554 dev_priv->vbt.display_clock_mode, 555 dev_priv->vbt.fdi_rx_polarity_inverted); 556} 557 558static const struct child_device_config * 559child_device_ptr(const struct bdb_general_definitions *defs, int i) 560{ 561 return (const void *) &defs->devices[i * defs->child_dev_size]; 562} 563 564static void 565parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version) 566{ 567 struct sdvo_device_mapping *mapping; 568 const struct display_device_data *devdata; 569 const struct child_device_config *child; 570 int count = 0; 571 572 /* 573 * Only parse SDVO mappings on gens that could have SDVO. This isn't 574 * accurate and doesn't have to be, as long as it's not too strict. 575 */ 576 if (!IS_GEN_RANGE(dev_priv, 3, 7)) { 577 DRM_DEBUG_KMS("Skipping SDVO device mapping\n"); 578 return; 579 } 580 581 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 582 child = &devdata->child; 583 584 if (child->slave_addr != SLAVE_ADDR1 && 585 child->slave_addr != SLAVE_ADDR2) { 586 /* 587 * If the slave address is neither 0x70 nor 0x72, 588 * it is not a SDVO device. Skip it. 589 */ 590 continue; 591 } 592 if (child->dvo_port != DEVICE_PORT_DVOB && 593 child->dvo_port != DEVICE_PORT_DVOC) { 594 /* skip the incorrect SDVO port */ 595 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); 596 continue; 597 } 598 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" 599 " %s port\n", 600 child->slave_addr, 601 (child->dvo_port == DEVICE_PORT_DVOB) ? 602 "SDVOB" : "SDVOC"); 603 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1]; 604 if (!mapping->initialized) { 605 mapping->dvo_port = child->dvo_port; 606 mapping->slave_addr = child->slave_addr; 607 mapping->dvo_wiring = child->dvo_wiring; 608 mapping->ddc_pin = child->ddc_pin; 609 mapping->i2c_pin = child->i2c_pin; 610 mapping->initialized = 1; 611 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 612 mapping->dvo_port, 613 mapping->slave_addr, 614 mapping->dvo_wiring, 615 mapping->ddc_pin, 616 mapping->i2c_pin); 617 } else { 618 DRM_DEBUG_KMS("Maybe one SDVO port is shared by " 619 "two SDVO device.\n"); 620 } 621 if (child->slave2_addr) { 622 /* Maybe this is a SDVO device with multiple inputs */ 623 /* And the mapping info is not added */ 624 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" 625 " is a SDVO device with multiple inputs.\n"); 626 } 627 count++; 628 } 629 630 if (!count) { 631 /* No SDVO device info is found */ 632 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); 633 } 634} 635 636static void 637parse_driver_features(struct drm_i915_private *dev_priv, 638 const struct bdb_header *bdb) 639{ 640 const struct bdb_driver_features *driver; 641 642 driver = find_section(bdb, BDB_DRIVER_FEATURES); 643 if (!driver) 644 return; 645 646 if (INTEL_GEN(dev_priv) >= 5) { 647 /* 648 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 649 * to mean "eDP". The VBT spec doesn't agree with that 650 * interpretation, but real world VBTs seem to. 651 */ 652 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 653 dev_priv->vbt.int_lvds_support = 0; 654 } else { 655 /* 656 * FIXME it's not clear which BDB version has the LVDS config 657 * bits defined. Revision history in the VBT spec says: 658 * "0.92 | Add two definitions for VBT value of LVDS Active 659 * Config (00b and 11b values defined) | 06/13/2005" 660 * but does not the specify the BDB version. 661 * 662 * So far version 134 (on i945gm) is the oldest VBT observed 663 * in the wild with the bits correctly populated. Version 664 * 108 (on i85x) does not have the bits correctly populated. 665 */ 666 if (bdb->version >= 134 && 667 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 668 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 669 dev_priv->vbt.int_lvds_support = 0; 670 } 671 672 if (bdb->version < 228) { 673 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); 674 /* 675 * If DRRS is not supported, drrs_type has to be set to 0. 676 * This is because, VBT is configured in such a way that 677 * static DRRS is 0 and DRRS not supported is represented by 678 * driver->drrs_enabled=false 679 */ 680 if (!driver->drrs_enabled) 681 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 682 683 dev_priv->vbt.psr.enable = driver->psr_enabled; 684 } 685} 686 687static void 688parse_power_conservation_features(struct drm_i915_private *dev_priv, 689 const struct bdb_header *bdb) 690{ 691 const struct bdb_lfp_power *power; 692 u8 panel_type = dev_priv->vbt.panel_type; 693 694 if (bdb->version < 228) 695 return; 696 697 power = find_section(bdb, BDB_LVDS_POWER); 698 if (!power) 699 return; 700 701 dev_priv->vbt.psr.enable = power->psr & BIT(panel_type); 702 703 /* 704 * If DRRS is not supported, drrs_type has to be set to 0. 705 * This is because, VBT is configured in such a way that 706 * static DRRS is 0 and DRRS not supported is represented by 707 * power->drrs & BIT(panel_type)=false 708 */ 709 if (!(power->drrs & BIT(panel_type))) 710 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 711} 712 713static void 714parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 715{ 716 const struct bdb_edp *edp; 717 const struct edp_power_seq *edp_pps; 718 const struct edp_fast_link_params *edp_link_params; 719 int panel_type = dev_priv->vbt.panel_type; 720 721 edp = find_section(bdb, BDB_EDP); 722 if (!edp) 723 return; 724 725 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 726 case EDP_18BPP: 727 dev_priv->vbt.edp.bpp = 18; 728 break; 729 case EDP_24BPP: 730 dev_priv->vbt.edp.bpp = 24; 731 break; 732 case EDP_30BPP: 733 dev_priv->vbt.edp.bpp = 30; 734 break; 735 } 736 737 /* Get the eDP sequencing and link info */ 738 edp_pps = &edp->power_seqs[panel_type]; 739 edp_link_params = &edp->fast_link_params[panel_type]; 740 741 dev_priv->vbt.edp.pps = *edp_pps; 742 743 switch (edp_link_params->rate) { 744 case EDP_RATE_1_62: 745 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62; 746 break; 747 case EDP_RATE_2_7: 748 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7; 749 break; 750 default: 751 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n", 752 edp_link_params->rate); 753 break; 754 } 755 756 switch (edp_link_params->lanes) { 757 case EDP_LANE_1: 758 dev_priv->vbt.edp.lanes = 1; 759 break; 760 case EDP_LANE_2: 761 dev_priv->vbt.edp.lanes = 2; 762 break; 763 case EDP_LANE_4: 764 dev_priv->vbt.edp.lanes = 4; 765 break; 766 default: 767 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n", 768 edp_link_params->lanes); 769 break; 770 } 771 772 switch (edp_link_params->preemphasis) { 773 case EDP_PREEMPHASIS_NONE: 774 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 775 break; 776 case EDP_PREEMPHASIS_3_5dB: 777 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 778 break; 779 case EDP_PREEMPHASIS_6dB: 780 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 781 break; 782 case EDP_PREEMPHASIS_9_5dB: 783 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 784 break; 785 default: 786 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n", 787 edp_link_params->preemphasis); 788 break; 789 } 790 791 switch (edp_link_params->vswing) { 792 case EDP_VSWING_0_4V: 793 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 794 break; 795 case EDP_VSWING_0_6V: 796 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 797 break; 798 case EDP_VSWING_0_8V: 799 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 800 break; 801 case EDP_VSWING_1_2V: 802 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 803 break; 804 default: 805 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n", 806 edp_link_params->vswing); 807 break; 808 } 809 810 if (bdb->version >= 173) { 811 u8 vswing; 812 813 /* Don't read from VBT if module parameter has valid value*/ 814 if (i915_modparams.edp_vswing) { 815 dev_priv->vbt.edp.low_vswing = 816 i915_modparams.edp_vswing == 1; 817 } else { 818 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 819 dev_priv->vbt.edp.low_vswing = vswing == 0; 820 } 821 } 822} 823 824static void 825parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 826{ 827 const struct bdb_psr *psr; 828 const struct psr_table *psr_table; 829 int panel_type = dev_priv->vbt.panel_type; 830 831 psr = find_section(bdb, BDB_PSR); 832 if (!psr) { 833 DRM_DEBUG_KMS("No PSR BDB found.\n"); 834 return; 835 } 836 837 psr_table = &psr->psr_table[panel_type]; 838 839 dev_priv->vbt.psr.full_link = psr_table->full_link; 840 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 841 842 /* Allowed VBT values goes from 0 to 15 */ 843 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 844 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 845 846 switch (psr_table->lines_to_wait) { 847 case 0: 848 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; 849 break; 850 case 1: 851 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; 852 break; 853 case 2: 854 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; 855 break; 856 case 3: 857 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; 858 break; 859 default: 860 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n", 861 psr_table->lines_to_wait); 862 break; 863 } 864 865 /* 866 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 867 * Old decimal value is wake up time in multiples of 100 us. 868 */ 869 if (bdb->version >= 205 && 870 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) || 871 INTEL_GEN(dev_priv) >= 10)) { 872 switch (psr_table->tp1_wakeup_time) { 873 case 0: 874 dev_priv->vbt.psr.tp1_wakeup_time_us = 500; 875 break; 876 case 1: 877 dev_priv->vbt.psr.tp1_wakeup_time_us = 100; 878 break; 879 case 3: 880 dev_priv->vbt.psr.tp1_wakeup_time_us = 0; 881 break; 882 default: 883 DRM_DEBUG_KMS("VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 884 psr_table->tp1_wakeup_time); 885 /* fallthrough */ 886 case 2: 887 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500; 888 break; 889 } 890 891 switch (psr_table->tp2_tp3_wakeup_time) { 892 case 0: 893 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500; 894 break; 895 case 1: 896 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100; 897 break; 898 case 3: 899 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0; 900 break; 901 default: 902 DRM_DEBUG_KMS("VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 903 psr_table->tp2_tp3_wakeup_time); 904 /* fallthrough */ 905 case 2: 906 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 907 break; 908 } 909 } else { 910 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 911 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 912 } 913 914 if (bdb->version >= 226) { 915 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 916 917 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3; 918 switch (wakeup_time) { 919 case 0: 920 wakeup_time = 500; 921 break; 922 case 1: 923 wakeup_time = 100; 924 break; 925 case 3: 926 wakeup_time = 50; 927 break; 928 default: 929 case 2: 930 wakeup_time = 2500; 931 break; 932 } 933 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 934 } else { 935 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 936 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us; 937 } 938} 939 940static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv, 941 u16 version, enum port port) 942{ 943 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) { 944 dev_priv->vbt.dsi.bl_ports = BIT(port); 945 if (dev_priv->vbt.dsi.config->cabc_supported) 946 dev_priv->vbt.dsi.cabc_ports = BIT(port); 947 948 return; 949 } 950 951 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) { 952 case DL_DCS_PORT_A: 953 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A); 954 break; 955 case DL_DCS_PORT_C: 956 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C); 957 break; 958 default: 959 case DL_DCS_PORT_A_AND_C: 960 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C); 961 break; 962 } 963 964 if (!dev_priv->vbt.dsi.config->cabc_supported) 965 return; 966 967 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) { 968 case DL_DCS_PORT_A: 969 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A); 970 break; 971 case DL_DCS_PORT_C: 972 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C); 973 break; 974 default: 975 case DL_DCS_PORT_A_AND_C: 976 dev_priv->vbt.dsi.cabc_ports = 977 BIT(PORT_A) | BIT(PORT_C); 978 break; 979 } 980} 981 982static void 983parse_mipi_config(struct drm_i915_private *dev_priv, 984 const struct bdb_header *bdb) 985{ 986 const struct bdb_mipi_config *start; 987 const struct mipi_config *config; 988 const struct mipi_pps_data *pps; 989 int panel_type = dev_priv->vbt.panel_type; 990 enum port port; 991 992 /* parse MIPI blocks only if LFP type is MIPI */ 993 if (!intel_bios_is_dsi_present(dev_priv, &port)) 994 return; 995 996 /* Initialize this to undefined indicating no generic MIPI support */ 997 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 998 999 /* Block #40 is already parsed and panel_fixed_mode is 1000 * stored in dev_priv->lfp_lvds_vbt_mode 1001 * resuse this when needed 1002 */ 1003 1004 /* Parse #52 for panel index used from panel_type already 1005 * parsed 1006 */ 1007 start = find_section(bdb, BDB_MIPI_CONFIG); 1008 if (!start) { 1009 DRM_DEBUG_KMS("No MIPI config BDB found"); 1010 return; 1011 } 1012 1013 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n", 1014 panel_type); 1015 1016 /* 1017 * get hold of the correct configuration block and pps data as per 1018 * the panel_type as index 1019 */ 1020 config = &start->config[panel_type]; 1021 pps = &start->pps[panel_type]; 1022 1023 /* store as of now full data. Trim when we realise all is not needed */ 1024 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1025 if (!dev_priv->vbt.dsi.config) 1026 return; 1027 1028 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1029 if (!dev_priv->vbt.dsi.pps) { 1030 kfree(dev_priv->vbt.dsi.config); 1031 return; 1032 } 1033 1034 parse_dsi_backlight_ports(dev_priv, bdb->version, port); 1035 1036 /* FIXME is the 90 vs. 270 correct? */ 1037 switch (config->rotation) { 1038 case ENABLE_ROTATION_0: 1039 /* 1040 * Most (all?) VBTs claim 0 degrees despite having 1041 * an upside down panel, thus we do not trust this. 1042 */ 1043 dev_priv->vbt.dsi.orientation = 1044 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1045 break; 1046 case ENABLE_ROTATION_90: 1047 dev_priv->vbt.dsi.orientation = 1048 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1049 break; 1050 case ENABLE_ROTATION_180: 1051 dev_priv->vbt.dsi.orientation = 1052 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1053 break; 1054 case ENABLE_ROTATION_270: 1055 dev_priv->vbt.dsi.orientation = 1056 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1057 break; 1058 } 1059 1060 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1061 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1062} 1063 1064/* Find the sequence block and size for the given panel. */ 1065static const u8 * 1066find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1067 u16 panel_id, u32 *seq_size) 1068{ 1069 u32 total = get_blocksize(sequence); 1070 const u8 *data = &sequence->data[0]; 1071 u8 current_id; 1072 u32 current_size; 1073 int header_size = sequence->version >= 3 ? 5 : 3; 1074 int index = 0; 1075 int i; 1076 1077 /* skip new block size */ 1078 if (sequence->version >= 3) 1079 data += 4; 1080 1081 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1082 if (index + header_size > total) { 1083 DRM_ERROR("Invalid sequence block (header)\n"); 1084 return NULL; 1085 } 1086 1087 current_id = *(data + index); 1088 if (sequence->version >= 3) 1089 current_size = *((const u32 *)(data + index + 1)); 1090 else 1091 current_size = *((const u16 *)(data + index + 1)); 1092 1093 index += header_size; 1094 1095 if (index + current_size > total) { 1096 DRM_ERROR("Invalid sequence block\n"); 1097 return NULL; 1098 } 1099 1100 if (current_id == panel_id) { 1101 *seq_size = current_size; 1102 return data + index; 1103 } 1104 1105 index += current_size; 1106 } 1107 1108 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1109 1110 return NULL; 1111} 1112 1113static int goto_next_sequence(const u8 *data, int index, int total) 1114{ 1115 u16 len; 1116 1117 /* Skip Sequence Byte. */ 1118 for (index = index + 1; index < total; index += len) { 1119 u8 operation_byte = *(data + index); 1120 index++; 1121 1122 switch (operation_byte) { 1123 case MIPI_SEQ_ELEM_END: 1124 return index; 1125 case MIPI_SEQ_ELEM_SEND_PKT: 1126 if (index + 4 > total) 1127 return 0; 1128 1129 len = *((const u16 *)(data + index + 2)) + 4; 1130 break; 1131 case MIPI_SEQ_ELEM_DELAY: 1132 len = 4; 1133 break; 1134 case MIPI_SEQ_ELEM_GPIO: 1135 len = 2; 1136 break; 1137 case MIPI_SEQ_ELEM_I2C: 1138 if (index + 7 > total) 1139 return 0; 1140 len = *(data + index + 6) + 7; 1141 break; 1142 default: 1143 DRM_ERROR("Unknown operation byte\n"); 1144 return 0; 1145 } 1146 } 1147 1148 return 0; 1149} 1150 1151static int goto_next_sequence_v3(const u8 *data, int index, int total) 1152{ 1153 int seq_end; 1154 u16 len; 1155 u32 size_of_sequence; 1156 1157 /* 1158 * Could skip sequence based on Size of Sequence alone, but also do some 1159 * checking on the structure. 1160 */ 1161 if (total < 5) { 1162 DRM_ERROR("Too small sequence size\n"); 1163 return 0; 1164 } 1165 1166 /* Skip Sequence Byte. */ 1167 index++; 1168 1169 /* 1170 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1171 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1172 * byte. 1173 */ 1174 size_of_sequence = *((const u32 *)(data + index)); 1175 index += 4; 1176 1177 seq_end = index + size_of_sequence; 1178 if (seq_end > total) { 1179 DRM_ERROR("Invalid sequence size\n"); 1180 return 0; 1181 } 1182 1183 for (; index < total; index += len) { 1184 u8 operation_byte = *(data + index); 1185 index++; 1186 1187 if (operation_byte == MIPI_SEQ_ELEM_END) { 1188 if (index != seq_end) { 1189 DRM_ERROR("Invalid element structure\n"); 1190 return 0; 1191 } 1192 return index; 1193 } 1194 1195 len = *(data + index); 1196 index++; 1197 1198 /* 1199 * FIXME: Would be nice to check elements like for v1/v2 in 1200 * goto_next_sequence() above. 1201 */ 1202 switch (operation_byte) { 1203 case MIPI_SEQ_ELEM_SEND_PKT: 1204 case MIPI_SEQ_ELEM_DELAY: 1205 case MIPI_SEQ_ELEM_GPIO: 1206 case MIPI_SEQ_ELEM_I2C: 1207 case MIPI_SEQ_ELEM_SPI: 1208 case MIPI_SEQ_ELEM_PMIC: 1209 break; 1210 default: 1211 DRM_ERROR("Unknown operation byte %u\n", 1212 operation_byte); 1213 break; 1214 } 1215 } 1216 1217 return 0; 1218} 1219 1220/* 1221 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1222 * skip all delay + gpio operands and stop at the first DSI packet op. 1223 */ 1224static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv) 1225{ 1226 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1227 int index, len; 1228 1229 if (WARN_ON(!data || dev_priv->vbt.dsi.seq_version != 1)) 1230 return 0; 1231 1232 /* index = 1 to skip sequence byte */ 1233 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1234 switch (data[index]) { 1235 case MIPI_SEQ_ELEM_SEND_PKT: 1236 return index == 1 ? 0 : index; 1237 case MIPI_SEQ_ELEM_DELAY: 1238 len = 5; /* 1 byte for operand + uint32 */ 1239 break; 1240 case MIPI_SEQ_ELEM_GPIO: 1241 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1242 break; 1243 default: 1244 return 0; 1245 } 1246 } 1247 1248 return 0; 1249} 1250 1251/* 1252 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1253 * The deassert must be done before calling intel_dsi_device_ready, so for 1254 * these devices we split the init OTP sequence into a deassert sequence and 1255 * the actual init OTP part. 1256 */ 1257static void fixup_mipi_sequences(struct drm_i915_private *dev_priv) 1258{ 1259 u8 *init_otp; 1260 int len; 1261 1262 /* Limit this to VLV for now. */ 1263 if (!IS_VALLEYVIEW(dev_priv)) 1264 return; 1265 1266 /* Limit this to v1 vid-mode sequences */ 1267 if (dev_priv->vbt.dsi.config->is_cmd_mode || 1268 dev_priv->vbt.dsi.seq_version != 1) 1269 return; 1270 1271 /* Only do this if there are otp and assert seqs and no deassert seq */ 1272 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1273 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1274 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1275 return; 1276 1277 /* The deassert-sequence ends at the first DSI packet */ 1278 len = get_init_otp_deassert_fragment_len(dev_priv); 1279 if (!len) 1280 return; 1281 1282 DRM_DEBUG_KMS("Using init OTP fragment to deassert reset\n"); 1283 1284 /* Copy the fragment, update seq byte and terminate it */ 1285 init_otp = (u8 *)__UNCONST(dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]); 1286 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1287 if (!dev_priv->vbt.dsi.deassert_seq) 1288 return; 1289 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1290 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1291 /* Use the copy for deassert */ 1292 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1293 dev_priv->vbt.dsi.deassert_seq; 1294 /* Replace the last byte of the fragment with init OTP seq byte */ 1295 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1296 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1297 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1298} 1299 1300static void 1301parse_mipi_sequence(struct drm_i915_private *dev_priv, 1302 const struct bdb_header *bdb) 1303{ 1304 int panel_type = dev_priv->vbt.panel_type; 1305 const struct bdb_mipi_sequence *sequence; 1306 const u8 *seq_data; 1307 u32 seq_size; 1308 u8 *data; 1309 int index = 0; 1310 1311 /* Only our generic panel driver uses the sequence block. */ 1312 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 1313 return; 1314 1315 sequence = find_section(bdb, BDB_MIPI_SEQUENCE); 1316 if (!sequence) { 1317 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n"); 1318 return; 1319 } 1320 1321 /* Fail gracefully for forward incompatible sequence block. */ 1322 if (sequence->version >= 4) { 1323 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n", 1324 sequence->version); 1325 return; 1326 } 1327 1328 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version); 1329 1330 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 1331 if (!seq_data) 1332 return; 1333 1334 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 1335 if (!data) 1336 return; 1337 1338 /* Parse the sequences, store pointers to each sequence. */ 1339 for (;;) { 1340 u8 seq_id = *(data + index); 1341 if (seq_id == MIPI_SEQ_END) 1342 break; 1343 1344 if (seq_id >= MIPI_SEQ_MAX) { 1345 DRM_ERROR("Unknown sequence %u\n", seq_id); 1346 goto err; 1347 } 1348 1349 /* Log about presence of sequences we won't run. */ 1350 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 1351 DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id); 1352 1353 dev_priv->vbt.dsi.sequence[seq_id] = data + index; 1354 1355 if (sequence->version >= 3) 1356 index = goto_next_sequence_v3(data, index, seq_size); 1357 else 1358 index = goto_next_sequence(data, index, seq_size); 1359 if (!index) { 1360 DRM_ERROR("Invalid sequence %u\n", seq_id); 1361 goto err; 1362 } 1363 } 1364 1365 dev_priv->vbt.dsi.data = data; 1366 dev_priv->vbt.dsi.size = seq_size; 1367 dev_priv->vbt.dsi.seq_version = sequence->version; 1368 1369 fixup_mipi_sequences(dev_priv); 1370 1371 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n"); 1372 return; 1373 1374err: 1375 kfree(data); 1376 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); 1377} 1378 1379static void 1380parse_compression_parameters(struct drm_i915_private *i915, 1381 const struct bdb_header *bdb) 1382{ 1383 const struct bdb_compression_parameters *params; 1384 struct display_device_data *devdata; 1385 const struct child_device_config *child; 1386 u16 block_size; 1387 int index; 1388 1389 if (bdb->version < 198) 1390 return; 1391 1392 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS); 1393 if (params) { 1394 /* Sanity checks */ 1395 if (params->entry_size != sizeof(params->data[0])) { 1396 DRM_DEBUG_KMS("VBT: unsupported compression param entry size\n"); 1397 return; 1398 } 1399 1400 block_size = get_blocksize(params); 1401 if (block_size < sizeof(*params)) { 1402 DRM_DEBUG_KMS("VBT: expected 16 compression param entries\n"); 1403 return; 1404 } 1405 } 1406 1407 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 1408 child = &devdata->child; 1409 1410 if (!child->compression_enable) 1411 continue; 1412 1413 if (!params) { 1414 DRM_DEBUG_KMS("VBT: compression params not available\n"); 1415 continue; 1416 } 1417 1418 if (child->compression_method_cps) { 1419 DRM_DEBUG_KMS("VBT: CPS compression not supported\n"); 1420 continue; 1421 } 1422 1423 index = child->compression_structure_index; 1424 1425 devdata->dsc = kmemdup(¶ms->data[index], 1426 sizeof(*devdata->dsc), GFP_KERNEL); 1427 } 1428} 1429 1430static u8 translate_iboost(u8 val) 1431{ 1432 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 1433 1434 if (val >= ARRAY_SIZE(mapping)) { 1435 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 1436 return 0; 1437 } 1438 return mapping[val]; 1439} 1440 1441static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) 1442{ 1443 const struct ddi_vbt_port_info *info; 1444 enum port port; 1445 1446 for_each_port(port) { 1447 info = &i915->vbt.ddi_port_info[port]; 1448 1449 if (info->child && ddc_pin == info->alternate_ddc_pin) 1450 return port; 1451 } 1452 1453 return PORT_NONE; 1454} 1455 1456static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, 1457 enum port port) 1458{ 1459 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1460 enum port p; 1461 1462 if (!info->alternate_ddc_pin) 1463 return; 1464 1465 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin); 1466 if (p != PORT_NONE) { 1467 DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, " 1468 "disabling port %c DVI/HDMI support\n", 1469 port_name(port), info->alternate_ddc_pin, 1470 port_name(p), port_name(p)); 1471 1472 /* 1473 * If we have multiple ports supposedly sharing the 1474 * pin, then dvi/hdmi couldn't exist on the shared 1475 * port. Otherwise they share the same ddc bin and 1476 * system couldn't communicate with them separately. 1477 * 1478 * Give inverse child device order the priority, 1479 * last one wins. Yes, there are real machines 1480 * (eg. Asrock B250M-HDV) where VBT has both 1481 * port A and port E with the same AUX ch and 1482 * we must pick port E :( 1483 */ 1484 info = &dev_priv->vbt.ddi_port_info[p]; 1485 1486 info->supports_dvi = false; 1487 info->supports_hdmi = false; 1488 info->alternate_ddc_pin = 0; 1489 } 1490} 1491 1492static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) 1493{ 1494 const struct ddi_vbt_port_info *info; 1495 enum port port; 1496 1497 for_each_port(port) { 1498 info = &i915->vbt.ddi_port_info[port]; 1499 1500 if (info->child && aux_ch == info->alternate_aux_channel) 1501 return port; 1502 } 1503 1504 return PORT_NONE; 1505} 1506 1507static void sanitize_aux_ch(struct drm_i915_private *dev_priv, 1508 enum port port) 1509{ 1510 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1511 enum port p; 1512 1513 if (!info->alternate_aux_channel) 1514 return; 1515 1516 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel); 1517 if (p != PORT_NONE) { 1518 DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, " 1519 "disabling port %c DP support\n", 1520 port_name(port), info->alternate_aux_channel, 1521 port_name(p), port_name(p)); 1522 1523 /* 1524 * If we have multiple ports supposedlt sharing the 1525 * aux channel, then DP couldn't exist on the shared 1526 * port. Otherwise they share the same aux channel 1527 * and system couldn't communicate with them separately. 1528 * 1529 * Give inverse child device order the priority, 1530 * last one wins. Yes, there are real machines 1531 * (eg. Asrock B250M-HDV) where VBT has both 1532 * port A and port E with the same AUX ch and 1533 * we must pick port E :( 1534 */ 1535 info = &dev_priv->vbt.ddi_port_info[p]; 1536 1537 info->supports_dp = false; 1538 info->alternate_aux_channel = 0; 1539 } 1540} 1541 1542static const u8 cnp_ddc_pin_map[] = { 1543 [0] = 0, /* N/A */ 1544 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT, 1545 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT, 1546 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */ 1547 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */ 1548}; 1549 1550static const u8 icp_ddc_pin_map[] = { 1551 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1552 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1553 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT, 1554 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP, 1555 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP, 1556 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP, 1557 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP, 1558 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP, 1559 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, 1560}; 1561 1562static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin) 1563{ 1564 const u8 *ddc_pin_map; 1565 int n_entries; 1566 1567 if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) { 1568 ddc_pin_map = icp_ddc_pin_map; 1569 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 1570 } else if (HAS_PCH_CNP(dev_priv)) { 1571 ddc_pin_map = cnp_ddc_pin_map; 1572 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 1573 } else { 1574 /* Assuming direct map */ 1575 return vbt_pin; 1576 } 1577 1578 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0) 1579 return ddc_pin_map[vbt_pin]; 1580 1581 DRM_DEBUG_KMS("Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 1582 vbt_pin); 1583 return 0; 1584} 1585 1586static enum port dvo_port_to_port(u8 dvo_port) 1587{ 1588 /* 1589 * Each DDI port can have more than one value on the "DVO Port" field, 1590 * so look for all the possible values for each port. 1591 */ 1592 static const int dvo_ports[][3] = { 1593 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1}, 1594 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1}, 1595 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1}, 1596 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1}, 1597 [PORT_E] = { DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE}, 1598 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1}, 1599 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1}, 1600 }; 1601 enum port port; 1602 int i; 1603 1604 for (port = PORT_A; port < ARRAY_SIZE(dvo_ports); port++) { 1605 for (i = 0; i < ARRAY_SIZE(dvo_ports[port]); i++) { 1606 if (dvo_ports[port][i] == -1) 1607 break; 1608 1609 if (dvo_port == dvo_ports[port][i]) 1610 return port; 1611 } 1612 } 1613 1614 return PORT_NONE; 1615} 1616 1617static void parse_ddi_port(struct drm_i915_private *dev_priv, 1618 struct display_device_data *devdata, 1619 u8 bdb_version) 1620{ 1621 const struct child_device_config *child = &devdata->child; 1622 struct ddi_vbt_port_info *info; 1623 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; 1624 enum port port; 1625 1626 port = dvo_port_to_port(child->dvo_port); 1627 if (port == PORT_NONE) 1628 return; 1629 1630 info = &dev_priv->vbt.ddi_port_info[port]; 1631 1632 if (info->child) { 1633 DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n", 1634 port_name(port)); 1635 return; 1636 } 1637 1638 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 1639 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 1640 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT; 1641 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 1642 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); 1643 1644 if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) { 1645 DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n", 1646 is_hdmi ? "/HDMI" : ""); 1647 is_dvi = false; 1648 is_hdmi = false; 1649 } 1650 1651 info->supports_dvi = is_dvi; 1652 info->supports_hdmi = is_hdmi; 1653 info->supports_dp = is_dp; 1654 info->supports_edp = is_edp; 1655 1656 if (bdb_version >= 195) 1657 info->supports_typec_usb = child->dp_usb_type_c; 1658 1659 if (bdb_version >= 209) 1660 info->supports_tbt = child->tbt; 1661 1662 DRM_DEBUG_KMS("Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 1663 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, 1664 HAS_LSPCON(dev_priv) && child->lspcon, 1665 info->supports_typec_usb, info->supports_tbt, 1666 devdata->dsc != NULL); 1667 1668 if (is_dvi) { 1669 u8 ddc_pin; 1670 1671 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin); 1672 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) { 1673 info->alternate_ddc_pin = ddc_pin; 1674 sanitize_ddc_pin(dev_priv, port); 1675 } else { 1676 DRM_DEBUG_KMS("Port %c has invalid DDC pin %d, " 1677 "sticking to defaults\n", 1678 port_name(port), ddc_pin); 1679 } 1680 } 1681 1682 if (is_dp) { 1683 info->alternate_aux_channel = child->aux_channel; 1684 1685 sanitize_aux_ch(dev_priv, port); 1686 } 1687 1688 if (bdb_version >= 158) { 1689 /* The VBT HDMI level shift values match the table we have. */ 1690 u8 hdmi_level_shift = child->hdmi_level_shifter_value; 1691 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n", 1692 port_name(port), 1693 hdmi_level_shift); 1694 info->hdmi_level_shift = hdmi_level_shift; 1695 info->hdmi_level_shift_set = true; 1696 } 1697 1698 if (bdb_version >= 204) { 1699 int max_tmds_clock; 1700 1701 switch (child->hdmi_max_data_rate) { 1702 default: 1703 MISSING_CASE(child->hdmi_max_data_rate); 1704 /* fall through */ 1705 case HDMI_MAX_DATA_RATE_PLATFORM: 1706 max_tmds_clock = 0; 1707 break; 1708 case HDMI_MAX_DATA_RATE_297: 1709 max_tmds_clock = 297000; 1710 break; 1711 case HDMI_MAX_DATA_RATE_165: 1712 max_tmds_clock = 165000; 1713 break; 1714 } 1715 1716 if (max_tmds_clock) 1717 DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n", 1718 port_name(port), max_tmds_clock); 1719 info->max_tmds_clock = max_tmds_clock; 1720 } 1721 1722 /* Parse the I_boost config for SKL and above */ 1723 if (bdb_version >= 196 && child->iboost) { 1724 info->dp_boost_level = translate_iboost(child->dp_iboost_level); 1725 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n", 1726 port_name(port), info->dp_boost_level); 1727 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level); 1728 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n", 1729 port_name(port), info->hdmi_boost_level); 1730 } 1731 1732 /* DP max link rate for CNL+ */ 1733 if (bdb_version >= 216) { 1734 switch (child->dp_max_link_rate) { 1735 default: 1736 case VBT_DP_MAX_LINK_RATE_HBR3: 1737 info->dp_max_link_rate = 810000; 1738 break; 1739 case VBT_DP_MAX_LINK_RATE_HBR2: 1740 info->dp_max_link_rate = 540000; 1741 break; 1742 case VBT_DP_MAX_LINK_RATE_HBR: 1743 info->dp_max_link_rate = 270000; 1744 break; 1745 case VBT_DP_MAX_LINK_RATE_LBR: 1746 info->dp_max_link_rate = 162000; 1747 break; 1748 } 1749 DRM_DEBUG_KMS("VBT DP max link rate for port %c: %d\n", 1750 port_name(port), info->dp_max_link_rate); 1751 } 1752 1753 info->child = child; 1754} 1755 1756static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version) 1757{ 1758 struct display_device_data *devdata; 1759 1760 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv)) 1761 return; 1762 1763 if (bdb_version < 155) 1764 return; 1765 1766 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) 1767 parse_ddi_port(dev_priv, devdata, bdb_version); 1768} 1769 1770static void 1771parse_general_definitions(struct drm_i915_private *dev_priv, 1772 const struct bdb_header *bdb) 1773{ 1774 const struct bdb_general_definitions *defs; 1775 struct display_device_data *devdata; 1776 const struct child_device_config *child; 1777 int i, child_device_num; 1778 u8 expected_size; 1779 u16 block_size; 1780 int bus_pin; 1781 1782 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 1783 if (!defs) { 1784 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); 1785 return; 1786 } 1787 1788 block_size = get_blocksize(defs); 1789 if (block_size < sizeof(*defs)) { 1790 DRM_DEBUG_KMS("General definitions block too small (%u)\n", 1791 block_size); 1792 return; 1793 } 1794 1795 bus_pin = defs->crt_ddc_gmbus_pin; 1796 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); 1797 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin)) 1798 dev_priv->vbt.crt_ddc_pin = bus_pin; 1799 1800 if (bdb->version < 106) { 1801 expected_size = 22; 1802 } else if (bdb->version < 111) { 1803 expected_size = 27; 1804 } else if (bdb->version < 195) { 1805 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 1806 } else if (bdb->version == 195) { 1807 expected_size = 37; 1808 } else if (bdb->version <= 215) { 1809 expected_size = 38; 1810 } else if (bdb->version <= 229) { 1811 expected_size = 39; 1812 } else { 1813 expected_size = sizeof(*child); 1814 BUILD_BUG_ON(sizeof(*child) < 39); 1815 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n", 1816 bdb->version, expected_size); 1817 } 1818 1819 /* Flag an error for unexpected size, but continue anyway. */ 1820 if (defs->child_dev_size != expected_size) 1821 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n", 1822 defs->child_dev_size, expected_size, bdb->version); 1823 1824 /* The legacy sized child device config is the minimum we need. */ 1825 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 1826 DRM_DEBUG_KMS("Child device config size %u is too small.\n", 1827 defs->child_dev_size); 1828 return; 1829 } 1830 1831 /* get the number of child device */ 1832 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 1833 1834 for (i = 0; i < child_device_num; i++) { 1835 child = child_device_ptr(defs, i); 1836 if (!child->device_type) 1837 continue; 1838 1839 DRM_DEBUG_KMS("Found VBT child device with type 0x%x\n", 1840 child->device_type); 1841 1842 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 1843 if (!devdata) 1844 break; 1845 1846 /* 1847 * Copy as much as we know (sizeof) and is available 1848 * (child_dev_size) of the child device config. Accessing the 1849 * data must depend on VBT version. 1850 */ 1851 memcpy(&devdata->child, child, 1852 min_t(size_t, defs->child_dev_size, sizeof(*child))); 1853 1854 list_add_tail(&devdata->node, &dev_priv->vbt.display_devices); 1855 } 1856 1857 if (list_empty(&dev_priv->vbt.display_devices)) 1858 DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); 1859} 1860 1861/* Common defaults which may be overridden by VBT. */ 1862static void 1863init_vbt_defaults(struct drm_i915_private *dev_priv) 1864{ 1865 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 1866 1867 /* Default to having backlight */ 1868 dev_priv->vbt.backlight.present = true; 1869 1870 /* LFP panel data */ 1871 dev_priv->vbt.lvds_dither = 1; 1872 1873 /* SDVO panel data */ 1874 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 1875 1876 /* general features */ 1877 dev_priv->vbt.int_tv_support = 1; 1878 dev_priv->vbt.int_crt_support = 1; 1879 1880 /* driver features */ 1881 dev_priv->vbt.int_lvds_support = 1; 1882 1883 /* Default to using SSC */ 1884 dev_priv->vbt.lvds_use_ssc = 1; 1885 /* 1886 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 1887 * clock for LVDS. 1888 */ 1889 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv, 1890 !HAS_PCH_SPLIT(dev_priv)); 1891 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq); 1892} 1893 1894/* Defaults to initialize only if there is no VBT. */ 1895static void 1896init_vbt_missing_defaults(struct drm_i915_private *dev_priv) 1897{ 1898 enum port port; 1899 1900 for_each_port(port) { 1901 struct ddi_vbt_port_info *info = 1902 &dev_priv->vbt.ddi_port_info[port]; 1903 enum phy phy = intel_port_to_phy(dev_priv, port); 1904 1905 /* 1906 * VBT has the TypeC mode (native,TBT/USB) and we don't want 1907 * to detect it. 1908 */ 1909 if (intel_phy_is_tc(dev_priv, phy)) 1910 continue; 1911 1912 info->supports_dvi = (port != PORT_A && port != PORT_E); 1913 info->supports_hdmi = info->supports_dvi; 1914 info->supports_dp = (port != PORT_E); 1915 info->supports_edp = (port == PORT_A); 1916 } 1917} 1918 1919static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 1920{ 1921 const void *_vbt = vbt; 1922 1923 return _vbt + vbt->bdb_offset; 1924} 1925 1926/** 1927 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 1928 * @buf: pointer to a buffer to validate 1929 * @size: size of the buffer 1930 * 1931 * Returns true on valid VBT. 1932 */ 1933bool intel_bios_is_valid_vbt(const void *buf, size_t size) 1934{ 1935 const struct vbt_header *vbt = buf; 1936 const struct bdb_header *bdb; 1937 1938 if (!vbt) 1939 return false; 1940 1941 if (sizeof(struct vbt_header) > size) { 1942 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 1943 return false; 1944 } 1945 1946 if (memcmp(vbt->signature, "$VBT", 4)) { 1947 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 1948 return false; 1949 } 1950 1951 if (vbt->vbt_size > size) { 1952 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 1953 return false; 1954 } 1955 1956 size = vbt->vbt_size; 1957 1958 if (range_overflows_t(size_t, 1959 vbt->bdb_offset, 1960 sizeof(struct bdb_header), 1961 size)) { 1962 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 1963 return false; 1964 } 1965 1966 bdb = get_bdb_header(vbt); 1967 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 1968 DRM_DEBUG_DRIVER("BDB incomplete\n"); 1969 return false; 1970 } 1971 1972 return vbt; 1973} 1974 1975#ifdef __NetBSD__ 1976# define __iomem __pci_rom_iomem 1977# define ioread16 fake_ioread16 1978# define ioread32 fake_ioread32 1979static inline uint16_t 1980fake_ioread16(const void __iomem *p) 1981{ 1982 uint16_t v; 1983 1984 v = *(const uint16_t __iomem *)p; 1985 __insn_barrier(); 1986 1987 return v; 1988} 1989static inline uint32_t 1990fake_ioread32(const void __iomem *p) 1991{ 1992 uint32_t v; 1993 1994 v = *(const uint32_t __iomem *)p; 1995 __insn_barrier(); 1996 1997 return v; 1998} 1999#endif 2000 2001static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv) 2002{ 2003 struct pci_dev *pdev = dev_priv->drm.pdev; 2004 void __iomem *p = NULL, *oprom; 2005 struct vbt_header *vbt; 2006 u16 vbt_size; 2007 size_t i, size; 2008 2009 oprom = pci_map_rom(pdev, &size); 2010 if (!oprom) 2011 return NULL; 2012 2013 /* Scour memory looking for the VBT signature. */ 2014 for (i = 0; i + 4 < size; i += 4) { 2015 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 2016 continue; 2017 2018 p = oprom + i; 2019 size -= i; 2020 break; 2021 } 2022 2023 if (!p) 2024 goto err_unmap_oprom; 2025 2026 if (sizeof(struct vbt_header) > size) { 2027 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 2028 goto err_unmap_oprom; 2029 } 2030 2031 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 2032 if (vbt_size > size) { 2033 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2034 goto err_unmap_oprom; 2035 } 2036 2037 /* The rest will be validated by intel_bios_is_valid_vbt() */ 2038 vbt = kmalloc(vbt_size, GFP_KERNEL); 2039 if (!vbt) 2040 goto err_unmap_oprom; 2041 2042 memcpy_fromio(vbt, p, vbt_size); 2043 2044 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2045 goto err_free_vbt; 2046 2047 pci_unmap_rom(pdev, oprom); 2048 2049 return vbt; 2050 2051err_free_vbt: 2052 kfree(vbt); 2053err_unmap_oprom: 2054 pci_unmap_rom(pdev, oprom); 2055 2056 return NULL; 2057} 2058 2059#ifdef __NetBSD__ 2060# undef __iomem 2061# undef ioread32 2062#endif 2063 2064/** 2065 * intel_bios_init - find VBT and initialize settings from the BIOS 2066 * @dev_priv: i915 device instance 2067 * 2068 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 2069 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 2070 * initialize some defaults if the VBT is not present at all. 2071 */ 2072void intel_bios_init(struct drm_i915_private *dev_priv) 2073{ 2074 const struct vbt_header *vbt = dev_priv->opregion.vbt; 2075 struct vbt_header *oprom_vbt = NULL; 2076 const struct bdb_header *bdb; 2077 2078 INIT_LIST_HEAD(&dev_priv->vbt.display_devices); 2079 2080 if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) { 2081 DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n"); 2082 return; 2083 } 2084 2085 init_vbt_defaults(dev_priv); 2086 2087 /* If the OpRegion does not have VBT, look in PCI ROM. */ 2088 if (!vbt) { 2089 oprom_vbt = oprom_get_vbt(dev_priv); 2090 if (!oprom_vbt) 2091 goto out; 2092 2093 vbt = oprom_vbt; 2094 2095 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n"); 2096 } 2097 2098 bdb = get_bdb_header(vbt); 2099 2100 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n", 2101 (int)sizeof(vbt->signature), vbt->signature, bdb->version); 2102 2103 /* Grab useful general definitions */ 2104 parse_general_features(dev_priv, bdb); 2105 parse_general_definitions(dev_priv, bdb); 2106 parse_panel_options(dev_priv, bdb); 2107 parse_panel_dtd(dev_priv, bdb); 2108 parse_lfp_backlight(dev_priv, bdb); 2109 parse_sdvo_panel_data(dev_priv, bdb); 2110 parse_driver_features(dev_priv, bdb); 2111 parse_power_conservation_features(dev_priv, bdb); 2112 parse_edp(dev_priv, bdb); 2113 parse_psr(dev_priv, bdb); 2114 parse_mipi_config(dev_priv, bdb); 2115 parse_mipi_sequence(dev_priv, bdb); 2116 2117 /* Depends on child device list */ 2118 parse_compression_parameters(dev_priv, bdb); 2119 2120 /* Further processing on pre-parsed data */ 2121 parse_sdvo_device_mapping(dev_priv, bdb->version); 2122 parse_ddi_ports(dev_priv, bdb->version); 2123 2124out: 2125 if (!vbt) { 2126 DRM_INFO("Failed to find VBIOS tables (VBT)\n"); 2127 init_vbt_missing_defaults(dev_priv); 2128 } 2129 2130 kfree(oprom_vbt); 2131} 2132 2133/** 2134 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 2135 * @dev_priv: i915 device instance 2136 */ 2137void intel_bios_driver_remove(struct drm_i915_private *dev_priv) 2138{ 2139 struct display_device_data *devdata, *n; 2140 2141 list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) { 2142 list_del(&devdata->node); 2143 kfree(devdata->dsc); 2144 kfree(devdata); 2145 } 2146 2147 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode); 2148 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 2149 kfree(dev_priv->vbt.lfp_lvds_vbt_mode); 2150 dev_priv->vbt.lfp_lvds_vbt_mode = NULL; 2151 kfree(dev_priv->vbt.dsi.data); 2152 dev_priv->vbt.dsi.data = NULL; 2153 kfree(dev_priv->vbt.dsi.pps); 2154 dev_priv->vbt.dsi.pps = NULL; 2155 kfree(dev_priv->vbt.dsi.config); 2156 dev_priv->vbt.dsi.config = NULL; 2157 kfree(dev_priv->vbt.dsi.deassert_seq); 2158 dev_priv->vbt.dsi.deassert_seq = NULL; 2159} 2160 2161/** 2162 * intel_bios_is_tv_present - is integrated TV present in VBT 2163 * @dev_priv: i915 device instance 2164 * 2165 * Return true if TV is present. If no child devices were parsed from VBT, 2166 * assume TV is present. 2167 */ 2168bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv) 2169{ 2170 const struct display_device_data *devdata; 2171 const struct child_device_config *child; 2172 2173 if (!dev_priv->vbt.int_tv_support) 2174 return false; 2175 2176 if (list_empty(&dev_priv->vbt.display_devices)) 2177 return true; 2178 2179 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2180 child = &devdata->child; 2181 2182 /* 2183 * If the device type is not TV, continue. 2184 */ 2185 switch (child->device_type) { 2186 case DEVICE_TYPE_INT_TV: 2187 case DEVICE_TYPE_TV: 2188 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 2189 break; 2190 default: 2191 continue; 2192 } 2193 /* Only when the addin_offset is non-zero, it is regarded 2194 * as present. 2195 */ 2196 if (child->addin_offset) 2197 return true; 2198 } 2199 2200 return false; 2201} 2202 2203/** 2204 * intel_bios_is_lvds_present - is LVDS present in VBT 2205 * @dev_priv: i915 device instance 2206 * @i2c_pin: i2c pin for LVDS if present 2207 * 2208 * Return true if LVDS is present. If no child devices were parsed from VBT, 2209 * assume LVDS is present. 2210 */ 2211bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin) 2212{ 2213 const struct display_device_data *devdata; 2214 const struct child_device_config *child; 2215 2216 if (list_empty(&dev_priv->vbt.display_devices)) 2217 return true; 2218 2219 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2220 child = &devdata->child; 2221 2222 /* If the device type is not LFP, continue. 2223 * We have to check both the new identifiers as well as the 2224 * old for compatibility with some BIOSes. 2225 */ 2226 if (child->device_type != DEVICE_TYPE_INT_LFP && 2227 child->device_type != DEVICE_TYPE_LFP) 2228 continue; 2229 2230 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin)) 2231 *i2c_pin = child->i2c_pin; 2232 2233 /* However, we cannot trust the BIOS writers to populate 2234 * the VBT correctly. Since LVDS requires additional 2235 * information from AIM blocks, a non-zero addin offset is 2236 * a good indicator that the LVDS is actually present. 2237 */ 2238 if (child->addin_offset) 2239 return true; 2240 2241 /* But even then some BIOS writers perform some black magic 2242 * and instantiate the device without reference to any 2243 * additional data. Trust that if the VBT was written into 2244 * the OpRegion then they have validated the LVDS's existence. 2245 */ 2246 if (dev_priv->opregion.vbt) 2247 return true; 2248 } 2249 2250 return false; 2251} 2252 2253/** 2254 * intel_bios_is_port_present - is the specified digital port present 2255 * @dev_priv: i915 device instance 2256 * @port: port to check 2257 * 2258 * Return true if the device in %port is present. 2259 */ 2260bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port) 2261{ 2262 const struct display_device_data *devdata; 2263 const struct child_device_config *child; 2264 static const struct { 2265 u16 dp, hdmi; 2266 } port_mapping[] = { 2267 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2268 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2269 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2270 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2271 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2272 }; 2273 2274 if (HAS_DDI(dev_priv)) { 2275 const struct ddi_vbt_port_info *port_info = 2276 &dev_priv->vbt.ddi_port_info[port]; 2277 2278 return port_info->supports_dp || 2279 port_info->supports_dvi || 2280 port_info->supports_hdmi; 2281 } 2282 2283 /* FIXME maybe deal with port A as well? */ 2284 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping)) 2285 return false; 2286 2287 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2288 child = &devdata->child; 2289 2290 if ((child->dvo_port == port_mapping[port].dp || 2291 child->dvo_port == port_mapping[port].hdmi) && 2292 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING | 2293 DEVICE_TYPE_DISPLAYPORT_OUTPUT))) 2294 return true; 2295 } 2296 2297 return false; 2298} 2299 2300/** 2301 * intel_bios_is_port_edp - is the device in given port eDP 2302 * @dev_priv: i915 device instance 2303 * @port: port to check 2304 * 2305 * Return true if the device in %port is eDP. 2306 */ 2307bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port) 2308{ 2309 const struct display_device_data *devdata; 2310 const struct child_device_config *child; 2311 static const short port_mapping[] = { 2312 [PORT_B] = DVO_PORT_DPB, 2313 [PORT_C] = DVO_PORT_DPC, 2314 [PORT_D] = DVO_PORT_DPD, 2315 [PORT_E] = DVO_PORT_DPE, 2316 [PORT_F] = DVO_PORT_DPF, 2317 }; 2318 2319 if (HAS_DDI(dev_priv)) 2320 return dev_priv->vbt.ddi_port_info[port].supports_edp; 2321 2322 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2323 child = &devdata->child; 2324 2325 if (child->dvo_port == port_mapping[port] && 2326 (child->device_type & DEVICE_TYPE_eDP_BITS) == 2327 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS)) 2328 return true; 2329 } 2330 2331 return false; 2332} 2333 2334static bool child_dev_is_dp_dual_mode(const struct child_device_config *child, 2335 enum port port) 2336{ 2337 static const struct { 2338 u16 dp, hdmi; 2339 } port_mapping[] = { 2340 /* 2341 * Buggy VBTs may declare DP ports as having 2342 * HDMI type dvo_port :( So let's check both. 2343 */ 2344 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2345 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2346 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2347 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2348 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2349 }; 2350 2351 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping)) 2352 return false; 2353 2354 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) != 2355 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS)) 2356 return false; 2357 2358 if (child->dvo_port == port_mapping[port].dp) 2359 return true; 2360 2361 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 2362 if (child->dvo_port == port_mapping[port].hdmi && 2363 child->aux_channel != 0) 2364 return true; 2365 2366 return false; 2367} 2368 2369bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, 2370 enum port port) 2371{ 2372 const struct display_device_data *devdata; 2373 2374 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2375 if (child_dev_is_dp_dual_mode(&devdata->child, port)) 2376 return true; 2377 } 2378 2379 return false; 2380} 2381 2382/** 2383 * intel_bios_is_dsi_present - is DSI present in VBT 2384 * @dev_priv: i915 device instance 2385 * @port: port for DSI if present 2386 * 2387 * Return true if DSI is present, and return the port in %port. 2388 */ 2389bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, 2390 enum port *port) 2391{ 2392 const struct display_device_data *devdata; 2393 const struct child_device_config *child; 2394 u8 dvo_port; 2395 2396 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2397 child = &devdata->child; 2398 2399 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2400 continue; 2401 2402 dvo_port = child->dvo_port; 2403 2404 if (dvo_port == DVO_PORT_MIPIA || 2405 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) || 2406 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) { 2407 if (port) 2408 *port = dvo_port - DVO_PORT_MIPIA; 2409 return true; 2410 } else if (dvo_port == DVO_PORT_MIPIB || 2411 dvo_port == DVO_PORT_MIPIC || 2412 dvo_port == DVO_PORT_MIPID) { 2413 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n", 2414 port_name(dvo_port - DVO_PORT_MIPIA)); 2415 } 2416 } 2417 2418 return false; 2419} 2420 2421static void fill_dsc(struct intel_crtc_state *crtc_state, 2422 struct dsc_compression_parameters_entry *dsc, 2423 int dsc_max_bpc) 2424{ 2425 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 2426 int bpc = 8; 2427 2428 vdsc_cfg->dsc_version_major = dsc->version_major; 2429 vdsc_cfg->dsc_version_minor = dsc->version_minor; 2430 2431 if (dsc->support_12bpc && dsc_max_bpc >= 12) 2432 bpc = 12; 2433 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 2434 bpc = 10; 2435 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 2436 bpc = 8; 2437 else 2438 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 2439 dsc_max_bpc); 2440 2441 crtc_state->pipe_bpp = bpc * 3; 2442 2443 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 2444 VBT_DSC_MAX_BPP(dsc->max_bpp)); 2445 2446 /* 2447 * FIXME: This is ugly, and slice count should take DSC engine 2448 * throughput etc. into account. 2449 * 2450 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 2451 */ 2452 if (dsc->slices_per_line & BIT(2)) { 2453 crtc_state->dsc.slice_count = 4; 2454 } else if (dsc->slices_per_line & BIT(1)) { 2455 crtc_state->dsc.slice_count = 2; 2456 } else { 2457 /* FIXME */ 2458 if (!(dsc->slices_per_line & BIT(0))) 2459 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 2460 2461 crtc_state->dsc.slice_count = 1; 2462 } 2463 2464 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 2465 crtc_state->dsc.slice_count != 0) 2466 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 2467 crtc_state->hw.adjusted_mode.crtc_hdisplay, 2468 crtc_state->dsc.slice_count); 2469 2470 /* 2471 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the 2472 * implementation specific physical rate buffer size. Currently we use 2473 * the required rate buffer model size calculated in 2474 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E. 2475 * 2476 * The VBT rc_buffer_block_size and rc_buffer_size definitions 2477 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC 2478 * implementation should also use the DPCD (or perhaps VBT for eDP) 2479 * provided value for the buffer size. 2480 */ 2481 2482 /* FIXME: DSI spec says bpc + 1 for this one */ 2483 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 2484 2485 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 2486 2487 vdsc_cfg->slice_height = dsc->slice_height; 2488} 2489 2490/* FIXME: initially DSI specific */ 2491bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 2492 struct intel_crtc_state *crtc_state, 2493 int dsc_max_bpc) 2494{ 2495 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2496 const struct display_device_data *devdata; 2497 const struct child_device_config *child; 2498 2499 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2500 child = &devdata->child; 2501 2502 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2503 continue; 2504 2505 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) { 2506 if (!devdata->dsc) 2507 return false; 2508 2509 if (crtc_state) 2510 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 2511 2512 return true; 2513 } 2514 } 2515 2516 return false; 2517} 2518 2519/** 2520 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port 2521 * @i915: i915 device instance 2522 * @port: port to check 2523 * 2524 * Return true if HPD should be inverted for %port. 2525 */ 2526bool 2527intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, 2528 enum port port) 2529{ 2530 const struct child_device_config *child = 2531 i915->vbt.ddi_port_info[port].child; 2532 2533 if (WARN_ON_ONCE(!IS_GEN9_LP(i915))) 2534 return false; 2535 2536 return child && child->hpd_invert; 2537} 2538 2539/** 2540 * intel_bios_is_lspcon_present - if LSPCON is attached on %port 2541 * @i915: i915 device instance 2542 * @port: port to check 2543 * 2544 * Return true if LSPCON is present on this port 2545 */ 2546bool 2547intel_bios_is_lspcon_present(const struct drm_i915_private *i915, 2548 enum port port) 2549{ 2550 const struct child_device_config *child = 2551 i915->vbt.ddi_port_info[port].child; 2552 2553 return HAS_LSPCON(i915) && child && child->lspcon; 2554} 2555 2556enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, 2557 enum port port) 2558{ 2559 const struct ddi_vbt_port_info *info = 2560 &dev_priv->vbt.ddi_port_info[port]; 2561 enum aux_ch aux_ch; 2562 2563 if (!info->alternate_aux_channel) { 2564 aux_ch = (enum aux_ch)port; 2565 2566 DRM_DEBUG_KMS("using AUX %c for port %c (platform default)\n", 2567 aux_ch_name(aux_ch), port_name(port)); 2568 return aux_ch; 2569 } 2570 2571 switch (info->alternate_aux_channel) { 2572 case DP_AUX_A: 2573 aux_ch = AUX_CH_A; 2574 break; 2575 case DP_AUX_B: 2576 aux_ch = AUX_CH_B; 2577 break; 2578 case DP_AUX_C: 2579 aux_ch = AUX_CH_C; 2580 break; 2581 case DP_AUX_D: 2582 aux_ch = AUX_CH_D; 2583 break; 2584 case DP_AUX_E: 2585 aux_ch = AUX_CH_E; 2586 break; 2587 case DP_AUX_F: 2588 aux_ch = AUX_CH_F; 2589 break; 2590 case DP_AUX_G: 2591 aux_ch = AUX_CH_G; 2592 break; 2593 default: 2594 MISSING_CASE(info->alternate_aux_channel); 2595 aux_ch = AUX_CH_A; 2596 break; 2597 } 2598 2599 DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n", 2600 aux_ch_name(aux_ch), port_name(port)); 2601 2602 return aux_ch; 2603} 2604