1/*	$NetBSD: smumgr.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $	*/
2
3/*
4 * Copyright 2015 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 */
25#ifndef _SMUMGR_H_
26#define _SMUMGR_H_
27#include <linux/types.h>
28#include "amd_powerplay.h"
29#include "hwmgr.h"
30
31enum SMU_TABLE {
32	SMU_UVD_TABLE = 0,
33	SMU_VCE_TABLE,
34	SMU_BIF_TABLE,
35};
36
37enum SMU_TYPE {
38	SMU_SoftRegisters = 0,
39	SMU_Discrete_DpmTable,
40};
41
42enum SMU_MEMBER {
43	HandshakeDisables = 0,
44	VoltageChangeTimeout,
45	AverageGraphicsActivity,
46	AverageMemoryActivity,
47	PreVBlankGap,
48	VBlankTimeout,
49	UcodeLoadStatus,
50	UvdBootLevel,
51	VceBootLevel,
52	LowSclkInterruptThreshold,
53	DRAM_LOG_ADDR_H,
54	DRAM_LOG_ADDR_L,
55	DRAM_LOG_PHY_ADDR_H,
56	DRAM_LOG_PHY_ADDR_L,
57	DRAM_LOG_BUFF_SIZE,
58};
59
60
61enum SMU_MAC_DEFINITION {
62	SMU_MAX_LEVELS_GRAPHICS = 0,
63	SMU_MAX_LEVELS_MEMORY,
64	SMU_MAX_LEVELS_LINK,
65	SMU_MAX_ENTRIES_SMIO,
66	SMU_MAX_LEVELS_VDDC,
67	SMU_MAX_LEVELS_VDDGFX,
68	SMU_MAX_LEVELS_VDDCI,
69	SMU_MAX_LEVELS_MVDD,
70	SMU_UVD_MCLK_HANDSHAKE_DISABLE,
71};
72
73enum SMU9_TABLE_ID {
74	PPTABLE = 0,
75	WMTABLE,
76	AVFSTABLE,
77	TOOLSTABLE,
78	AVFSFUSETABLE
79};
80
81enum SMU10_TABLE_ID {
82	SMU10_WMTABLE = 0,
83	SMU10_CLOCKTABLE,
84};
85
86extern uint32_t smum_get_argument(struct pp_hwmgr *hwmgr);
87
88extern int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table);
89
90extern int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr);
91
92extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg);
93
94extern int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
95					uint16_t msg, uint32_t parameter);
96
97extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr);
98
99extern int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type);
100extern int smum_process_firmware_header(struct pp_hwmgr *hwmgr);
101extern int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr);
102extern int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr);
103extern int smum_init_smc_table(struct pp_hwmgr *hwmgr);
104extern int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr);
105extern int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr);
106extern int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr);
107extern uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr,
108				uint32_t type, uint32_t member);
109extern uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value);
110
111extern bool smum_is_dpm_running(struct pp_hwmgr *hwmgr);
112
113extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);
114
115extern int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting);
116
117extern int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw);
118
119#endif
120