1/*	$NetBSD: arcturus_ppt.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $	*/
2
3/*
4 * Copyright 2019 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 */
25#ifndef __ARCTURUS_PPT_H__
26#define __ARCTURUS_PPT_H__
27
28#define ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL         0x3
29#define ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL         0x3
30#define ARCTURUS_UMD_PSTATE_MCLK_LEVEL           0x2
31
32#define MAX_DPM_NUMBER 16
33#define MAX_PCIE_CONF 2
34
35struct arcturus_dpm_level {
36        bool            enabled;
37        uint32_t        value;
38        uint32_t        param1;
39};
40
41struct arcturus_dpm_state {
42        uint32_t  soft_min_level;
43        uint32_t  soft_max_level;
44        uint32_t  hard_min_level;
45        uint32_t  hard_max_level;
46};
47
48struct arcturus_single_dpm_table {
49        uint32_t                count;
50        struct arcturus_dpm_state dpm_state;
51        struct arcturus_dpm_level dpm_levels[MAX_DPM_NUMBER];
52};
53
54struct arcturus_pcie_table {
55        uint16_t count;
56        uint8_t  pcie_gen[MAX_PCIE_CONF];
57        uint8_t  pcie_lane[MAX_PCIE_CONF];
58        uint32_t lclk[MAX_PCIE_CONF];
59};
60
61struct arcturus_dpm_table {
62        struct arcturus_single_dpm_table  soc_table;
63        struct arcturus_single_dpm_table  gfx_table;
64        struct arcturus_single_dpm_table  mem_table;
65        struct arcturus_single_dpm_table  eclk_table;
66        struct arcturus_single_dpm_table  vclk_table;
67        struct arcturus_single_dpm_table  dclk_table;
68        struct arcturus_single_dpm_table  fclk_table;
69        struct arcturus_pcie_table        pcie_table;
70};
71
72extern void arcturus_set_ppt_funcs(struct smu_context *smu);
73
74#endif
75