1/*	$NetBSD: dce_8_0_enum.h,v 1.2 2021/12/18 23:45:11 riastradh Exp $	*/
2
3/*
4 * DCE_8_0 Register documentation
5 *
6 * Copyright (C) 2016  Advanced Micro Devices, Inc.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included
16 * in all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
22 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
23 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26#ifndef DCE_8_0_ENUM_H
27#define DCE_8_0_ENUM_H
28
29typedef enum SurfaceEndian {
30	ENDIAN_NONE                                      = 0x0,
31	ENDIAN_8IN16                                     = 0x1,
32	ENDIAN_8IN32                                     = 0x2,
33	ENDIAN_8IN64                                     = 0x3,
34} SurfaceEndian;
35typedef enum ArrayMode {
36	ARRAY_LINEAR_GENERAL                             = 0x0,
37	ARRAY_LINEAR_ALIGNED                             = 0x1,
38	ARRAY_1D_TILED_THIN1                             = 0x2,
39	ARRAY_1D_TILED_THICK                             = 0x3,
40	ARRAY_2D_TILED_THIN1                             = 0x4,
41	ARRAY_PRT_TILED_THIN1                            = 0x5,
42	ARRAY_PRT_2D_TILED_THIN1                         = 0x6,
43	ARRAY_2D_TILED_THICK                             = 0x7,
44	ARRAY_2D_TILED_XTHICK                            = 0x8,
45	ARRAY_PRT_TILED_THICK                            = 0x9,
46	ARRAY_PRT_2D_TILED_THICK                         = 0xa,
47	ARRAY_PRT_3D_TILED_THIN1                         = 0xb,
48	ARRAY_3D_TILED_THIN1                             = 0xc,
49	ARRAY_3D_TILED_THICK                             = 0xd,
50	ARRAY_3D_TILED_XTHICK                            = 0xe,
51	ARRAY_PRT_3D_TILED_THICK                         = 0xf,
52} ArrayMode;
53typedef enum PipeTiling {
54	CONFIG_1_PIPE                                    = 0x0,
55	CONFIG_2_PIPE                                    = 0x1,
56	CONFIG_4_PIPE                                    = 0x2,
57	CONFIG_8_PIPE                                    = 0x3,
58} PipeTiling;
59typedef enum BankTiling {
60	CONFIG_4_BANK                                    = 0x0,
61	CONFIG_8_BANK                                    = 0x1,
62} BankTiling;
63typedef enum GroupInterleave {
64	CONFIG_256B_GROUP                                = 0x0,
65	CONFIG_512B_GROUP                                = 0x1,
66} GroupInterleave;
67typedef enum RowTiling {
68	CONFIG_1KB_ROW                                   = 0x0,
69	CONFIG_2KB_ROW                                   = 0x1,
70	CONFIG_4KB_ROW                                   = 0x2,
71	CONFIG_8KB_ROW                                   = 0x3,
72	CONFIG_1KB_ROW_OPT                               = 0x4,
73	CONFIG_2KB_ROW_OPT                               = 0x5,
74	CONFIG_4KB_ROW_OPT                               = 0x6,
75	CONFIG_8KB_ROW_OPT                               = 0x7,
76} RowTiling;
77typedef enum BankSwapBytes {
78	CONFIG_128B_SWAPS                                = 0x0,
79	CONFIG_256B_SWAPS                                = 0x1,
80	CONFIG_512B_SWAPS                                = 0x2,
81	CONFIG_1KB_SWAPS                                 = 0x3,
82} BankSwapBytes;
83typedef enum SampleSplitBytes {
84	CONFIG_1KB_SPLIT                                 = 0x0,
85	CONFIG_2KB_SPLIT                                 = 0x1,
86	CONFIG_4KB_SPLIT                                 = 0x2,
87	CONFIG_8KB_SPLIT                                 = 0x3,
88} SampleSplitBytes;
89typedef enum NumPipes {
90	ADDR_CONFIG_1_PIPE                               = 0x0,
91	ADDR_CONFIG_2_PIPE                               = 0x1,
92	ADDR_CONFIG_4_PIPE                               = 0x2,
93	ADDR_CONFIG_8_PIPE                               = 0x3,
94} NumPipes;
95typedef enum PipeInterleaveSize {
96	ADDR_CONFIG_PIPE_INTERLEAVE_256B                 = 0x0,
97	ADDR_CONFIG_PIPE_INTERLEAVE_512B                 = 0x1,
98} PipeInterleaveSize;
99typedef enum BankInterleaveSize {
100	ADDR_CONFIG_BANK_INTERLEAVE_1                    = 0x0,
101	ADDR_CONFIG_BANK_INTERLEAVE_2                    = 0x1,
102	ADDR_CONFIG_BANK_INTERLEAVE_4                    = 0x2,
103	ADDR_CONFIG_BANK_INTERLEAVE_8                    = 0x3,
104} BankInterleaveSize;
105typedef enum NumShaderEngines {
106	ADDR_CONFIG_1_SHADER_ENGINE                      = 0x0,
107	ADDR_CONFIG_2_SHADER_ENGINE                      = 0x1,
108} NumShaderEngines;
109typedef enum ShaderEngineTileSize {
110	ADDR_CONFIG_SE_TILE_16                           = 0x0,
111	ADDR_CONFIG_SE_TILE_32                           = 0x1,
112} ShaderEngineTileSize;
113typedef enum NumGPUs {
114	ADDR_CONFIG_1_GPU                                = 0x0,
115	ADDR_CONFIG_2_GPU                                = 0x1,
116	ADDR_CONFIG_4_GPU                                = 0x2,
117} NumGPUs;
118typedef enum MultiGPUTileSize {
119	ADDR_CONFIG_GPU_TILE_16                          = 0x0,
120	ADDR_CONFIG_GPU_TILE_32                          = 0x1,
121	ADDR_CONFIG_GPU_TILE_64                          = 0x2,
122	ADDR_CONFIG_GPU_TILE_128                         = 0x3,
123} MultiGPUTileSize;
124typedef enum RowSize {
125	ADDR_CONFIG_1KB_ROW                              = 0x0,
126	ADDR_CONFIG_2KB_ROW                              = 0x1,
127	ADDR_CONFIG_4KB_ROW                              = 0x2,
128} RowSize;
129typedef enum NumLowerPipes {
130	ADDR_CONFIG_1_LOWER_PIPES                        = 0x0,
131	ADDR_CONFIG_2_LOWER_PIPES                        = 0x1,
132} NumLowerPipes;
133typedef enum DebugBlockId {
134	DBG_CLIENT_BLKID_RESERVED                        = 0x0,
135	DBG_CLIENT_BLKID_dbg                             = 0x1,
136	DBG_CLIENT_BLKID_uvdu_0                          = 0x2,
137	DBG_CLIENT_BLKID_uvdu_1                          = 0x3,
138	DBG_CLIENT_BLKID_uvdu_2                          = 0x4,
139	DBG_CLIENT_BLKID_uvdu_3                          = 0x5,
140	DBG_CLIENT_BLKID_uvdu_4                          = 0x6,
141	DBG_CLIENT_BLKID_uvdu_5                          = 0x7,
142	DBG_CLIENT_BLKID_uvdu_6                          = 0x8,
143	DBG_CLIENT_BLKID_uvdm_0                          = 0x9,
144	DBG_CLIENT_BLKID_uvdm_1                          = 0xa,
145	DBG_CLIENT_BLKID_uvdm_2                          = 0xb,
146	DBG_CLIENT_BLKID_uvdm_3                          = 0xc,
147	DBG_CLIENT_BLKID_vcea_0                          = 0xd,
148	DBG_CLIENT_BLKID_vcea_1                          = 0xe,
149	DBG_CLIENT_BLKID_vcea_2                          = 0xf,
150	DBG_CLIENT_BLKID_vcea_3                          = 0x10,
151	DBG_CLIENT_BLKID_vcea_4                          = 0x11,
152	DBG_CLIENT_BLKID_vcea_5                          = 0x12,
153	DBG_CLIENT_BLKID_vcea_6                          = 0x13,
154	DBG_CLIENT_BLKID_vceb_0                          = 0x14,
155	DBG_CLIENT_BLKID_vceb_1                          = 0x15,
156	DBG_CLIENT_BLKID_vceb_2                          = 0x16,
157	DBG_CLIENT_BLKID_dco                             = 0x17,
158	DBG_CLIENT_BLKID_xdma                            = 0x18,
159	DBG_CLIENT_BLKID_smu_0                           = 0x19,
160	DBG_CLIENT_BLKID_smu_1                           = 0x1a,
161	DBG_CLIENT_BLKID_smu_2                           = 0x1b,
162	DBG_CLIENT_BLKID_gck                             = 0x1c,
163	DBG_CLIENT_BLKID_tmonw0                          = 0x1d,
164	DBG_CLIENT_BLKID_tmonw1                          = 0x1e,
165	DBG_CLIENT_BLKID_grbm                            = 0x1f,
166	DBG_CLIENT_BLKID_rlc                             = 0x20,
167	DBG_CLIENT_BLKID_ds0                             = 0x21,
168	DBG_CLIENT_BLKID_cpg_0                           = 0x22,
169	DBG_CLIENT_BLKID_cpg_1                           = 0x23,
170	DBG_CLIENT_BLKID_cpc_0                           = 0x24,
171	DBG_CLIENT_BLKID_cpc_1                           = 0x25,
172	DBG_CLIENT_BLKID_cpf                             = 0x26,
173	DBG_CLIENT_BLKID_scf0                            = 0x27,
174	DBG_CLIENT_BLKID_scf1                            = 0x28,
175	DBG_CLIENT_BLKID_scf2                            = 0x29,
176	DBG_CLIENT_BLKID_scf3                            = 0x2a,
177	DBG_CLIENT_BLKID_pc0                             = 0x2b,
178	DBG_CLIENT_BLKID_pc1                             = 0x2c,
179	DBG_CLIENT_BLKID_pc2                             = 0x2d,
180	DBG_CLIENT_BLKID_pc3                             = 0x2e,
181	DBG_CLIENT_BLKID_vgt0                            = 0x2f,
182	DBG_CLIENT_BLKID_vgt1                            = 0x30,
183	DBG_CLIENT_BLKID_vgt2                            = 0x31,
184	DBG_CLIENT_BLKID_vgt3                            = 0x32,
185	DBG_CLIENT_BLKID_sx00                            = 0x33,
186	DBG_CLIENT_BLKID_sx10                            = 0x34,
187	DBG_CLIENT_BLKID_sx20                            = 0x35,
188	DBG_CLIENT_BLKID_sx30                            = 0x36,
189	DBG_CLIENT_BLKID_cb001                           = 0x37,
190	DBG_CLIENT_BLKID_cb200                           = 0x38,
191	DBG_CLIENT_BLKID_cb201                           = 0x39,
192	DBG_CLIENT_BLKID_cbr0                            = 0x3a,
193	DBG_CLIENT_BLKID_cb000                           = 0x3b,
194	DBG_CLIENT_BLKID_cb101                           = 0x3c,
195	DBG_CLIENT_BLKID_cb300                           = 0x3d,
196	DBG_CLIENT_BLKID_cb301                           = 0x3e,
197	DBG_CLIENT_BLKID_cbr1                            = 0x3f,
198	DBG_CLIENT_BLKID_cb100                           = 0x40,
199	DBG_CLIENT_BLKID_ia0                             = 0x41,
200	DBG_CLIENT_BLKID_ia1                             = 0x42,
201	DBG_CLIENT_BLKID_bci0                            = 0x43,
202	DBG_CLIENT_BLKID_bci1                            = 0x44,
203	DBG_CLIENT_BLKID_bci2                            = 0x45,
204	DBG_CLIENT_BLKID_bci3                            = 0x46,
205	DBG_CLIENT_BLKID_pa0                             = 0x47,
206	DBG_CLIENT_BLKID_pa1                             = 0x48,
207	DBG_CLIENT_BLKID_spim0                           = 0x49,
208	DBG_CLIENT_BLKID_spim1                           = 0x4a,
209	DBG_CLIENT_BLKID_spim2                           = 0x4b,
210	DBG_CLIENT_BLKID_spim3                           = 0x4c,
211	DBG_CLIENT_BLKID_sdma                            = 0x4d,
212	DBG_CLIENT_BLKID_ih                              = 0x4e,
213	DBG_CLIENT_BLKID_sem                             = 0x4f,
214	DBG_CLIENT_BLKID_srbm                            = 0x50,
215	DBG_CLIENT_BLKID_hdp                             = 0x51,
216	DBG_CLIENT_BLKID_acp_0                           = 0x52,
217	DBG_CLIENT_BLKID_acp_1                           = 0x53,
218	DBG_CLIENT_BLKID_sam                             = 0x54,
219	DBG_CLIENT_BLKID_mcc0                            = 0x55,
220	DBG_CLIENT_BLKID_mcc1                            = 0x56,
221	DBG_CLIENT_BLKID_mcc2                            = 0x57,
222	DBG_CLIENT_BLKID_mcc3                            = 0x58,
223	DBG_CLIENT_BLKID_mcd0                            = 0x59,
224	DBG_CLIENT_BLKID_mcd1                            = 0x5a,
225	DBG_CLIENT_BLKID_mcd2                            = 0x5b,
226	DBG_CLIENT_BLKID_mcd3                            = 0x5c,
227	DBG_CLIENT_BLKID_mcb                             = 0x5d,
228	DBG_CLIENT_BLKID_vmc                             = 0x5e,
229	DBG_CLIENT_BLKID_gmcon                           = 0x5f,
230	DBG_CLIENT_BLKID_gdc_0                           = 0x60,
231	DBG_CLIENT_BLKID_gdc_1                           = 0x61,
232	DBG_CLIENT_BLKID_gdc_2                           = 0x62,
233	DBG_CLIENT_BLKID_gdc_3                           = 0x63,
234	DBG_CLIENT_BLKID_gdc_4                           = 0x64,
235	DBG_CLIENT_BLKID_gdc_5                           = 0x65,
236	DBG_CLIENT_BLKID_gdc_6                           = 0x66,
237	DBG_CLIENT_BLKID_gdc_7                           = 0x67,
238	DBG_CLIENT_BLKID_gdc_8                           = 0x68,
239	DBG_CLIENT_BLKID_gdc_9                           = 0x69,
240	DBG_CLIENT_BLKID_gdc_10                          = 0x6a,
241	DBG_CLIENT_BLKID_gdc_11                          = 0x6b,
242	DBG_CLIENT_BLKID_gdc_12                          = 0x6c,
243	DBG_CLIENT_BLKID_gdc_13                          = 0x6d,
244	DBG_CLIENT_BLKID_gdc_14                          = 0x6e,
245	DBG_CLIENT_BLKID_gdc_15                          = 0x6f,
246	DBG_CLIENT_BLKID_gdc_16                          = 0x70,
247	DBG_CLIENT_BLKID_gdc_17                          = 0x71,
248	DBG_CLIENT_BLKID_gdc_18                          = 0x72,
249	DBG_CLIENT_BLKID_gdc_19                          = 0x73,
250	DBG_CLIENT_BLKID_gdc_20                          = 0x74,
251	DBG_CLIENT_BLKID_gdc_21                          = 0x75,
252	DBG_CLIENT_BLKID_gdc_22                          = 0x76,
253	DBG_CLIENT_BLKID_wd                              = 0x77,
254	DBG_CLIENT_BLKID_sdma_0                          = 0x78,
255	DBG_CLIENT_BLKID_sdma_1                          = 0x79,
256} DebugBlockId;
257typedef enum DebugBlockId_OLD {
258	DBG_BLOCK_ID_RESERVED                            = 0x0,
259	DBG_BLOCK_ID_DBG                                 = 0x1,
260	DBG_BLOCK_ID_VMC                                 = 0x2,
261	DBG_BLOCK_ID_PDMA                                = 0x3,
262	DBG_BLOCK_ID_CG                                  = 0x4,
263	DBG_BLOCK_ID_SRBM                                = 0x5,
264	DBG_BLOCK_ID_GRBM                                = 0x6,
265	DBG_BLOCK_ID_RLC                                 = 0x7,
266	DBG_BLOCK_ID_CSC                                 = 0x8,
267	DBG_BLOCK_ID_SEM                                 = 0x9,
268	DBG_BLOCK_ID_IH                                  = 0xa,
269	DBG_BLOCK_ID_SC                                  = 0xb,
270	DBG_BLOCK_ID_SQ                                  = 0xc,
271	DBG_BLOCK_ID_AVP                                 = 0xd,
272	DBG_BLOCK_ID_GMCON                               = 0xe,
273	DBG_BLOCK_ID_SMU                                 = 0xf,
274	DBG_BLOCK_ID_DMA0                                = 0x10,
275	DBG_BLOCK_ID_DMA1                                = 0x11,
276	DBG_BLOCK_ID_SPIM                                = 0x12,
277	DBG_BLOCK_ID_GDS                                 = 0x13,
278	DBG_BLOCK_ID_SPIS                                = 0x14,
279	DBG_BLOCK_ID_UNUSED0                             = 0x15,
280	DBG_BLOCK_ID_PA0                                 = 0x16,
281	DBG_BLOCK_ID_PA1                                 = 0x17,
282	DBG_BLOCK_ID_CP0                                 = 0x18,
283	DBG_BLOCK_ID_CP1                                 = 0x19,
284	DBG_BLOCK_ID_CP2                                 = 0x1a,
285	DBG_BLOCK_ID_UNUSED1                             = 0x1b,
286	DBG_BLOCK_ID_UVDU                                = 0x1c,
287	DBG_BLOCK_ID_UVDM                                = 0x1d,
288	DBG_BLOCK_ID_VCE                                 = 0x1e,
289	DBG_BLOCK_ID_UNUSED2                             = 0x1f,
290	DBG_BLOCK_ID_VGT0                                = 0x20,
291	DBG_BLOCK_ID_VGT1                                = 0x21,
292	DBG_BLOCK_ID_IA                                  = 0x22,
293	DBG_BLOCK_ID_UNUSED3                             = 0x23,
294	DBG_BLOCK_ID_SCT0                                = 0x24,
295	DBG_BLOCK_ID_SCT1                                = 0x25,
296	DBG_BLOCK_ID_SPM0                                = 0x26,
297	DBG_BLOCK_ID_SPM1                                = 0x27,
298	DBG_BLOCK_ID_TCAA                                = 0x28,
299	DBG_BLOCK_ID_TCAB                                = 0x29,
300	DBG_BLOCK_ID_TCCA                                = 0x2a,
301	DBG_BLOCK_ID_TCCB                                = 0x2b,
302	DBG_BLOCK_ID_MCC0                                = 0x2c,
303	DBG_BLOCK_ID_MCC1                                = 0x2d,
304	DBG_BLOCK_ID_MCC2                                = 0x2e,
305	DBG_BLOCK_ID_MCC3                                = 0x2f,
306	DBG_BLOCK_ID_SX0                                 = 0x30,
307	DBG_BLOCK_ID_SX1                                 = 0x31,
308	DBG_BLOCK_ID_SX2                                 = 0x32,
309	DBG_BLOCK_ID_SX3                                 = 0x33,
310	DBG_BLOCK_ID_UNUSED4                             = 0x34,
311	DBG_BLOCK_ID_UNUSED5                             = 0x35,
312	DBG_BLOCK_ID_UNUSED6                             = 0x36,
313	DBG_BLOCK_ID_UNUSED7                             = 0x37,
314	DBG_BLOCK_ID_PC0                                 = 0x38,
315	DBG_BLOCK_ID_PC1                                 = 0x39,
316	DBG_BLOCK_ID_UNUSED8                             = 0x3a,
317	DBG_BLOCK_ID_UNUSED9                             = 0x3b,
318	DBG_BLOCK_ID_UNUSED10                            = 0x3c,
319	DBG_BLOCK_ID_UNUSED11                            = 0x3d,
320	DBG_BLOCK_ID_MCB                                 = 0x3e,
321	DBG_BLOCK_ID_UNUSED12                            = 0x3f,
322	DBG_BLOCK_ID_SCB0                                = 0x40,
323	DBG_BLOCK_ID_SCB1                                = 0x41,
324	DBG_BLOCK_ID_UNUSED13                            = 0x42,
325	DBG_BLOCK_ID_UNUSED14                            = 0x43,
326	DBG_BLOCK_ID_SCF0                                = 0x44,
327	DBG_BLOCK_ID_SCF1                                = 0x45,
328	DBG_BLOCK_ID_UNUSED15                            = 0x46,
329	DBG_BLOCK_ID_UNUSED16                            = 0x47,
330	DBG_BLOCK_ID_BCI0                                = 0x48,
331	DBG_BLOCK_ID_BCI1                                = 0x49,
332	DBG_BLOCK_ID_BCI2                                = 0x4a,
333	DBG_BLOCK_ID_BCI3                                = 0x4b,
334	DBG_BLOCK_ID_UNUSED17                            = 0x4c,
335	DBG_BLOCK_ID_UNUSED18                            = 0x4d,
336	DBG_BLOCK_ID_UNUSED19                            = 0x4e,
337	DBG_BLOCK_ID_UNUSED20                            = 0x4f,
338	DBG_BLOCK_ID_CB00                                = 0x50,
339	DBG_BLOCK_ID_CB01                                = 0x51,
340	DBG_BLOCK_ID_CB02                                = 0x52,
341	DBG_BLOCK_ID_CB03                                = 0x53,
342	DBG_BLOCK_ID_CB04                                = 0x54,
343	DBG_BLOCK_ID_UNUSED21                            = 0x55,
344	DBG_BLOCK_ID_UNUSED22                            = 0x56,
345	DBG_BLOCK_ID_UNUSED23                            = 0x57,
346	DBG_BLOCK_ID_CB10                                = 0x58,
347	DBG_BLOCK_ID_CB11                                = 0x59,
348	DBG_BLOCK_ID_CB12                                = 0x5a,
349	DBG_BLOCK_ID_CB13                                = 0x5b,
350	DBG_BLOCK_ID_CB14                                = 0x5c,
351	DBG_BLOCK_ID_UNUSED24                            = 0x5d,
352	DBG_BLOCK_ID_UNUSED25                            = 0x5e,
353	DBG_BLOCK_ID_UNUSED26                            = 0x5f,
354	DBG_BLOCK_ID_TCP0                                = 0x60,
355	DBG_BLOCK_ID_TCP1                                = 0x61,
356	DBG_BLOCK_ID_TCP2                                = 0x62,
357	DBG_BLOCK_ID_TCP3                                = 0x63,
358	DBG_BLOCK_ID_TCP4                                = 0x64,
359	DBG_BLOCK_ID_TCP5                                = 0x65,
360	DBG_BLOCK_ID_TCP6                                = 0x66,
361	DBG_BLOCK_ID_TCP7                                = 0x67,
362	DBG_BLOCK_ID_TCP8                                = 0x68,
363	DBG_BLOCK_ID_TCP9                                = 0x69,
364	DBG_BLOCK_ID_TCP10                               = 0x6a,
365	DBG_BLOCK_ID_TCP11                               = 0x6b,
366	DBG_BLOCK_ID_TCP12                               = 0x6c,
367	DBG_BLOCK_ID_TCP13                               = 0x6d,
368	DBG_BLOCK_ID_TCP14                               = 0x6e,
369	DBG_BLOCK_ID_TCP15                               = 0x6f,
370	DBG_BLOCK_ID_TCP16                               = 0x70,
371	DBG_BLOCK_ID_TCP17                               = 0x71,
372	DBG_BLOCK_ID_TCP18                               = 0x72,
373	DBG_BLOCK_ID_TCP19                               = 0x73,
374	DBG_BLOCK_ID_TCP20                               = 0x74,
375	DBG_BLOCK_ID_TCP21                               = 0x75,
376	DBG_BLOCK_ID_TCP22                               = 0x76,
377	DBG_BLOCK_ID_TCP23                               = 0x77,
378	DBG_BLOCK_ID_TCP_RESERVED0                       = 0x78,
379	DBG_BLOCK_ID_TCP_RESERVED1                       = 0x79,
380	DBG_BLOCK_ID_TCP_RESERVED2                       = 0x7a,
381	DBG_BLOCK_ID_TCP_RESERVED3                       = 0x7b,
382	DBG_BLOCK_ID_TCP_RESERVED4                       = 0x7c,
383	DBG_BLOCK_ID_TCP_RESERVED5                       = 0x7d,
384	DBG_BLOCK_ID_TCP_RESERVED6                       = 0x7e,
385	DBG_BLOCK_ID_TCP_RESERVED7                       = 0x7f,
386	DBG_BLOCK_ID_DB00                                = 0x80,
387	DBG_BLOCK_ID_DB01                                = 0x81,
388	DBG_BLOCK_ID_DB02                                = 0x82,
389	DBG_BLOCK_ID_DB03                                = 0x83,
390	DBG_BLOCK_ID_DB04                                = 0x84,
391	DBG_BLOCK_ID_UNUSED27                            = 0x85,
392	DBG_BLOCK_ID_UNUSED28                            = 0x86,
393	DBG_BLOCK_ID_UNUSED29                            = 0x87,
394	DBG_BLOCK_ID_DB10                                = 0x88,
395	DBG_BLOCK_ID_DB11                                = 0x89,
396	DBG_BLOCK_ID_DB12                                = 0x8a,
397	DBG_BLOCK_ID_DB13                                = 0x8b,
398	DBG_BLOCK_ID_DB14                                = 0x8c,
399	DBG_BLOCK_ID_UNUSED30                            = 0x8d,
400	DBG_BLOCK_ID_UNUSED31                            = 0x8e,
401	DBG_BLOCK_ID_UNUSED32                            = 0x8f,
402	DBG_BLOCK_ID_TCC0                                = 0x90,
403	DBG_BLOCK_ID_TCC1                                = 0x91,
404	DBG_BLOCK_ID_TCC2                                = 0x92,
405	DBG_BLOCK_ID_TCC3                                = 0x93,
406	DBG_BLOCK_ID_TCC4                                = 0x94,
407	DBG_BLOCK_ID_TCC5                                = 0x95,
408	DBG_BLOCK_ID_TCC6                                = 0x96,
409	DBG_BLOCK_ID_TCC7                                = 0x97,
410	DBG_BLOCK_ID_SPS00                               = 0x98,
411	DBG_BLOCK_ID_SPS01                               = 0x99,
412	DBG_BLOCK_ID_SPS02                               = 0x9a,
413	DBG_BLOCK_ID_SPS10                               = 0x9b,
414	DBG_BLOCK_ID_SPS11                               = 0x9c,
415	DBG_BLOCK_ID_SPS12                               = 0x9d,
416	DBG_BLOCK_ID_UNUSED33                            = 0x9e,
417	DBG_BLOCK_ID_UNUSED34                            = 0x9f,
418	DBG_BLOCK_ID_TA00                                = 0xa0,
419	DBG_BLOCK_ID_TA01                                = 0xa1,
420	DBG_BLOCK_ID_TA02                                = 0xa2,
421	DBG_BLOCK_ID_TA03                                = 0xa3,
422	DBG_BLOCK_ID_TA04                                = 0xa4,
423	DBG_BLOCK_ID_TA05                                = 0xa5,
424	DBG_BLOCK_ID_TA06                                = 0xa6,
425	DBG_BLOCK_ID_TA07                                = 0xa7,
426	DBG_BLOCK_ID_TA08                                = 0xa8,
427	DBG_BLOCK_ID_TA09                                = 0xa9,
428	DBG_BLOCK_ID_TA0A                                = 0xaa,
429	DBG_BLOCK_ID_TA0B                                = 0xab,
430	DBG_BLOCK_ID_UNUSED35                            = 0xac,
431	DBG_BLOCK_ID_UNUSED36                            = 0xad,
432	DBG_BLOCK_ID_UNUSED37                            = 0xae,
433	DBG_BLOCK_ID_UNUSED38                            = 0xaf,
434	DBG_BLOCK_ID_TA10                                = 0xb0,
435	DBG_BLOCK_ID_TA11                                = 0xb1,
436	DBG_BLOCK_ID_TA12                                = 0xb2,
437	DBG_BLOCK_ID_TA13                                = 0xb3,
438	DBG_BLOCK_ID_TA14                                = 0xb4,
439	DBG_BLOCK_ID_TA15                                = 0xb5,
440	DBG_BLOCK_ID_TA16                                = 0xb6,
441	DBG_BLOCK_ID_TA17                                = 0xb7,
442	DBG_BLOCK_ID_TA18                                = 0xb8,
443	DBG_BLOCK_ID_TA19                                = 0xb9,
444	DBG_BLOCK_ID_TA1A                                = 0xba,
445	DBG_BLOCK_ID_TA1B                                = 0xbb,
446	DBG_BLOCK_ID_UNUSED39                            = 0xbc,
447	DBG_BLOCK_ID_UNUSED40                            = 0xbd,
448	DBG_BLOCK_ID_UNUSED41                            = 0xbe,
449	DBG_BLOCK_ID_UNUSED42                            = 0xbf,
450	DBG_BLOCK_ID_TD00                                = 0xc0,
451	DBG_BLOCK_ID_TD01                                = 0xc1,
452	DBG_BLOCK_ID_TD02                                = 0xc2,
453	DBG_BLOCK_ID_TD03                                = 0xc3,
454	DBG_BLOCK_ID_TD04                                = 0xc4,
455	DBG_BLOCK_ID_TD05                                = 0xc5,
456	DBG_BLOCK_ID_TD06                                = 0xc6,
457	DBG_BLOCK_ID_TD07                                = 0xc7,
458	DBG_BLOCK_ID_TD08                                = 0xc8,
459	DBG_BLOCK_ID_TD09                                = 0xc9,
460	DBG_BLOCK_ID_TD0A                                = 0xca,
461	DBG_BLOCK_ID_TD0B                                = 0xcb,
462	DBG_BLOCK_ID_UNUSED43                            = 0xcc,
463	DBG_BLOCK_ID_UNUSED44                            = 0xcd,
464	DBG_BLOCK_ID_UNUSED45                            = 0xce,
465	DBG_BLOCK_ID_UNUSED46                            = 0xcf,
466	DBG_BLOCK_ID_TD10                                = 0xd0,
467	DBG_BLOCK_ID_TD11                                = 0xd1,
468	DBG_BLOCK_ID_TD12                                = 0xd2,
469	DBG_BLOCK_ID_TD13                                = 0xd3,
470	DBG_BLOCK_ID_TD14                                = 0xd4,
471	DBG_BLOCK_ID_TD15                                = 0xd5,
472	DBG_BLOCK_ID_TD16                                = 0xd6,
473	DBG_BLOCK_ID_TD17                                = 0xd7,
474	DBG_BLOCK_ID_TD18                                = 0xd8,
475	DBG_BLOCK_ID_TD19                                = 0xd9,
476	DBG_BLOCK_ID_TD1A                                = 0xda,
477	DBG_BLOCK_ID_TD1B                                = 0xdb,
478	DBG_BLOCK_ID_UNUSED47                            = 0xdc,
479	DBG_BLOCK_ID_UNUSED48                            = 0xdd,
480	DBG_BLOCK_ID_UNUSED49                            = 0xde,
481	DBG_BLOCK_ID_UNUSED50                            = 0xdf,
482	DBG_BLOCK_ID_MCD0                                = 0xe0,
483	DBG_BLOCK_ID_MCD1                                = 0xe1,
484	DBG_BLOCK_ID_MCD2                                = 0xe2,
485	DBG_BLOCK_ID_MCD3                                = 0xe3,
486	DBG_BLOCK_ID_MCD4                                = 0xe4,
487	DBG_BLOCK_ID_MCD5                                = 0xe5,
488	DBG_BLOCK_ID_UNUSED51                            = 0xe6,
489	DBG_BLOCK_ID_UNUSED52                            = 0xe7,
490} DebugBlockId_OLD;
491typedef enum DebugBlockId_BY2 {
492	DBG_BLOCK_ID_RESERVED_BY2                        = 0x0,
493	DBG_BLOCK_ID_VMC_BY2                             = 0x1,
494	DBG_BLOCK_ID_CG_BY2                              = 0x2,
495	DBG_BLOCK_ID_GRBM_BY2                            = 0x3,
496	DBG_BLOCK_ID_CSC_BY2                             = 0x4,
497	DBG_BLOCK_ID_IH_BY2                              = 0x5,
498	DBG_BLOCK_ID_SQ_BY2                              = 0x6,
499	DBG_BLOCK_ID_GMCON_BY2                           = 0x7,
500	DBG_BLOCK_ID_DMA0_BY2                            = 0x8,
501	DBG_BLOCK_ID_SPIM_BY2                            = 0x9,
502	DBG_BLOCK_ID_SPIS_BY2                            = 0xa,
503	DBG_BLOCK_ID_PA0_BY2                             = 0xb,
504	DBG_BLOCK_ID_CP0_BY2                             = 0xc,
505	DBG_BLOCK_ID_CP2_BY2                             = 0xd,
506	DBG_BLOCK_ID_UVDU_BY2                            = 0xe,
507	DBG_BLOCK_ID_VCE_BY2                             = 0xf,
508	DBG_BLOCK_ID_VGT0_BY2                            = 0x10,
509	DBG_BLOCK_ID_IA_BY2                              = 0x11,
510	DBG_BLOCK_ID_SCT0_BY2                            = 0x12,
511	DBG_BLOCK_ID_SPM0_BY2                            = 0x13,
512	DBG_BLOCK_ID_TCAA_BY2                            = 0x14,
513	DBG_BLOCK_ID_TCCA_BY2                            = 0x15,
514	DBG_BLOCK_ID_MCC0_BY2                            = 0x16,
515	DBG_BLOCK_ID_MCC2_BY2                            = 0x17,
516	DBG_BLOCK_ID_SX0_BY2                             = 0x18,
517	DBG_BLOCK_ID_SX2_BY2                             = 0x19,
518	DBG_BLOCK_ID_UNUSED4_BY2                         = 0x1a,
519	DBG_BLOCK_ID_UNUSED6_BY2                         = 0x1b,
520	DBG_BLOCK_ID_PC0_BY2                             = 0x1c,
521	DBG_BLOCK_ID_UNUSED8_BY2                         = 0x1d,
522	DBG_BLOCK_ID_UNUSED10_BY2                        = 0x1e,
523	DBG_BLOCK_ID_MCB_BY2                             = 0x1f,
524	DBG_BLOCK_ID_SCB0_BY2                            = 0x20,
525	DBG_BLOCK_ID_UNUSED13_BY2                        = 0x21,
526	DBG_BLOCK_ID_SCF0_BY2                            = 0x22,
527	DBG_BLOCK_ID_UNUSED15_BY2                        = 0x23,
528	DBG_BLOCK_ID_BCI0_BY2                            = 0x24,
529	DBG_BLOCK_ID_BCI2_BY2                            = 0x25,
530	DBG_BLOCK_ID_UNUSED17_BY2                        = 0x26,
531	DBG_BLOCK_ID_UNUSED19_BY2                        = 0x27,
532	DBG_BLOCK_ID_CB00_BY2                            = 0x28,
533	DBG_BLOCK_ID_CB02_BY2                            = 0x29,
534	DBG_BLOCK_ID_CB04_BY2                            = 0x2a,
535	DBG_BLOCK_ID_UNUSED22_BY2                        = 0x2b,
536	DBG_BLOCK_ID_CB10_BY2                            = 0x2c,
537	DBG_BLOCK_ID_CB12_BY2                            = 0x2d,
538	DBG_BLOCK_ID_CB14_BY2                            = 0x2e,
539	DBG_BLOCK_ID_UNUSED25_BY2                        = 0x2f,
540	DBG_BLOCK_ID_TCP0_BY2                            = 0x30,
541	DBG_BLOCK_ID_TCP2_BY2                            = 0x31,
542	DBG_BLOCK_ID_TCP4_BY2                            = 0x32,
543	DBG_BLOCK_ID_TCP6_BY2                            = 0x33,
544	DBG_BLOCK_ID_TCP8_BY2                            = 0x34,
545	DBG_BLOCK_ID_TCP10_BY2                           = 0x35,
546	DBG_BLOCK_ID_TCP12_BY2                           = 0x36,
547	DBG_BLOCK_ID_TCP14_BY2                           = 0x37,
548	DBG_BLOCK_ID_TCP16_BY2                           = 0x38,
549	DBG_BLOCK_ID_TCP18_BY2                           = 0x39,
550	DBG_BLOCK_ID_TCP20_BY2                           = 0x3a,
551	DBG_BLOCK_ID_TCP22_BY2                           = 0x3b,
552	DBG_BLOCK_ID_TCP_RESERVED0_BY2                   = 0x3c,
553	DBG_BLOCK_ID_TCP_RESERVED2_BY2                   = 0x3d,
554	DBG_BLOCK_ID_TCP_RESERVED4_BY2                   = 0x3e,
555	DBG_BLOCK_ID_TCP_RESERVED6_BY2                   = 0x3f,
556	DBG_BLOCK_ID_DB00_BY2                            = 0x40,
557	DBG_BLOCK_ID_DB02_BY2                            = 0x41,
558	DBG_BLOCK_ID_DB04_BY2                            = 0x42,
559	DBG_BLOCK_ID_UNUSED28_BY2                        = 0x43,
560	DBG_BLOCK_ID_DB10_BY2                            = 0x44,
561	DBG_BLOCK_ID_DB12_BY2                            = 0x45,
562	DBG_BLOCK_ID_DB14_BY2                            = 0x46,
563	DBG_BLOCK_ID_UNUSED31_BY2                        = 0x47,
564	DBG_BLOCK_ID_TCC0_BY2                            = 0x48,
565	DBG_BLOCK_ID_TCC2_BY2                            = 0x49,
566	DBG_BLOCK_ID_TCC4_BY2                            = 0x4a,
567	DBG_BLOCK_ID_TCC6_BY2                            = 0x4b,
568	DBG_BLOCK_ID_SPS00_BY2                           = 0x4c,
569	DBG_BLOCK_ID_SPS02_BY2                           = 0x4d,
570	DBG_BLOCK_ID_SPS11_BY2                           = 0x4e,
571	DBG_BLOCK_ID_UNUSED33_BY2                        = 0x4f,
572	DBG_BLOCK_ID_TA00_BY2                            = 0x50,
573	DBG_BLOCK_ID_TA02_BY2                            = 0x51,
574	DBG_BLOCK_ID_TA04_BY2                            = 0x52,
575	DBG_BLOCK_ID_TA06_BY2                            = 0x53,
576	DBG_BLOCK_ID_TA08_BY2                            = 0x54,
577	DBG_BLOCK_ID_TA0A_BY2                            = 0x55,
578	DBG_BLOCK_ID_UNUSED35_BY2                        = 0x56,
579	DBG_BLOCK_ID_UNUSED37_BY2                        = 0x57,
580	DBG_BLOCK_ID_TA10_BY2                            = 0x58,
581	DBG_BLOCK_ID_TA12_BY2                            = 0x59,
582	DBG_BLOCK_ID_TA14_BY2                            = 0x5a,
583	DBG_BLOCK_ID_TA16_BY2                            = 0x5b,
584	DBG_BLOCK_ID_TA18_BY2                            = 0x5c,
585	DBG_BLOCK_ID_TA1A_BY2                            = 0x5d,
586	DBG_BLOCK_ID_UNUSED39_BY2                        = 0x5e,
587	DBG_BLOCK_ID_UNUSED41_BY2                        = 0x5f,
588	DBG_BLOCK_ID_TD00_BY2                            = 0x60,
589	DBG_BLOCK_ID_TD02_BY2                            = 0x61,
590	DBG_BLOCK_ID_TD04_BY2                            = 0x62,
591	DBG_BLOCK_ID_TD06_BY2                            = 0x63,
592	DBG_BLOCK_ID_TD08_BY2                            = 0x64,
593	DBG_BLOCK_ID_TD0A_BY2                            = 0x65,
594	DBG_BLOCK_ID_UNUSED43_BY2                        = 0x66,
595	DBG_BLOCK_ID_UNUSED45_BY2                        = 0x67,
596	DBG_BLOCK_ID_TD10_BY2                            = 0x68,
597	DBG_BLOCK_ID_TD12_BY2                            = 0x69,
598	DBG_BLOCK_ID_TD14_BY2                            = 0x6a,
599	DBG_BLOCK_ID_TD16_BY2                            = 0x6b,
600	DBG_BLOCK_ID_TD18_BY2                            = 0x6c,
601	DBG_BLOCK_ID_TD1A_BY2                            = 0x6d,
602	DBG_BLOCK_ID_UNUSED47_BY2                        = 0x6e,
603	DBG_BLOCK_ID_UNUSED49_BY2                        = 0x6f,
604	DBG_BLOCK_ID_MCD0_BY2                            = 0x70,
605	DBG_BLOCK_ID_MCD2_BY2                            = 0x71,
606	DBG_BLOCK_ID_MCD4_BY2                            = 0x72,
607	DBG_BLOCK_ID_UNUSED51_BY2                        = 0x73,
608} DebugBlockId_BY2;
609typedef enum DebugBlockId_BY4 {
610	DBG_BLOCK_ID_RESERVED_BY4                        = 0x0,
611	DBG_BLOCK_ID_CG_BY4                              = 0x1,
612	DBG_BLOCK_ID_CSC_BY4                             = 0x2,
613	DBG_BLOCK_ID_SQ_BY4                              = 0x3,
614	DBG_BLOCK_ID_DMA0_BY4                            = 0x4,
615	DBG_BLOCK_ID_SPIS_BY4                            = 0x5,
616	DBG_BLOCK_ID_CP0_BY4                             = 0x6,
617	DBG_BLOCK_ID_UVDU_BY4                            = 0x7,
618	DBG_BLOCK_ID_VGT0_BY4                            = 0x8,
619	DBG_BLOCK_ID_SCT0_BY4                            = 0x9,
620	DBG_BLOCK_ID_TCAA_BY4                            = 0xa,
621	DBG_BLOCK_ID_MCC0_BY4                            = 0xb,
622	DBG_BLOCK_ID_SX0_BY4                             = 0xc,
623	DBG_BLOCK_ID_UNUSED4_BY4                         = 0xd,
624	DBG_BLOCK_ID_PC0_BY4                             = 0xe,
625	DBG_BLOCK_ID_UNUSED10_BY4                        = 0xf,
626	DBG_BLOCK_ID_SCB0_BY4                            = 0x10,
627	DBG_BLOCK_ID_SCF0_BY4                            = 0x11,
628	DBG_BLOCK_ID_BCI0_BY4                            = 0x12,
629	DBG_BLOCK_ID_UNUSED17_BY4                        = 0x13,
630	DBG_BLOCK_ID_CB00_BY4                            = 0x14,
631	DBG_BLOCK_ID_CB04_BY4                            = 0x15,
632	DBG_BLOCK_ID_CB10_BY4                            = 0x16,
633	DBG_BLOCK_ID_CB14_BY4                            = 0x17,
634	DBG_BLOCK_ID_TCP0_BY4                            = 0x18,
635	DBG_BLOCK_ID_TCP4_BY4                            = 0x19,
636	DBG_BLOCK_ID_TCP8_BY4                            = 0x1a,
637	DBG_BLOCK_ID_TCP12_BY4                           = 0x1b,
638	DBG_BLOCK_ID_TCP16_BY4                           = 0x1c,
639	DBG_BLOCK_ID_TCP20_BY4                           = 0x1d,
640	DBG_BLOCK_ID_TCP_RESERVED0_BY4                   = 0x1e,
641	DBG_BLOCK_ID_TCP_RESERVED4_BY4                   = 0x1f,
642	DBG_BLOCK_ID_DB_BY4                              = 0x20,
643	DBG_BLOCK_ID_DB04_BY4                            = 0x21,
644	DBG_BLOCK_ID_DB10_BY4                            = 0x22,
645	DBG_BLOCK_ID_DB14_BY4                            = 0x23,
646	DBG_BLOCK_ID_TCC0_BY4                            = 0x24,
647	DBG_BLOCK_ID_TCC4_BY4                            = 0x25,
648	DBG_BLOCK_ID_SPS00_BY4                           = 0x26,
649	DBG_BLOCK_ID_SPS11_BY4                           = 0x27,
650	DBG_BLOCK_ID_TA00_BY4                            = 0x28,
651	DBG_BLOCK_ID_TA04_BY4                            = 0x29,
652	DBG_BLOCK_ID_TA08_BY4                            = 0x2a,
653	DBG_BLOCK_ID_UNUSED35_BY4                        = 0x2b,
654	DBG_BLOCK_ID_TA10_BY4                            = 0x2c,
655	DBG_BLOCK_ID_TA14_BY4                            = 0x2d,
656	DBG_BLOCK_ID_TA18_BY4                            = 0x2e,
657	DBG_BLOCK_ID_UNUSED39_BY4                        = 0x2f,
658	DBG_BLOCK_ID_TD00_BY4                            = 0x30,
659	DBG_BLOCK_ID_TD04_BY4                            = 0x31,
660	DBG_BLOCK_ID_TD08_BY4                            = 0x32,
661	DBG_BLOCK_ID_UNUSED43_BY4                        = 0x33,
662	DBG_BLOCK_ID_TD10_BY4                            = 0x34,
663	DBG_BLOCK_ID_TD14_BY4                            = 0x35,
664	DBG_BLOCK_ID_TD18_BY4                            = 0x36,
665	DBG_BLOCK_ID_UNUSED47_BY4                        = 0x37,
666	DBG_BLOCK_ID_MCD0_BY4                            = 0x38,
667	DBG_BLOCK_ID_MCD4_BY4                            = 0x39,
668} DebugBlockId_BY4;
669typedef enum DebugBlockId_BY8 {
670	DBG_BLOCK_ID_RESERVED_BY8                        = 0x0,
671	DBG_BLOCK_ID_CSC_BY8                             = 0x1,
672	DBG_BLOCK_ID_DMA0_BY8                            = 0x2,
673	DBG_BLOCK_ID_CP0_BY8                             = 0x3,
674	DBG_BLOCK_ID_VGT0_BY8                            = 0x4,
675	DBG_BLOCK_ID_TCAA_BY8                            = 0x5,
676	DBG_BLOCK_ID_SX0_BY8                             = 0x6,
677	DBG_BLOCK_ID_PC0_BY8                             = 0x7,
678	DBG_BLOCK_ID_SCB0_BY8                            = 0x8,
679	DBG_BLOCK_ID_BCI0_BY8                            = 0x9,
680	DBG_BLOCK_ID_CB00_BY8                            = 0xa,
681	DBG_BLOCK_ID_CB10_BY8                            = 0xb,
682	DBG_BLOCK_ID_TCP0_BY8                            = 0xc,
683	DBG_BLOCK_ID_TCP8_BY8                            = 0xd,
684	DBG_BLOCK_ID_TCP16_BY8                           = 0xe,
685	DBG_BLOCK_ID_TCP_RESERVED0_BY8                   = 0xf,
686	DBG_BLOCK_ID_DB00_BY8                            = 0x10,
687	DBG_BLOCK_ID_DB10_BY8                            = 0x11,
688	DBG_BLOCK_ID_TCC0_BY8                            = 0x12,
689	DBG_BLOCK_ID_SPS00_BY8                           = 0x13,
690	DBG_BLOCK_ID_TA00_BY8                            = 0x14,
691	DBG_BLOCK_ID_TA08_BY8                            = 0x15,
692	DBG_BLOCK_ID_TA10_BY8                            = 0x16,
693	DBG_BLOCK_ID_TA18_BY8                            = 0x17,
694	DBG_BLOCK_ID_TD00_BY8                            = 0x18,
695	DBG_BLOCK_ID_TD08_BY8                            = 0x19,
696	DBG_BLOCK_ID_TD10_BY8                            = 0x1a,
697	DBG_BLOCK_ID_TD18_BY8                            = 0x1b,
698	DBG_BLOCK_ID_MCD0_BY8                            = 0x1c,
699} DebugBlockId_BY8;
700typedef enum DebugBlockId_BY16 {
701	DBG_BLOCK_ID_RESERVED_BY16                       = 0x0,
702	DBG_BLOCK_ID_DMA0_BY16                           = 0x1,
703	DBG_BLOCK_ID_VGT0_BY16                           = 0x2,
704	DBG_BLOCK_ID_SX0_BY16                            = 0x3,
705	DBG_BLOCK_ID_SCB0_BY16                           = 0x4,
706	DBG_BLOCK_ID_CB00_BY16                           = 0x5,
707	DBG_BLOCK_ID_TCP0_BY16                           = 0x6,
708	DBG_BLOCK_ID_TCP16_BY16                          = 0x7,
709	DBG_BLOCK_ID_DB00_BY16                           = 0x8,
710	DBG_BLOCK_ID_TCC0_BY16                           = 0x9,
711	DBG_BLOCK_ID_TA00_BY16                           = 0xa,
712	DBG_BLOCK_ID_TA10_BY16                           = 0xb,
713	DBG_BLOCK_ID_TD00_BY16                           = 0xc,
714	DBG_BLOCK_ID_TD10_BY16                           = 0xd,
715	DBG_BLOCK_ID_MCD0_BY16                           = 0xe,
716} DebugBlockId_BY16;
717typedef enum CompareRef {
718	REF_NEVER                                        = 0x0,
719	REF_LESS                                         = 0x1,
720	REF_EQUAL                                        = 0x2,
721	REF_LEQUAL                                       = 0x3,
722	REF_GREATER                                      = 0x4,
723	REF_NOTEQUAL                                     = 0x5,
724	REF_GEQUAL                                       = 0x6,
725	REF_ALWAYS                                       = 0x7,
726} CompareRef;
727typedef enum ReadSize {
728	READ_256_BITS                                    = 0x0,
729	READ_512_BITS                                    = 0x1,
730} ReadSize;
731typedef enum DepthFormat {
732	DEPTH_INVALID                                    = 0x0,
733	DEPTH_16                                         = 0x1,
734	DEPTH_X8_24                                      = 0x2,
735	DEPTH_8_24                                       = 0x3,
736	DEPTH_X8_24_FLOAT                                = 0x4,
737	DEPTH_8_24_FLOAT                                 = 0x5,
738	DEPTH_32_FLOAT                                   = 0x6,
739	DEPTH_X24_8_32_FLOAT                             = 0x7,
740} DepthFormat;
741typedef enum ZFormat {
742	Z_INVALID                                        = 0x0,
743	Z_16                                             = 0x1,
744	Z_24                                             = 0x2,
745	Z_32_FLOAT                                       = 0x3,
746} ZFormat;
747typedef enum StencilFormat {
748	STENCIL_INVALID                                  = 0x0,
749	STENCIL_8                                        = 0x1,
750} StencilFormat;
751typedef enum CmaskMode {
752	CMASK_CLEAR_NONE                                 = 0x0,
753	CMASK_CLEAR_ONE                                  = 0x1,
754	CMASK_CLEAR_ALL                                  = 0x2,
755	CMASK_ANY_EXPANDED                               = 0x3,
756	CMASK_ALPHA0_FRAG1                               = 0x4,
757	CMASK_ALPHA0_FRAG2                               = 0x5,
758	CMASK_ALPHA0_FRAG4                               = 0x6,
759	CMASK_ALPHA0_FRAGS                               = 0x7,
760	CMASK_ALPHA1_FRAG1                               = 0x8,
761	CMASK_ALPHA1_FRAG2                               = 0x9,
762	CMASK_ALPHA1_FRAG4                               = 0xa,
763	CMASK_ALPHA1_FRAGS                               = 0xb,
764	CMASK_ALPHAX_FRAG1                               = 0xc,
765	CMASK_ALPHAX_FRAG2                               = 0xd,
766	CMASK_ALPHAX_FRAG4                               = 0xe,
767	CMASK_ALPHAX_FRAGS                               = 0xf,
768} CmaskMode;
769typedef enum QuadExportFormat {
770	EXPORT_UNUSED                                    = 0x0,
771	EXPORT_32_R                                      = 0x1,
772	EXPORT_32_GR                                     = 0x2,
773	EXPORT_32_AR                                     = 0x3,
774	EXPORT_FP16_ABGR                                 = 0x4,
775	EXPORT_UNSIGNED16_ABGR                           = 0x5,
776	EXPORT_SIGNED16_ABGR                             = 0x6,
777	EXPORT_32_ABGR                                   = 0x7,
778} QuadExportFormat;
779typedef enum QuadExportFormatOld {
780	EXPORT_4P_32BPC_ABGR                             = 0x0,
781	EXPORT_4P_16BPC_ABGR                             = 0x1,
782	EXPORT_4P_32BPC_GR                               = 0x2,
783	EXPORT_4P_32BPC_AR                               = 0x3,
784	EXPORT_2P_32BPC_ABGR                             = 0x4,
785	EXPORT_8P_32BPC_R                                = 0x5,
786} QuadExportFormatOld;
787typedef enum ColorFormat {
788	COLOR_INVALID                                    = 0x0,
789	COLOR_8                                          = 0x1,
790	COLOR_16                                         = 0x2,
791	COLOR_8_8                                        = 0x3,
792	COLOR_32                                         = 0x4,
793	COLOR_16_16                                      = 0x5,
794	COLOR_10_11_11                                   = 0x6,
795	COLOR_11_11_10                                   = 0x7,
796	COLOR_10_10_10_2                                 = 0x8,
797	COLOR_2_10_10_10                                 = 0x9,
798	COLOR_8_8_8_8                                    = 0xa,
799	COLOR_32_32                                      = 0xb,
800	COLOR_16_16_16_16                                = 0xc,
801	COLOR_RESERVED_13                                = 0xd,
802	COLOR_32_32_32_32                                = 0xe,
803	COLOR_RESERVED_15                                = 0xf,
804	COLOR_5_6_5                                      = 0x10,
805	COLOR_1_5_5_5                                    = 0x11,
806	COLOR_5_5_5_1                                    = 0x12,
807	COLOR_4_4_4_4                                    = 0x13,
808	COLOR_8_24                                       = 0x14,
809	COLOR_24_8                                       = 0x15,
810	COLOR_X24_8_32_FLOAT                             = 0x16,
811	COLOR_RESERVED_23                                = 0x17,
812} ColorFormat;
813typedef enum SurfaceFormat {
814	FMT_INVALID                                      = 0x0,
815	FMT_8                                            = 0x1,
816	FMT_16                                           = 0x2,
817	FMT_8_8                                          = 0x3,
818	FMT_32                                           = 0x4,
819	FMT_16_16                                        = 0x5,
820	FMT_10_11_11                                     = 0x6,
821	FMT_11_11_10                                     = 0x7,
822	FMT_10_10_10_2                                   = 0x8,
823	FMT_2_10_10_10                                   = 0x9,
824	FMT_8_8_8_8                                      = 0xa,
825	FMT_32_32                                        = 0xb,
826	FMT_16_16_16_16                                  = 0xc,
827	FMT_32_32_32                                     = 0xd,
828	FMT_32_32_32_32                                  = 0xe,
829	FMT_RESERVED_4                                   = 0xf,
830	FMT_5_6_5                                        = 0x10,
831	FMT_1_5_5_5                                      = 0x11,
832	FMT_5_5_5_1                                      = 0x12,
833	FMT_4_4_4_4                                      = 0x13,
834	FMT_8_24                                         = 0x14,
835	FMT_24_8                                         = 0x15,
836	FMT_X24_8_32_FLOAT                               = 0x16,
837	FMT_RESERVED_33                                  = 0x17,
838	FMT_11_11_10_FLOAT                               = 0x18,
839	FMT_16_FLOAT                                     = 0x19,
840	FMT_32_FLOAT                                     = 0x1a,
841	FMT_16_16_FLOAT                                  = 0x1b,
842	FMT_8_24_FLOAT                                   = 0x1c,
843	FMT_24_8_FLOAT                                   = 0x1d,
844	FMT_32_32_FLOAT                                  = 0x1e,
845	FMT_10_11_11_FLOAT                               = 0x1f,
846	FMT_16_16_16_16_FLOAT                            = 0x20,
847	FMT_3_3_2                                        = 0x21,
848	FMT_6_5_5                                        = 0x22,
849	FMT_32_32_32_32_FLOAT                            = 0x23,
850	FMT_RESERVED_36                                  = 0x24,
851	FMT_1                                            = 0x25,
852	FMT_1_REVERSED                                   = 0x26,
853	FMT_GB_GR                                        = 0x27,
854	FMT_BG_RG                                        = 0x28,
855	FMT_32_AS_8                                      = 0x29,
856	FMT_32_AS_8_8                                    = 0x2a,
857	FMT_5_9_9_9_SHAREDEXP                            = 0x2b,
858	FMT_8_8_8                                        = 0x2c,
859	FMT_16_16_16                                     = 0x2d,
860	FMT_16_16_16_FLOAT                               = 0x2e,
861	FMT_4_4                                          = 0x2f,
862	FMT_32_32_32_FLOAT                               = 0x30,
863	FMT_BC1                                          = 0x31,
864	FMT_BC2                                          = 0x32,
865	FMT_BC3                                          = 0x33,
866	FMT_BC4                                          = 0x34,
867	FMT_BC5                                          = 0x35,
868	FMT_BC6                                          = 0x36,
869	FMT_BC7                                          = 0x37,
870	FMT_32_AS_32_32_32_32                            = 0x38,
871	FMT_APC3                                         = 0x39,
872	FMT_APC4                                         = 0x3a,
873	FMT_APC5                                         = 0x3b,
874	FMT_APC6                                         = 0x3c,
875	FMT_APC7                                         = 0x3d,
876	FMT_CTX1                                         = 0x3e,
877	FMT_RESERVED_63                                  = 0x3f,
878} SurfaceFormat;
879typedef enum BUF_DATA_FORMAT {
880	BUF_DATA_FORMAT_INVALID                          = 0x0,
881	BUF_DATA_FORMAT_8                                = 0x1,
882	BUF_DATA_FORMAT_16                               = 0x2,
883	BUF_DATA_FORMAT_8_8                              = 0x3,
884	BUF_DATA_FORMAT_32                               = 0x4,
885	BUF_DATA_FORMAT_16_16                            = 0x5,
886	BUF_DATA_FORMAT_10_11_11                         = 0x6,
887	BUF_DATA_FORMAT_11_11_10                         = 0x7,
888	BUF_DATA_FORMAT_10_10_10_2                       = 0x8,
889	BUF_DATA_FORMAT_2_10_10_10                       = 0x9,
890	BUF_DATA_FORMAT_8_8_8_8                          = 0xa,
891	BUF_DATA_FORMAT_32_32                            = 0xb,
892	BUF_DATA_FORMAT_16_16_16_16                      = 0xc,
893	BUF_DATA_FORMAT_32_32_32                         = 0xd,
894	BUF_DATA_FORMAT_32_32_32_32                      = 0xe,
895	BUF_DATA_FORMAT_RESERVED_15                      = 0xf,
896} BUF_DATA_FORMAT;
897typedef enum IMG_DATA_FORMAT {
898	IMG_DATA_FORMAT_INVALID                          = 0x0,
899	IMG_DATA_FORMAT_8                                = 0x1,
900	IMG_DATA_FORMAT_16                               = 0x2,
901	IMG_DATA_FORMAT_8_8                              = 0x3,
902	IMG_DATA_FORMAT_32                               = 0x4,
903	IMG_DATA_FORMAT_16_16                            = 0x5,
904	IMG_DATA_FORMAT_10_11_11                         = 0x6,
905	IMG_DATA_FORMAT_11_11_10                         = 0x7,
906	IMG_DATA_FORMAT_10_10_10_2                       = 0x8,
907	IMG_DATA_FORMAT_2_10_10_10                       = 0x9,
908	IMG_DATA_FORMAT_8_8_8_8                          = 0xa,
909	IMG_DATA_FORMAT_32_32                            = 0xb,
910	IMG_DATA_FORMAT_16_16_16_16                      = 0xc,
911	IMG_DATA_FORMAT_32_32_32                         = 0xd,
912	IMG_DATA_FORMAT_32_32_32_32                      = 0xe,
913	IMG_DATA_FORMAT_RESERVED_15                      = 0xf,
914	IMG_DATA_FORMAT_5_6_5                            = 0x10,
915	IMG_DATA_FORMAT_1_5_5_5                          = 0x11,
916	IMG_DATA_FORMAT_5_5_5_1                          = 0x12,
917	IMG_DATA_FORMAT_4_4_4_4                          = 0x13,
918	IMG_DATA_FORMAT_8_24                             = 0x14,
919	IMG_DATA_FORMAT_24_8                             = 0x15,
920	IMG_DATA_FORMAT_X24_8_32                         = 0x16,
921	IMG_DATA_FORMAT_RESERVED_23                      = 0x17,
922	IMG_DATA_FORMAT_RESERVED_24                      = 0x18,
923	IMG_DATA_FORMAT_RESERVED_25                      = 0x19,
924	IMG_DATA_FORMAT_RESERVED_26                      = 0x1a,
925	IMG_DATA_FORMAT_RESERVED_27                      = 0x1b,
926	IMG_DATA_FORMAT_RESERVED_28                      = 0x1c,
927	IMG_DATA_FORMAT_RESERVED_29                      = 0x1d,
928	IMG_DATA_FORMAT_RESERVED_30                      = 0x1e,
929	IMG_DATA_FORMAT_RESERVED_31                      = 0x1f,
930	IMG_DATA_FORMAT_GB_GR                            = 0x20,
931	IMG_DATA_FORMAT_BG_RG                            = 0x21,
932	IMG_DATA_FORMAT_5_9_9_9                          = 0x22,
933	IMG_DATA_FORMAT_BC1                              = 0x23,
934	IMG_DATA_FORMAT_BC2                              = 0x24,
935	IMG_DATA_FORMAT_BC3                              = 0x25,
936	IMG_DATA_FORMAT_BC4                              = 0x26,
937	IMG_DATA_FORMAT_BC5                              = 0x27,
938	IMG_DATA_FORMAT_BC6                              = 0x28,
939	IMG_DATA_FORMAT_BC7                              = 0x29,
940	IMG_DATA_FORMAT_RESERVED_42                      = 0x2a,
941	IMG_DATA_FORMAT_RESERVED_43                      = 0x2b,
942	IMG_DATA_FORMAT_FMASK8_S2_F1                     = 0x2c,
943	IMG_DATA_FORMAT_FMASK8_S4_F1                     = 0x2d,
944	IMG_DATA_FORMAT_FMASK8_S8_F1                     = 0x2e,
945	IMG_DATA_FORMAT_FMASK8_S2_F2                     = 0x2f,
946	IMG_DATA_FORMAT_FMASK8_S4_F2                     = 0x30,
947	IMG_DATA_FORMAT_FMASK8_S4_F4                     = 0x31,
948	IMG_DATA_FORMAT_FMASK16_S16_F1                   = 0x32,
949	IMG_DATA_FORMAT_FMASK16_S8_F2                    = 0x33,
950	IMG_DATA_FORMAT_FMASK32_S16_F2                   = 0x34,
951	IMG_DATA_FORMAT_FMASK32_S8_F4                    = 0x35,
952	IMG_DATA_FORMAT_FMASK32_S8_F8                    = 0x36,
953	IMG_DATA_FORMAT_FMASK64_S16_F4                   = 0x37,
954	IMG_DATA_FORMAT_FMASK64_S16_F8                   = 0x38,
955	IMG_DATA_FORMAT_4_4                              = 0x39,
956	IMG_DATA_FORMAT_6_5_5                            = 0x3a,
957	IMG_DATA_FORMAT_1                                = 0x3b,
958	IMG_DATA_FORMAT_1_REVERSED                       = 0x3c,
959	IMG_DATA_FORMAT_32_AS_8                          = 0x3d,
960	IMG_DATA_FORMAT_32_AS_8_8                        = 0x3e,
961	IMG_DATA_FORMAT_32_AS_32_32_32_32                = 0x3f,
962} IMG_DATA_FORMAT;
963typedef enum BUF_NUM_FORMAT {
964	BUF_NUM_FORMAT_UNORM                             = 0x0,
965	BUF_NUM_FORMAT_SNORM                             = 0x1,
966	BUF_NUM_FORMAT_USCALED                           = 0x2,
967	BUF_NUM_FORMAT_SSCALED                           = 0x3,
968	BUF_NUM_FORMAT_UINT                              = 0x4,
969	BUF_NUM_FORMAT_SINT                              = 0x5,
970	BUF_NUM_FORMAT_SNORM_OGL                         = 0x6,
971	BUF_NUM_FORMAT_FLOAT                             = 0x7,
972} BUF_NUM_FORMAT;
973typedef enum IMG_NUM_FORMAT {
974	IMG_NUM_FORMAT_UNORM                             = 0x0,
975	IMG_NUM_FORMAT_SNORM                             = 0x1,
976	IMG_NUM_FORMAT_USCALED                           = 0x2,
977	IMG_NUM_FORMAT_SSCALED                           = 0x3,
978	IMG_NUM_FORMAT_UINT                              = 0x4,
979	IMG_NUM_FORMAT_SINT                              = 0x5,
980	IMG_NUM_FORMAT_SNORM_OGL                         = 0x6,
981	IMG_NUM_FORMAT_FLOAT                             = 0x7,
982	IMG_NUM_FORMAT_RESERVED_8                        = 0x8,
983	IMG_NUM_FORMAT_SRGB                              = 0x9,
984	IMG_NUM_FORMAT_UBNORM                            = 0xa,
985	IMG_NUM_FORMAT_UBNORM_OGL                        = 0xb,
986	IMG_NUM_FORMAT_UBINT                             = 0xc,
987	IMG_NUM_FORMAT_UBSCALED                          = 0xd,
988	IMG_NUM_FORMAT_RESERVED_14                       = 0xe,
989	IMG_NUM_FORMAT_RESERVED_15                       = 0xf,
990} IMG_NUM_FORMAT;
991typedef enum TileType {
992	ARRAY_COLOR_TILE                                 = 0x0,
993	ARRAY_DEPTH_TILE                                 = 0x1,
994} TileType;
995typedef enum NonDispTilingOrder {
996	ADDR_SURF_MICRO_TILING_DISPLAY                   = 0x0,
997	ADDR_SURF_MICRO_TILING_NON_DISPLAY               = 0x1,
998} NonDispTilingOrder;
999typedef enum MicroTileMode {
1000	ADDR_SURF_DISPLAY_MICRO_TILING                   = 0x0,
1001	ADDR_SURF_THIN_MICRO_TILING                      = 0x1,
1002	ADDR_SURF_DEPTH_MICRO_TILING                     = 0x2,
1003	ADDR_SURF_ROTATED_MICRO_TILING                   = 0x3,
1004	ADDR_SURF_THICK_MICRO_TILING                     = 0x4,
1005} MicroTileMode;
1006typedef enum TileSplit {
1007	ADDR_SURF_TILE_SPLIT_64B                         = 0x0,
1008	ADDR_SURF_TILE_SPLIT_128B                        = 0x1,
1009	ADDR_SURF_TILE_SPLIT_256B                        = 0x2,
1010	ADDR_SURF_TILE_SPLIT_512B                        = 0x3,
1011	ADDR_SURF_TILE_SPLIT_1KB                         = 0x4,
1012	ADDR_SURF_TILE_SPLIT_2KB                         = 0x5,
1013	ADDR_SURF_TILE_SPLIT_4KB                         = 0x6,
1014} TileSplit;
1015typedef enum SampleSplit {
1016	ADDR_SURF_SAMPLE_SPLIT_1                         = 0x0,
1017	ADDR_SURF_SAMPLE_SPLIT_2                         = 0x1,
1018	ADDR_SURF_SAMPLE_SPLIT_4                         = 0x2,
1019	ADDR_SURF_SAMPLE_SPLIT_8                         = 0x3,
1020} SampleSplit;
1021typedef enum PipeConfig {
1022	ADDR_SURF_P2                                     = 0x0,
1023	ADDR_SURF_P2_RESERVED0                           = 0x1,
1024	ADDR_SURF_P2_RESERVED1                           = 0x2,
1025	ADDR_SURF_P2_RESERVED2                           = 0x3,
1026	ADDR_SURF_P4_8x16                                = 0x4,
1027	ADDR_SURF_P4_16x16                               = 0x5,
1028	ADDR_SURF_P4_16x32                               = 0x6,
1029	ADDR_SURF_P4_32x32                               = 0x7,
1030	ADDR_SURF_P8_16x16_8x16                          = 0x8,
1031	ADDR_SURF_P8_16x32_8x16                          = 0x9,
1032	ADDR_SURF_P8_32x32_8x16                          = 0xa,
1033	ADDR_SURF_P8_16x32_16x16                         = 0xb,
1034	ADDR_SURF_P8_32x32_16x16                         = 0xc,
1035	ADDR_SURF_P8_32x32_16x32                         = 0xd,
1036	ADDR_SURF_P8_32x64_32x32                         = 0xe,
1037} PipeConfig;
1038typedef enum NumBanks {
1039	ADDR_SURF_2_BANK                                 = 0x0,
1040	ADDR_SURF_4_BANK                                 = 0x1,
1041	ADDR_SURF_8_BANK                                 = 0x2,
1042	ADDR_SURF_16_BANK                                = 0x3,
1043} NumBanks;
1044typedef enum BankWidth {
1045	ADDR_SURF_BANK_WIDTH_1                           = 0x0,
1046	ADDR_SURF_BANK_WIDTH_2                           = 0x1,
1047	ADDR_SURF_BANK_WIDTH_4                           = 0x2,
1048	ADDR_SURF_BANK_WIDTH_8                           = 0x3,
1049} BankWidth;
1050typedef enum BankHeight {
1051	ADDR_SURF_BANK_HEIGHT_1                          = 0x0,
1052	ADDR_SURF_BANK_HEIGHT_2                          = 0x1,
1053	ADDR_SURF_BANK_HEIGHT_4                          = 0x2,
1054	ADDR_SURF_BANK_HEIGHT_8                          = 0x3,
1055} BankHeight;
1056typedef enum BankWidthHeight {
1057	ADDR_SURF_BANK_WH_1                              = 0x0,
1058	ADDR_SURF_BANK_WH_2                              = 0x1,
1059	ADDR_SURF_BANK_WH_4                              = 0x2,
1060	ADDR_SURF_BANK_WH_8                              = 0x3,
1061} BankWidthHeight;
1062typedef enum MacroTileAspect {
1063	ADDR_SURF_MACRO_ASPECT_1                         = 0x0,
1064	ADDR_SURF_MACRO_ASPECT_2                         = 0x1,
1065	ADDR_SURF_MACRO_ASPECT_4                         = 0x2,
1066	ADDR_SURF_MACRO_ASPECT_8                         = 0x3,
1067} MacroTileAspect;
1068typedef enum TCC_CACHE_POLICIES {
1069	TCC_CACHE_POLICY_LRU                             = 0x0,
1070	TCC_CACHE_POLICY_STREAM                          = 0x1,
1071	TCC_CACHE_POLICY_BYPASS                          = 0x2,
1072} TCC_CACHE_POLICIES;
1073typedef enum PERFMON_COUNTER_MODE {
1074	PERFMON_COUNTER_MODE_ACCUM                       = 0x0,
1075	PERFMON_COUNTER_MODE_ACTIVE_CYCLES               = 0x1,
1076	PERFMON_COUNTER_MODE_MAX                         = 0x2,
1077	PERFMON_COUNTER_MODE_DIRTY                       = 0x3,
1078	PERFMON_COUNTER_MODE_SAMPLE                      = 0x4,
1079	PERFMON_COUNTER_MODE_CYCLES_SINCE_FIRST_EVENT    = 0x5,
1080	PERFMON_COUNTER_MODE_CYCLES_SINCE_LAST_EVENT     = 0x6,
1081	PERFMON_COUNTER_MODE_CYCLES_GE_HI                = 0x7,
1082	PERFMON_COUNTER_MODE_CYCLES_EQ_HI                = 0x8,
1083	PERFMON_COUNTER_MODE_INACTIVE_CYCLES             = 0x9,
1084	PERFMON_COUNTER_MODE_RESERVED                    = 0xf,
1085} PERFMON_COUNTER_MODE;
1086typedef enum PERFMON_SPM_MODE {
1087	PERFMON_SPM_MODE_OFF                             = 0x0,
1088	PERFMON_SPM_MODE_16BIT_CLAMP                     = 0x1,
1089	PERFMON_SPM_MODE_16BIT_NO_CLAMP                  = 0x2,
1090	PERFMON_SPM_MODE_32BIT_CLAMP                     = 0x3,
1091	PERFMON_SPM_MODE_32BIT_NO_CLAMP                  = 0x4,
1092	PERFMON_SPM_MODE_RESERVED_5                      = 0x5,
1093	PERFMON_SPM_MODE_RESERVED_6                      = 0x6,
1094	PERFMON_SPM_MODE_RESERVED_7                      = 0x7,
1095	PERFMON_SPM_MODE_TEST_MODE_0                     = 0x8,
1096	PERFMON_SPM_MODE_TEST_MODE_1                     = 0x9,
1097	PERFMON_SPM_MODE_TEST_MODE_2                     = 0xa,
1098} PERFMON_SPM_MODE;
1099typedef enum SurfaceTiling {
1100	ARRAY_LINEAR                                     = 0x0,
1101	ARRAY_TILED                                      = 0x1,
1102} SurfaceTiling;
1103typedef enum SurfaceArray {
1104	ARRAY_1D                                         = 0x0,
1105	ARRAY_2D                                         = 0x1,
1106	ARRAY_3D                                         = 0x2,
1107	ARRAY_3D_SLICE                                   = 0x3,
1108} SurfaceArray;
1109typedef enum ColorArray {
1110	ARRAY_2D_ALT_COLOR                               = 0x0,
1111	ARRAY_2D_COLOR                                   = 0x1,
1112	ARRAY_3D_SLICE_COLOR                             = 0x3,
1113} ColorArray;
1114typedef enum DepthArray {
1115	ARRAY_2D_ALT_DEPTH                               = 0x0,
1116	ARRAY_2D_DEPTH                                   = 0x1,
1117} DepthArray;
1118
1119#endif /* DCE_8_0_ENUM_H */
1120