1/*	$NetBSD: gpio_types.h,v 1.2 2021/12/18 23:45:07 riastradh Exp $	*/
2
3/*
4 * Copyright 2012-15 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: AMD
25 *
26 */
27
28#ifndef __DAL_GPIO_TYPES_H__
29#define __DAL_GPIO_TYPES_H__
30
31#define BUNDLE_A_MASK 0x00FFF000L
32#define BUNDLE_B_MASK 0x00000FFFL
33
34/*
35 * gpio_result
36 *
37 * @brief
38 * The possible return codes that the GPIO object can return.
39 * These return codes can be generated
40 * directly by the GPIO object or from the GPIOPin object.
41 */
42enum gpio_result {
43	GPIO_RESULT_OK,
44	GPIO_RESULT_NULL_HANDLE,
45	GPIO_RESULT_INVALID_DATA,
46	GPIO_RESULT_DEVICE_BUSY,
47	GPIO_RESULT_OPEN_FAILED,
48	GPIO_RESULT_ALREADY_OPENED,
49	GPIO_RESULT_NON_SPECIFIC_ERROR
50};
51
52/*
53 * @brief
54 * Used to identify the specific GPIO device
55 *
56 * @notes
57 * These constants are used as indices in a vector.
58 * Thus they should start from zero and be contiguous.
59 */
60enum gpio_id {
61	GPIO_ID_UNKNOWN = (-1),
62	GPIO_ID_DDC_DATA,
63	GPIO_ID_DDC_CLOCK,
64	GPIO_ID_GENERIC,
65	GPIO_ID_HPD,
66	GPIO_ID_GPIO_PAD,
67	GPIO_ID_VIP_PAD,
68	GPIO_ID_SYNC,
69	GPIO_ID_GSL, /* global swap lock */
70	GPIO_ID_COUNT,
71	GPIO_ID_MIN = GPIO_ID_DDC_DATA,
72	GPIO_ID_MAX = GPIO_ID_GSL
73};
74
75#define GPIO_ENUM_UNKNOWN \
76	32
77
78struct gpio_pin_info {
79	uint32_t offset;
80	uint32_t offset_y;
81	uint32_t offset_en;
82	uint32_t offset_mask;
83
84	uint32_t mask;
85	uint32_t mask_y;
86	uint32_t mask_en;
87	uint32_t mask_mask;
88};
89
90enum gpio_pin_output_state {
91	GPIO_PIN_OUTPUT_STATE_ACTIVE_LOW,
92	GPIO_PIN_OUTPUT_STATE_ACTIVE_HIGH,
93	GPIO_PIN_OUTPUT_STATE_DEFAULT = GPIO_PIN_OUTPUT_STATE_ACTIVE_LOW
94};
95
96enum gpio_generic {
97	GPIO_GENERIC_UNKNOWN = (-1),
98	GPIO_GENERIC_A,
99	GPIO_GENERIC_B,
100	GPIO_GENERIC_C,
101	GPIO_GENERIC_D,
102	GPIO_GENERIC_E,
103	GPIO_GENERIC_F,
104	GPIO_GENERIC_G,
105	GPIO_GENERIC_COUNT,
106	GPIO_GENERIC_MIN = GPIO_GENERIC_A,
107	GPIO_GENERIC_MAX = GPIO_GENERIC_B
108};
109
110enum gpio_hpd {
111	GPIO_HPD_UNKNOWN = (-1),
112	GPIO_HPD_1,
113	GPIO_HPD_2,
114	GPIO_HPD_3,
115	GPIO_HPD_4,
116	GPIO_HPD_5,
117	GPIO_HPD_6,
118	GPIO_HPD_COUNT,
119	GPIO_HPD_MIN = GPIO_HPD_1,
120	GPIO_HPD_MAX = GPIO_HPD_6
121};
122
123enum gpio_gpio_pad {
124	GPIO_GPIO_PAD_UNKNOWN = (-1),
125	GPIO_GPIO_PAD_0,
126	GPIO_GPIO_PAD_1,
127	GPIO_GPIO_PAD_2,
128	GPIO_GPIO_PAD_3,
129	GPIO_GPIO_PAD_4,
130	GPIO_GPIO_PAD_5,
131	GPIO_GPIO_PAD_6,
132	GPIO_GPIO_PAD_7,
133	GPIO_GPIO_PAD_8,
134	GPIO_GPIO_PAD_9,
135	GPIO_GPIO_PAD_10,
136	GPIO_GPIO_PAD_11,
137	GPIO_GPIO_PAD_12,
138	GPIO_GPIO_PAD_13,
139	GPIO_GPIO_PAD_14,
140	GPIO_GPIO_PAD_15,
141	GPIO_GPIO_PAD_16,
142	GPIO_GPIO_PAD_17,
143	GPIO_GPIO_PAD_18,
144	GPIO_GPIO_PAD_19,
145	GPIO_GPIO_PAD_20,
146	GPIO_GPIO_PAD_21,
147	GPIO_GPIO_PAD_22,
148	GPIO_GPIO_PAD_23,
149	GPIO_GPIO_PAD_24,
150	GPIO_GPIO_PAD_25,
151	GPIO_GPIO_PAD_26,
152	GPIO_GPIO_PAD_27,
153	GPIO_GPIO_PAD_28,
154	GPIO_GPIO_PAD_29,
155	GPIO_GPIO_PAD_30,
156	GPIO_GPIO_PAD_COUNT,
157	GPIO_GPIO_PAD_MIN = GPIO_GPIO_PAD_0,
158	GPIO_GPIO_PAD_MAX = GPIO_GPIO_PAD_30
159};
160
161enum gpio_vip_pad {
162	GPIO_VIP_PAD_UNKNOWN = (-1),
163	/* following never used -
164	 * GPIO_ID_DDC_CLOCK::GPIO_DDC_LINE_VIP_PAD defined instead */
165	GPIO_VIP_PAD_SCL,
166	/* following never used -
167	 * GPIO_ID_DDC_DATA::GPIO_DDC_LINE_VIP_PAD defined instead */
168	GPIO_VIP_PAD_SDA,
169	GPIO_VIP_PAD_VHAD,
170	GPIO_VIP_PAD_VPHCTL,
171	GPIO_VIP_PAD_VIPCLK,
172	GPIO_VIP_PAD_VID,
173	GPIO_VIP_PAD_VPCLK0,
174	GPIO_VIP_PAD_DVALID,
175	GPIO_VIP_PAD_PSYNC,
176	GPIO_VIP_PAD_COUNT,
177	GPIO_VIP_PAD_MIN = GPIO_VIP_PAD_SCL,
178	GPIO_VIP_PAD_MAX = GPIO_VIP_PAD_PSYNC
179};
180
181enum gpio_sync {
182	GPIO_SYNC_UNKNOWN = (-1),
183	GPIO_SYNC_HSYNC_A,
184	GPIO_SYNC_VSYNC_A,
185	GPIO_SYNC_HSYNC_B,
186	GPIO_SYNC_VSYNC_B,
187	GPIO_SYNC_COUNT,
188	GPIO_SYNC_MIN = GPIO_SYNC_HSYNC_A,
189	GPIO_SYNC_MAX = GPIO_SYNC_VSYNC_B
190};
191
192enum gpio_gsl {
193	GPIO_GSL_UNKNOWN = (-1),
194	GPIO_GSL_GENLOCK_CLOCK,
195	GPIO_GSL_GENLOCK_VSYNC,
196	GPIO_GSL_SWAPLOCK_A,
197	GPIO_GSL_SWAPLOCK_B,
198	GPIO_GSL_COUNT,
199	GPIO_GSL_MIN = GPIO_GSL_GENLOCK_CLOCK,
200	GPIO_GSL_MAX = GPIO_GSL_SWAPLOCK_B
201};
202
203/*
204 * @brief
205 * Unique Id for DDC handle.
206 * Values are meaningful (used as indexes to array)
207 */
208enum gpio_ddc_line {
209	GPIO_DDC_LINE_UNKNOWN = (-1),
210	GPIO_DDC_LINE_DDC1,
211	GPIO_DDC_LINE_DDC2,
212	GPIO_DDC_LINE_DDC3,
213	GPIO_DDC_LINE_DDC4,
214	GPIO_DDC_LINE_DDC5,
215	GPIO_DDC_LINE_DDC6,
216	GPIO_DDC_LINE_DDC_VGA,
217	GPIO_DDC_LINE_VIP_PAD,
218	GPIO_DDC_LINE_I2C_PAD = GPIO_DDC_LINE_VIP_PAD,
219	GPIO_DDC_LINE_COUNT,
220	GPIO_DDC_LINE_MIN = GPIO_DDC_LINE_DDC1,
221	GPIO_DDC_LINE_MAX = GPIO_DDC_LINE_I2C_PAD
222};
223
224/*
225 * @brief
226 * Identifies the mode of operation to open a GPIO device.
227 * A GPIO device (pin) can be programmed in only one of these modes at a time.
228 */
229enum gpio_mode {
230	GPIO_MODE_UNKNOWN = (-1),
231	GPIO_MODE_INPUT,
232	GPIO_MODE_OUTPUT,
233	GPIO_MODE_FAST_OUTPUT,
234	GPIO_MODE_HARDWARE,
235	GPIO_MODE_INTERRUPT
236};
237
238/*
239 * @brief
240 * Identifies the source of the signal when GPIO is in HW mode.
241 * get_signal_source() will return GPIO_SYGNAL_SOURCE__UNKNOWN
242 * when one of the following holds:
243 *    1. GPIO is input GPIO
244 *    2. GPIO is not opened in HW mode
245 *    3. GPIO does not have fixed signal source
246 *    (like DC_GenericA have mux instead fixed)
247 */
248enum gpio_signal_source {
249	GPIO_SIGNAL_SOURCE_UNKNOWN = (-1),
250	GPIO_SIGNAL_SOURCE_DACA_STEREO_SYNC,
251	GPIO_SIGNAL_SOURCE_PASS_THROUGH_STEREO_SYNC,
252	GPIO_SIGNAL_SOURCE_DACB_STEREO_SYNC,
253	GPIO_SIGNAL_SOURCE_DACA_HSYNC,
254	GPIO_SIGNAL_SOURCE_DACB_HSYNC,
255	GPIO_SIGNAL_SOURCE_DACA_VSYNC,
256	GPIO_SIGNAL_SOURCE_DACB_VSYNC,
257};
258
259enum gpio_stereo_source {
260	GPIO_STEREO_SOURCE_UNKNOWN = (-1),
261	GPIO_STEREO_SOURCE_D1,
262	GPIO_STEREO_SOURCE_D2,
263	GPIO_STEREO_SOURCE_D3,
264	GPIO_STEREO_SOURCE_D4,
265	GPIO_STEREO_SOURCE_D5,
266	GPIO_STEREO_SOURCE_D6
267};
268
269/*
270 * GPIO config
271 */
272
273enum gpio_config_type {
274	GPIO_CONFIG_TYPE_NONE,
275	GPIO_CONFIG_TYPE_DDC,
276	GPIO_CONFIG_TYPE_HPD,
277	GPIO_CONFIG_TYPE_GENERIC_MUX,
278	GPIO_CONFIG_TYPE_GSL_MUX,
279	GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE
280};
281
282/* DDC configuration */
283
284enum gpio_ddc_config_type {
285	GPIO_DDC_CONFIG_TYPE_MODE_AUX,
286	GPIO_DDC_CONFIG_TYPE_MODE_I2C,
287	GPIO_DDC_CONFIG_TYPE_POLL_FOR_CONNECT,
288	GPIO_DDC_CONFIG_TYPE_POLL_FOR_DISCONNECT,
289	GPIO_DDC_CONFIG_TYPE_DISABLE_POLLING
290};
291
292struct gpio_ddc_config {
293	enum gpio_ddc_config_type type;
294	bool data_en_bit_present;
295	bool clock_en_bit_present;
296};
297
298/* HPD configuration */
299
300struct gpio_hpd_config {
301	uint32_t delay_on_connect; /* milliseconds */
302	uint32_t delay_on_disconnect; /* milliseconds */
303};
304
305struct gpio_generic_mux_config {
306	bool enable_output_from_mux;
307	enum gpio_signal_source mux_select;
308	enum gpio_stereo_source stereo_select;
309};
310
311enum gpio_gsl_mux_config_type {
312	GPIO_GSL_MUX_CONFIG_TYPE_DISABLE,
313	GPIO_GSL_MUX_CONFIG_TYPE_TIMING_SYNC,
314	GPIO_GSL_MUX_CONFIG_TYPE_FLIP_SYNC
315};
316
317struct gpio_gsl_mux_config {
318	enum gpio_gsl_mux_config_type type;
319	/* Actually sync_source type,
320	 * however we want to avoid inter-component includes here */
321	uint32_t gsl_group;
322};
323
324struct gpio_config_data {
325	enum gpio_config_type type;
326	union {
327		struct gpio_ddc_config ddc;
328		struct gpio_hpd_config hpd;
329		struct gpio_generic_mux_config generic_mux;
330		struct gpio_gsl_mux_config gsl_mux;
331	} config;
332};
333
334#endif
335