1/* $NetBSD: if_cuereg.h,v 1.23 2019/08/15 08:02:32 mrg Exp $ */ 2/* 3 * Copyright (c) 1997, 1998, 1999, 2000 4 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Bill Paul. 17 * 4. Neither the name of the author nor the names of any co-contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 * $FreeBSD: src/sys/dev/usb/if_cuereg.h,v 1.3 2000/01/16 22:45:06 wpaul Exp $ 34 */ 35 36/* 37 * Definitions for the CATC Netmate II USB to ethernet controller. 38 */ 39 40#include <sys/rndsource.h> 41 42/* 43 * Vendor specific control commands. 44 */ 45#define CUE_CMD_READSRAM 0xF1 46#define CUE_CMD_GET_MACADDR 0xF2 47#define CUE_CMD_RESET 0xF4 48#define CUE_CMD_WRITEREG 0xFA 49#define CUE_CMD_READREG 0xFB 50#define CUE_CMD_WRITESRAM 0xFC 51 52/* 53 * Internal registers 54 */ 55#define CUE_TX_BUFCNT 0x20 56#define CUE_RX_BUFCNT 0x21 57#define CUE_ADVANCED_OPMODES 0x22 58#define CUE_TX_BUFPKTS 0x23 59#define CUE_RX_BUFPKTS 0x24 60#define CUE_RX_MAXCHAIN 0x25 61 62#define CUE_ETHCTL 0x60 63#define CUE_ETHSTS 0x61 64#define CUE_PAR5 0x62 65#define CUE_PAR4 0x63 66#define CUE_PAR3 0x64 67#define CUE_PAR2 0x65 68#define CUE_PAR1 0x66 69#define CUE_PAR0 0x67 70 71/* Error counters, all 16 bits wide. */ 72#define CUE_TX_SINGLECOLL 0x69 73#define CUE_TX_MULTICOLL 0x6B 74#define CUE_TX_EXCESSCOLL 0x6D 75#define CUE_RX_FRAMEERR 0x6F 76 77#define CUE_LEDCTL 0x81 78 79/* Advenced operating mode register */ 80#define CUE_AOP_SRAMWAITS 0x03 81#define CUE_AOP_EMBED_RXLEN 0x08 82#define CUE_AOP_RXCOMBINE 0x10 83#define CUE_AOP_TXCOMBINE 0x20 84#define CUE_AOP_EVEN_PKT_READS 0x40 85#define CUE_AOP_LOOPBK 0x80 86 87/* Ethernet control register */ 88#define CUE_ETHCTL_RX_ON 0x01 89#define CUE_ETHCTL_LINK_POLARITY 0x02 90#define CUE_ETHCTL_LINK_FORCE_OK 0x04 91#define CUE_ETHCTL_MCAST_ON 0x08 92#define CUE_ETHCTL_PROMISC 0x10 93 94/* Ethernet status register */ 95#define CUE_ETHSTS_NO_CARRIER 0x01 96#define CUE_ETHSTS_LATECOLL 0x02 97#define CUE_ETHSTS_EXCESSCOLL 0x04 98#define CUE_ETHSTS_TXBUF_AVAIL 0x08 99#define CUE_ETHSTS_BAD_POLARITY 0x10 100#define CUE_ETHSTS_LINK_OK 0x20 101 102/* LED control register */ 103#define CUE_LEDCTL_BLINK_1X 0x00 104#define CUE_LEDCTL_BLINK_2X 0x01 105#define CUE_LEDCTL_BLINK_QUARTER_ON 0x02 106#define CUE_LEDCTL_BLINK_QUARTER_OFF 0x03 107#define CUE_LEDCTL_OFF 0x04 108#define CUE_LEDCTL_FOLLOW_LINK 0x08 109 110/* 111 * Address in ASIC's internal SRAM where the 112 * multicast hash table lives. The table is 64 bytes long, 113 * giving us a 512-bit table. We have to set the bit that 114 * corresponds to the broadcast address in order to enable 115 * reception of broadcast frames. 116 */ 117#define CUE_MCAST_TABLE_ADDR 0xFA80 118#define CUE_MCAST_TABLE_LEN 64 119 120#define CUE_CTL_READ 0x01 121#define CUE_CTL_WRITE 0x02 122