px.c revision 1.33 
1/* 	$NetBSD: px.c,v 1.33 2008/04/28 20:23:58 martin Exp $	*/
2
3/*-
4 * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Andrew Doran.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32/*
33 * Driver for DEC PixelStamp graphics adapters (PMAG-C).
34 */
35
36#include <sys/cdefs.h>
37__KERNEL_RCSID(0, "$NetBSD: px.c,v 1.33 2008/04/28 20:23:58 martin Exp $");
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/device.h>
42#include <sys/malloc.h>
43#include <sys/callout.h>
44
45#include <uvm/uvm_extern.h>
46
47#if defined(pmax)
48#include <mips/cpuregs.h>
49#elif defined(alpha)
50#include <alpha/alpha_cpu.h>
51#endif
52
53#include <machine/autoconf.h>
54#include <sys/cpu.h>
55#include <sys/bus.h>
56
57#include <dev/cons.h>
58
59#include <dev/wscons/wsconsio.h>
60#include <dev/wscons/wsdisplayvar.h>
61
62#include <dev/ic/bt459reg.h>
63
64#include <dev/tc/tcvar.h>
65#include <dev/tc/sticreg.h>
66#include <dev/tc/sticio.h>
67#include <dev/tc/sticvar.h>
68
69#define	PX_STIC_POLL_OFFSET	0x000000	/* STIC DMA poll space */
70#define	PX_STAMP_OFFSET		0x0c0000	/* pixelstamp space on STIC */
71#define	PX_STIC_OFFSET		0x180000	/* STIC registers */
72#define	PX_VDAC_OFFSET		0x200000	/* VDAC registers (bt459) */
73#define	PX_VDAC_RESET_OFFSET	0x300000	/* VDAC reset register */
74#define	PX_ROM_OFFSET		0x300000	/* ROM code */
75
76#define	PX_BUF_COUNT		16
77#define	PX_BUF_INC(x)		((x + 1) & (PX_BUF_COUNT - 1))
78
79/*
80 * We need enough aligned memory to hold:
81 *
82 * - Xserver communication area (4096 bytes)
83 * - 16 packet buffers (4096 bytes each)
84 * - 2 image buffers (5120 bytes each)
85 *
86 */
87#define	PX_BUF_SIZE		\
88    (STIC_PACKET_SIZE * PX_BUF_COUNT + STIC_IMGBUF_SIZE*2 + STIC_XCOMM_SIZE)
89#define	PX_BUF_ALIGN		32768
90
91#define	PXF_QUEUE	0x01
92
93static void	px_attach(struct device *, struct device *, void *);
94static void	px_init(struct stic_info *, int);
95static int	px_ioctl(struct stic_info *, u_long, void *, int,
96			 struct lwp *);
97static int	px_match(struct device *, struct cfdata *, void *);
98
99static int	px_intr(void *);
100static uint32_t	*px_pbuf_get(struct stic_info *);
101static int	px_pbuf_post(struct stic_info *, u_int32_t *);
102
103void	px_cnattach(tc_addr_t);
104
105struct px_softc {
106	struct	device px_dv;
107	struct	stic_info *px_si;
108	volatile u_int32_t	*px_qpoll[PX_BUF_COUNT];
109};
110
111CFATTACH_DECL(px, sizeof(struct px_softc),
112    px_match, px_attach, NULL, NULL);
113
114static int
115px_match(struct device *parent, struct cfdata *match, void *aux)
116{
117	struct tc_attach_args *ta;
118
119	ta = aux;
120
121	return (strncmp("PMAG-CA ", ta->ta_modname, TC_ROM_LLEN) == 0);
122}
123
124static void
125px_attach(struct device *parent, struct device *self, void *aux)
126{
127	struct stic_info *si;
128	struct tc_attach_args *ta;
129	struct px_softc *px;
130	int console, i;
131	u_long v;
132
133	px = device_private(self);
134	ta = (struct tc_attach_args *)aux;
135
136	if (ta->ta_addr == stic_consinfo.si_slotbase) {
137		si = &stic_consinfo;
138		console = 1;
139	} else {
140		if (stic_consinfo.si_slotbase == 0)
141			si = &stic_consinfo;
142		else {
143			si = malloc(sizeof(*si), M_DEVBUF, M_NOWAIT|M_ZERO);
144		}
145		si->si_slotbase = ta->ta_addr;
146		px_init(si, 0);
147		console = 0;
148	}
149
150	px->px_si = si;
151	si->si_dv = self;
152	tc_intr_establish(parent, ta->ta_cookie, IPL_TTY, px_intr, si);
153
154	printf(": 8 plane, %dx%d stamp\n", si->si_stampw, si->si_stamph);
155
156	for (i = 0; i < PX_BUF_COUNT; i++) {
157		v = i * STIC_PACKET_SIZE +
158		    si->si_buf_phys + STIC_XCOMM_SIZE;
159		v = ((v & 0xffff8000) << 3) | (v & 0x7fff);
160		px->px_qpoll[i] = (volatile u_int32_t *)
161		    ((char *)si->si_slotbase + (v >> 9));
162	}
163
164	stic_attach(self, si, console);
165}
166
167void
168px_cnattach(tc_addr_t addr)
169{
170	struct stic_info *si;
171
172	si = &stic_consinfo;
173	si->si_slotbase = addr;
174	px_init(si, 1);
175	stic_cnattach(si);
176}
177
178static void
179px_init(struct stic_info *si, int bootstrap)
180{
181	struct pglist pglist;
182	char *kva, *bva;
183	paddr_t bpa;
184
185	kva = (void *)si->si_slotbase;
186
187	/*
188	 * Allocate memory for the packet buffers.  It must be located below
189	 * 8MB, since the STIC can't access outside that region.  Also, due
190	 * to the holes in STIC address space, each buffer mustn't cross a
191	 * 32kB boundary.
192	 */
193	if (bootstrap) {
194		/*
195		 * UVM won't be initialised at this point, so grab memory
196		 * directly from vm_physmem[].
197		 */
198		bva = (char *)uvm_pageboot_alloc(PX_BUF_SIZE + PX_BUF_ALIGN);
199		bpa = (STIC_KSEG_TO_PHYS(bva) + PX_BUF_ALIGN - 1) &
200		    ~(PX_BUF_ALIGN - 1);
201		if (bpa + PX_BUF_SIZE > 8192*1024)
202			panic("px_init: allocation out of bounds");
203	} else {
204		if (uvm_pglistalloc(PX_BUF_SIZE, 0, 8192*1024, PX_BUF_ALIGN,
205		    0, &pglist, 1, 0) != 0)
206			panic("px_init: allocation failure");
207		bpa = VM_PAGE_TO_PHYS(TAILQ_FIRST(&pglist));
208	}
209
210	si->si_vdac = (u_int32_t *)(kva + PX_VDAC_OFFSET);
211	si->si_vdac_reset = (u_int32_t *)(kva + PX_VDAC_RESET_OFFSET);
212	si->si_stic = (volatile struct stic_regs *)(kva + PX_STIC_OFFSET);
213	si->si_stamp = (u_int32_t *)(kva + PX_STAMP_OFFSET);
214	si->si_buf = (u_int32_t *)TC_PHYS_TO_UNCACHED(bpa);
215	si->si_buf_phys = bpa;
216	si->si_buf_size = PX_BUF_SIZE;
217	si->si_disptype = WSDISPLAY_TYPE_PX;
218	si->si_depth = 8;
219	si->si_sxc = (volatile struct stic_xcomm *)si->si_buf;
220
221	si->si_pbuf_get = px_pbuf_get;
222	si->si_pbuf_post = px_pbuf_post;
223	si->si_ioctl = px_ioctl;
224
225	memset(si->si_buf, 0, PX_BUF_SIZE);
226
227	stic_init(si);
228}
229
230static int
231px_intr(void *cookie)
232{
233	volatile struct stic_regs *sr;
234	volatile struct stic_xcomm *sxc;
235	struct stic_info *si;
236	struct px_softc *px;
237	int state;
238
239	si = cookie;
240	px = (struct px_softc *)si->si_dv;
241	sr = si->si_stic;
242	state = sr->sr_ipdvint;
243	sxc = si->si_sxc;
244
245	/*
246	 * Vertical-retrace condition.
247	 *
248	 * Clear the flag and flush out any waiting VDAC updates.  We do
249	 * this at retrace time to avoid producing `shearing' and other
250	 * nasty artifacts.
251	 */
252	if ((state & STIC_INT_V) != 0) {
253		sr->sr_ipdvint = STIC_INT_V_WE | STIC_INT_V_EN;
254		tc_wmb();
255		stic_flush(si);
256	}
257
258	/*
259	 * Error condition.
260	 *
261	 * Simply clear the flag and report the error.
262	 */
263	if ((state & STIC_INT_E) != 0) {
264		aprint_error_dev(&px->px_dv, "error intr, %x %x %x %x %x",
265		    sr->sr_ipdvint, sr->sr_sticsr, sr->sr_buscsr,
266		    sr->sr_busadr, sr->sr_busdat);
267		sr->sr_ipdvint = STIC_INT_E_WE | STIC_INT_E_EN;
268		tc_wmb();
269	}
270
271	/*
272	 * Check for queue stalls.
273	 */
274	if (sxc->sxc_tail != sxc->sxc_head && !sxc->sxc_busy)
275		state |= STIC_INT_P;
276
277	/*
278	 * Packet-done condition.
279	 *
280	 * If packet queueing is enabled, clear the condition, and increment
281	 * the tail (submitted) pointer.
282	 */
283	if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P) != 0) {
284		sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN;
285		tc_wmb();
286
287		if (sxc->sxc_tail != sxc->sxc_head) {
288			sxc->sxc_done[sxc->sxc_tail] = 0;
289			sxc->sxc_tail = PX_BUF_INC(sxc->sxc_tail);
290		}
291
292		if (sxc->sxc_tail != sxc->sxc_head) {
293			if (*px->px_qpoll[sxc->sxc_tail] != STAMP_OK) {
294				sxc->sxc_nreject++;
295				sxc->sxc_busy = 0;
296			} else
297				sxc->sxc_busy = 1;
298		} else
299			sxc->sxc_busy = 0;
300	}
301
302	if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P_EN) == 0)
303		printf("px_intr: STIC_INT_P_EN == 0\n");
304
305	return (1);
306}
307
308static uint32_t *
309px_pbuf_get(struct stic_info *si)
310{
311	u_long off;
312
313	si->si_pbuf_select ^= STIC_PACKET_SIZE;
314	off = si->si_pbuf_select + STIC_XCOMM_SIZE;
315	return ((u_int32_t *)((char *)si->si_buf + off));
316}
317
318static int
319px_pbuf_post(struct stic_info *si, u_int32_t *buf)
320{
321	volatile u_int32_t *poll, junk;
322	volatile struct stic_regs *sr;
323	u_long v;
324	int c;
325
326	sr = si->si_stic;
327
328	/* Get address of poll register for this buffer. */
329	v = (u_long)STIC_KSEG_TO_PHYS(buf);
330	v = ((v & 0xffff8000) << 3) | (v & 0x7fff);
331	poll = (volatile u_int32_t *)((char *)si->si_slotbase + (v >> 9));
332
333	/*
334	 * Read the poll register and make sure the stamp wants to accept
335	 * our packet.  This read will initiate the DMA.  Don't wait for
336	 * ever, just in case something's wrong.
337	 */
338	tc_mb();
339
340	for (c = STAMP_RETRIES; c != 0; c--) {
341		if ((sr->sr_ipdvint & STIC_INT_P) != 0) {
342			sr->sr_ipdvint = STIC_INT_P_WE;
343			tc_wmb();
344			junk = *poll;
345			return (0);
346		}
347		DELAY(STAMP_DELAY);
348	}
349
350	/* STIC has lost the plot, punish it. */
351	stic_reset(si);
352	return (-1);
353}
354
355static int
356px_ioctl(struct stic_info *si, u_long cmd, void *data, int flag,
357	 struct lwp *l)
358{
359	volatile struct stic_xcomm *sxc;
360	volatile struct stic_regs *sr;
361	struct stic_xinfo *sxi;
362	int rv, s;
363
364	sr = si->si_stic;
365
366	switch (cmd) {
367	case STICIO_STARTQ:
368		if (si->si_dispmode != WSDISPLAYIO_MODE_MAPPED ||
369		    (si->si_hwflags & PXF_QUEUE) != 0) {
370			rv = EBUSY;
371			break;
372		}
373
374		sxc = si->si_sxc;
375	 	memset((void *)__UNVOLATILE(sxc->sxc_done), 0,
376			sizeof(sxc->sxc_done));
377		sxc->sxc_head = 0;
378		sxc->sxc_tail = 0;
379		sxc->sxc_nreject = 0;
380		sxc->sxc_nstall = 0;
381
382		s = spltty();
383		si->si_hwflags |= PXF_QUEUE;
384		sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN;
385		tc_wmb();
386		splx(s);
387
388		rv = 0;
389		break;
390
391	case STICIO_STOPQ:
392		s = spltty();
393		si->si_hwflags &= ~PXF_QUEUE;
394		sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P;
395		tc_wmb();
396		splx(s);
397		rv = 0;
398		break;
399
400	case STICIO_GXINFO:
401		sxi = (struct stic_xinfo *)data;
402		sxi->sxi_unit = si->si_unit;
403		sxi->sxi_stampw = si->si_stampw;
404		sxi->sxi_stamph = si->si_stamph;
405		sxi->sxi_buf_size = si->si_buf_size;
406		sxi->sxi_buf_phys = (u_int)si->si_buf_phys;
407		sxi->sxi_buf_pktoff = STIC_XCOMM_SIZE;
408		sxi->sxi_buf_pktcnt = PX_BUF_COUNT;
409		sxi->sxi_buf_imgoff =
410		    STIC_XCOMM_SIZE + STIC_PACKET_SIZE * PX_BUF_COUNT;
411		rv = 0;
412		break;
413
414	default:
415		rv = EPASSTHROUGH;
416		break;
417	}
418
419	return (rv);
420}
421