17055Sdg/* $NetBSD: sdmmc_ioreg.h,v 1.6 2019/12/19 17:24:45 kamil Exp $ */ 221830Sjoerg/* $OpenBSD: sdmmc_ioreg.h,v 1.4 2007/06/02 01:48:37 uwe Exp $ */ 321830Sjoerg 47055Sdg/* 57055Sdg * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 67055Sdg * 77055Sdg * Permission to use, copy, modify, and distribute this software for any 87055Sdg * purpose with or without fee is hereby granted, provided that the above 97055Sdg * copyright notice and this permission notice appear in all copies. 107055Sdg * 117055Sdg * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 127055Sdg * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 137055Sdg * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 147055Sdg * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 157055Sdg * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 167055Sdg * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 177055Sdg * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 187055Sdg */ 197055Sdg 207055Sdg#ifndef _SDMMC_IOREG_H_ 217055Sdg#define _SDMMC_IOREG_H_ 227055Sdg 237055Sdg/* SDIO commands */ /* response type */ 247055Sdg#define SD_IO_SEND_OP_COND 5 /* R4 */ 257055Sdg#define SD_IO_RW_DIRECT 52 /* R5 */ 267055Sdg#define SD_IO_RW_EXTENDED 53 /* R5? */ 277055Sdg 287055Sdg/* CMD52 arguments */ 297055Sdg#define SD_ARG_CMD52_READ (0<<31) 307055Sdg#define SD_ARG_CMD52_WRITE (1UL<<31) 317055Sdg#define SD_ARG_CMD52_FUNC_SHIFT 28 327055Sdg#define SD_ARG_CMD52_FUNC_MASK 0x7 337055Sdg#define SD_ARG_CMD52_EXCHANGE (1<<27) 347055Sdg#define SD_ARG_CMD52_REG_SHIFT 9 357061Sdg#define SD_ARG_CMD52_REG_MASK 0x1ffff 3650477Speter#define SD_ARG_CMD52_DATA_SHIFT 0 377055Sdg#define SD_ARG_CMD52_DATA_MASK 0xff 387055Sdg#define SD_R5_DATA(resp) ((resp)[0] & 0xff) 3932356Seivind 4032350Seivind/* CMD53 arguments */ 4154263Sshin#define SD_ARG_CMD53_READ (0<<31) 4231742Seivind#define SD_ARG_CMD53_WRITE (1U<<31) 43105577Srwatson#define SD_ARG_CMD53_FUNC_SHIFT 28 4431742Seivind#define SD_ARG_CMD53_FUNC_MASK 0x7 457055Sdg#define SD_ARG_CMD53_BLOCK_MODE (1<<27) 467055Sdg#define SD_ARG_CMD53_INCREMENT (1<<26) 4793375Smdodd#define SD_ARG_CMD53_REG_SHIFT 9 48105577Srwatson#define SD_ARG_CMD53_REG_MASK 0x1ffff 4993375Smdodd#define SD_ARG_CMD53_LENGTH_SHIFT 0 507055Sdg#define SD_ARG_CMD53_LENGTH_MASK 0x1ff 5193375Smdodd#define SD_ARG_CMD53_LENGTH_MAX 64 527055Sdg 5393375Smdodd/* 48-bit response decoding (32 bits w/o CRC) */ 547055Sdg#define MMC_R4(resp) ((resp)[0]) 557055Sdg#define MMC_R5(resp) ((resp)[0]) 56112271Smdodd 577055Sdg/* SD R4 response (IO OCR) */ 587055Sdg#define SD_IO_OCR_MEM_READY (1U<<31) 59112271Smdodd#define SD_IO_OCR_NUM_FUNCTIONS(ocr) (((ocr) >> 28) & 0x7) 6093375Smdodd#define SD_IO_OCR_MEM_PRESENT (1<<27) 6193375Smdodd#define SD_IO_OCR_MASK 0x00fffff0 6293375Smdodd 6393373Smdodd/* Card Common Control Registers (CCCR) */ 647055Sdg#define SD_IO_CCCR_START 0x00000 6554263Sshin#define SD_IO_CCCR_SIZE 0x100 667055Sdg#define SD_IO_CCCR_CCCR_SDIO_REV 0x00 677055Sdg#define SD_IO_CCCR_CCCR_REV(r) ((r) & 0xf) 6832350Seivind#define CCCR_CCCR_REV_1_00 0 697055Sdg#define CCCR_CCCR_REV_1_10 1 7054263Sshin#define CCCR_CCCR_REV_1_20 2 7154263Sshin#define CCCR_CCCR_REV_3_00 3 7254263Sshin#define SD_IO_CCCR_SDIO_REV(r) (((r) >> 4) & 0xf) 737055Sdg#define CCCR_SDIO_REV_1_00 0 7411819Sjulian#define CCCR_SDIO_REV_1_10 1 7521830Sjoerg#define CCCR_SDIO_REV_1_20 2 /* (unreleased) */ 7611819Sjulian#define CCCR_SDIO_REV_2_00 3 7711819Sjulian#define CCCR_SDIO_REV_3_00 4 7811819Sjulian#define SD_IO_CCCR_SPEC_REV 0x01 797055Sdg#define SD_IO_CCCR_SD_PHYS_SPEC_VER(r) ((r) & 0xf) 807055Sdg#define CCCR_SD_PHYS_SPEC_VER_1_01 0 817055Sdg#define CCCR_SD_PHYS_SPEC_VER_1_10 1 827055Sdg#define CCCR_SD_PHYS_SPEC_VER_2_00 2 8321830Sjoerg#define CCCR_SD_PHYS_SPEC_VER_3_00 3 8421830Sjoerg#define SD_IO_CCCR_FN_ENABLE 0x02 8521830Sjoerg#define SD_IO_CCCR_FN_IOREADY 0x03 8621830Sjoerg#define SD_IO_CCCR_FN_INTEN 0x04 8721830Sjoerg#define CCCR_INTEN_INTM (1<<0) 8821830Sjoerg#define SD_IO_CCCR_FN_INTPENDING 0x05 8921830Sjoerg#define SD_IO_CCCR_CTL 0x06 9021830Sjoerg#define CCCR_CTL_RES (1<<3) 9121830Sjoerg#define CCCR_CTL_AS(x) ((x) & 0x7) 92126788Srwatson#define SD_IO_CCCR_BUS_WIDTH 0x07 9393382Smdodd#define CCCR_BUS_WIDTH_4 (2<<0) 9493382Smdodd#define CCCR_BUS_WIDTH_1 (0<<0) 9593383Smdodd#define CCCR_BUS_ECSI (1<<5) 9693084Sbde#define CCCR_BUS_SCSI (1<<6) 9793383Smdodd#define CCCR_BUS_NOCD (1<<7) 9893383Smdodd#define SD_IO_CCCR_CAPABILITY 0x08 99106939Ssam#define CCCR_CAPS_SDC (1<<0) 10068180Sume#define CCCR_CAPS_SMB (1<<1) /* Multi-Block support */ 101112276Smdodd#define CCCR_CAPS_SRB (1<<2) /* Read Wait support */ 10293369Smdodd#define CCCR_CAPS_SBS (1<<3) /* Suspend/Resume support */ 1037055Sdg#define CCCR_CAPS_S4MI (1<<4) /* intr support in 4-bit mode */ 1047055Sdg#define CCCR_CAPS_E4MI (1<<5) /* enable intr in 4-bit mode */ 1057055Sdg#define CCCR_CAPS_LSC (1<<6) /* Low speed card */ 1067055Sdg#define CCCR_CAPS_4BLS (1<<7) /* 4-bit support for low speed */ 1077055Sdg#define SD_IO_CCCR_CISPTR 0x09 /* XXX 9-10, 10-11, or 9-12 */ 1087055Sdg#define SD_IO_CCCR_BUS_SUSPEND 0x0c 1097055Sdg#define SD_IO_CCCR_FUNC_SELECT 0x0d 11093383Smdodd#define SD_IO_CCCR_EXEC_FLAGS 0x0e 11154799Sgreen#define SD_IO_CCCR_READY_FLAGS 0x0f 11293367Smdodd#define CCCR_FUNC_FS(r) ((r) & 0xf) 11354799Sgreen#define CCCR_FUNC_FS_FN(fn) ((fn) & 0x7) 1147055Sdg#define CCCR_FUNC_FS_MEM 8 1157055Sdg#define SD_IO_CCCR_FN_EXEC_FLG 0x0e 1167055Sdg#define SD_IO_CCCR_FN_READY_FLG 0x0f 11721830Sjoerg#define SD_IO_CCCR_FN0_BLKSIZ 0x10 /* 0x10-0x11 */ 11869152Sjlemon#define SD_IO_CCCR_POWER_CTL 0x12 11993373Smdodd#define SD_IO_CCCR_HIGH_SPEED 0x13 12093367Smdodd#define CCCR_HIGH_SPEED_SHS (1<<0) /* Support High-Speed */ 1217055Sdg#define CCCR_HIGH_SPEED_EHS (1<<1) /* Enable High-Speed */ 122105577Srwatson#define CCCR_HIGH_SPEED_SDR50 (2<<1) 123105577Srwatson#define CCCR_HIGH_SPEED_SDR104 (3<<1) 124105577Srwatson#define CCCR_HIGH_SPEED_DDR50 (4<<1) 125105577Srwatson#define SD_IO_CCCR_UHS 0x14 126105577Srwatson#define CCCR_UHS_SDR50 (1<<0) 127105577Srwatson#define CCCR_UHS_SDR104 (1<<1) 128112308Smdodd#define CCCR_UHS_DDR50 (1<<2) 129112308Smdodd#define SD_IO_DRIVE_STRENGTH 0x15 1307055Sdg#define CCCR_DRIVE_SDTA (1<<0) 1317055Sdg#define CCCR_DRIVE_SDTC (1<<1) 13234961Sphk#define CCCR_DRIVE_SDTD (1<<2) 133111767Smdodd 1347055Sdg/* Function Basic Registers (FBR) */ 1357055Sdg#define SD_IO_FBR_START 0x00100 13621830Sjoerg#define SD_IO_FBR_SIZE 0x100 137128636Sluigi#define SD_IO_FBR(func) ((((func) - 1) * SD_IO_FBR_SIZE) + SD_IO_FBR_START) 138128636Sluigi 139128636Sluigi/* FBR offsets */ 14021830Sjoerg#define SD_IO_FBR_BASIC 0x00 1417055Sdg#define FBR_STD_FUNC_IF_CODE(v) ((v) & 0x0f) 14221830Sjoerg#define FBR_STD_FUNC_CSA(v) ((v) & 0x40) /* supports CSA */ 143126951Smdodd#define FBR_STD_FUNC_CSAE(v) ((v) & 0x80) /* enable CSA */ 144126951Smdodd#define SD_IO_FBR_EXT 0x01 145126951Smdodd#define SD_IO_FBR_PWR 0x02 146126951Smdodd#define FBR_PWR_SPS (1<<0) /* support power selection */ 147126951Smdodd#define FBR_PWR_EPS (1<<1) /* enable low power selection */ 148126951Smdodd#define SD_IO_FBR_CIS 0x09 /* 0x109-0x10b */ 149126951Smdodd#define SD_IO_FBR_CSA 0x0c /* 0x10c-0x10e */ 150126951Smdodd#define SD_IO_FBR_DATA 0x0f 151126951Smdodd#define SD_IO_FBR_BLOCKLEN 0x10 /* 0x110-0x111 */ 152126951Smdodd 153126951Smdodd/* Card Information Structure (CIS) */ 154126951Smdodd#define SD_IO_CIS_START 0x01000 155126951Smdodd#define SD_IO_CIS_SIZE 0x17000 156126951Smdodd 157126951Smdodd/* SDIO Standard Function Interface code */ 158126951Smdodd#define SD_IO_SFIC_NO_STANDARD 0x0 159126951Smdodd#define SD_IO_SFIC_UART 0x1 160126951Smdodd#define SD_IO_SFIC_TYPEA_BLUETOOTH 0x2 /* Type-A Bluetooth */ 161126951Smdodd#define SD_IO_SFIC_TYPEB_BLUETOOTH 0x3 /* Type-B Bluetooth */ 162126951Smdodd#define SD_IO_SFIC_GPS 0x4 163126951Smdodd#define SD_IO_SFIC_CAMERA 0x5 164126951Smdodd#define SD_IO_SFIC_PHS 0x6 165126951Smdodd#define SD_IO_SFIC_WLAN 0x7 166126951Smdodd#define SD_IO_SFIC_ATA 0x8 /* Embedded SDIO-ATA */ 167126951Smdodd#define SD_IO_SFIC_EXTENDED 0xf /* See next byte */ 168126951Smdodd 169126951Smdodd#endif /* _SDMMC_IOREG_H_ */ 170112266Smdodd