1/* $NetBSD: p9100.c,v 1.66 2022/09/25 18:03:04 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 2005, 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32/* 33 * color display (p9100) driver. 34 * 35 * Does not handle interrupts, even though they can occur. 36 * 37 * XXX should defer colormap updates to vertical retrace interrupts 38 */ 39 40#include <sys/cdefs.h> 41__KERNEL_RCSID(0, "$NetBSD: p9100.c,v 1.66 2022/09/25 18:03:04 thorpej Exp $"); 42 43#include <sys/param.h> 44#include <sys/systm.h> 45#include <sys/buf.h> 46#include <sys/device.h> 47#include <sys/ioctl.h> 48#include <sys/mman.h> 49#include <sys/tty.h> 50#include <sys/conf.h> 51 52#include <sys/bus.h> 53#include <machine/autoconf.h> 54 55#include <dev/sun/fbio.h> 56#include <dev/sun/fbvar.h> 57#include <dev/sun/btreg.h> 58#include <dev/sun/btvar.h> 59 60#include <dev/sbus/p9100reg.h> 61 62#include <dev/sbus/sbusvar.h> 63 64#include <dev/wscons/wsdisplayvar.h> 65#include <dev/wscons/wsconsio.h> 66#include <dev/wsfont/wsfont.h> 67#include <dev/rasops/rasops.h> 68 69#include <dev/wscons/wsdisplay_vconsvar.h> 70#include <dev/wscons/wsdisplay_glyphcachevar.h> 71 72#include "opt_wsemul.h" 73#include "rasops_glue.h" 74#include "opt_pnozz.h" 75 76#include "ioconf.h" 77 78#include "tctrl.h" 79#if NTCTRL > 0 80#include <machine/tctrl.h> 81#include <sparc/dev/tctrlvar.h> /*XXX*/ 82#endif 83 84#ifdef PNOZZ_DEBUG 85#define DPRINTF aprint_normal 86#else 87#define DPRINTF while (0) aprint_normal 88#endif 89 90struct pnozz_cursor { 91 short pc_enable; /* cursor is enabled */ 92 struct fbcurpos pc_pos; /* position */ 93 struct fbcurpos pc_hot; /* hot-spot */ 94 struct fbcurpos pc_size; /* size of mask & image fields */ 95 uint32_t pc_bits[0x100]; /* space for mask & image bits */ 96 unsigned char red[3], green[3]; 97 unsigned char blue[3]; /* cursor palette */ 98}; 99 100/* per-display variables */ 101struct p9100_softc { 102 device_t sc_dev; /* base device */ 103 struct fbdevice sc_fb; /* frame buffer device */ 104 105 bus_space_tag_t sc_bustag; 106 107 bus_addr_t sc_ctl_paddr; /* phys address description */ 108 bus_size_t sc_ctl_psize; /* for device mmap() */ 109 bus_space_handle_t sc_ctl_memh; /* bus space handle */ 110 111 bus_addr_t sc_fb_paddr; /* phys address description */ 112 bus_size_t sc_fb_psize; /* for device mmap() */ 113#ifdef PNOZZ_USE_LATCH 114 bus_space_handle_t sc_fb_memh; /* bus space handle */ 115#endif 116 uint32_t sc_mono_width; /* for setup_mono */ 117 118 uint32_t sc_width; 119 uint32_t sc_height; /* panel width / height */ 120 uint32_t sc_stride; 121 uint32_t sc_depth; 122 int sc_depthshift; /* blitter works on bytes not pixels */ 123 124 union bt_cmap sc_cmap; /* Brooktree color map */ 125 126 struct pnozz_cursor sc_cursor; 127 128 int sc_mode; 129 int sc_video, sc_powerstate; 130 uint32_t sc_bg; 131 volatile uint32_t sc_last_offset; 132 struct vcons_data vd; 133 uint8_t sc_dac_power; 134 glyphcache sc_gc; 135}; 136 137 138static struct vcons_screen p9100_console_screen; 139 140extern const u_char rasops_cmap[768]; 141 142struct wsscreen_descr p9100_defscreendesc = { 143 "default", 144 0, 0, 145 NULL, 146 8, 16, 147 WSSCREEN_WSCOLORS, 148}; 149 150const struct wsscreen_descr *_p9100_scrlist[] = { 151 &p9100_defscreendesc, 152 /* XXX other formats, graphics screen? */ 153}; 154 155struct wsscreen_list p9100_screenlist = { 156 sizeof(_p9100_scrlist) / sizeof(struct wsscreen_descr *), 157 _p9100_scrlist 158}; 159 160/* autoconfiguration driver */ 161static int p9100_sbus_match(device_t, cfdata_t, void *); 162static void p9100_sbus_attach(device_t, device_t, void *); 163 164static void p9100unblank(device_t); 165 166CFATTACH_DECL_NEW(pnozz, sizeof(struct p9100_softc), 167 p9100_sbus_match, p9100_sbus_attach, NULL, NULL); 168 169static dev_type_open(p9100open); 170static dev_type_close(p9100close); 171static dev_type_ioctl(p9100ioctl); 172static dev_type_mmap(p9100mmap); 173 174const struct cdevsw pnozz_cdevsw = { 175 .d_open = p9100open, 176 .d_close = nullclose, 177 .d_read = noread, 178 .d_write = nowrite, 179 .d_ioctl = p9100ioctl, 180 .d_stop = nostop, 181 .d_tty = notty, 182 .d_poll = nopoll, 183 .d_mmap = p9100mmap, 184 .d_kqfilter = nokqfilter, 185 .d_discard = nodiscard, 186 .d_flag = 0 187}; 188 189/* frame buffer generic driver */ 190static struct fbdriver p9100fbdriver = { 191 p9100unblank, p9100open, p9100close, p9100ioctl, nopoll, 192 p9100mmap, nokqfilter 193}; 194 195static void p9100loadcmap(struct p9100_softc *, int, int); 196static void p9100_set_video(struct p9100_softc *, int); 197static int p9100_get_video(struct p9100_softc *); 198static uint32_t p9100_ctl_read_4(struct p9100_softc *, bus_size_t); 199static void p9100_ctl_write_4(struct p9100_softc *, bus_size_t, uint32_t); 200static uint8_t p9100_ramdac_read(struct p9100_softc *, bus_size_t); 201static void p9100_ramdac_write(struct p9100_softc *, bus_size_t, uint8_t); 202 203static uint8_t p9100_ramdac_read_ctl(struct p9100_softc *, int); 204static void p9100_ramdac_write_ctl(struct p9100_softc *, int, uint8_t); 205 206static void p9100_init_engine(struct p9100_softc *); 207static int p9100_set_depth(struct p9100_softc *, int); 208 209static void p9100_sync(struct p9100_softc *); 210static void p9100_bitblt(void *, int, int, int, int, int, int, int); 211static void p9100_rectfill(void *, int, int, int, int, uint32_t); 212static void p9100_clearscreen(struct p9100_softc *); 213 214static void p9100_setup_mono(struct p9100_softc *, int, int, int, int, 215 uint32_t, uint32_t); 216static void p9100_feed_line(struct p9100_softc *, int, uint8_t *); 217static void p9100_set_color_reg(struct p9100_softc *, int, int32_t); 218 219static void p9100_copycols(void *, int, int, int, int); 220static void p9100_erasecols(void *, int, int, int, long); 221static void p9100_copyrows(void *, int, int, int); 222static void p9100_eraserows(void *, int, int, long); 223/*static int p9100_mapchar(void *, int, u_int *);*/ 224static void p9100_putchar(void *, int, int, u_int, long); 225static void p9100_putchar_aa(void *, int, int, u_int, long); 226static void p9100_cursor(void *, int, int, int); 227 228static int p9100_putcmap(struct p9100_softc *, struct wsdisplay_cmap *); 229static int p9100_getcmap(struct p9100_softc *, struct wsdisplay_cmap *); 230static int p9100_ioctl(void *, void *, u_long, void *, int, struct lwp *); 231static paddr_t p9100_mmap(void *, void *, off_t, int); 232 233/*static int p9100_load_font(void *, void *, struct wsdisplay_font *);*/ 234 235static void p9100_init_screen(void *, struct vcons_screen *, int, 236 long *); 237 238static void p9100_init_cursor(struct p9100_softc *); 239 240static void p9100_set_fbcursor(struct p9100_softc *); 241static void p9100_setcursorcmap(struct p9100_softc *); 242static void p9100_loadcursor(struct p9100_softc *); 243 244#if 0 245static int p9100_intr(void *); 246#endif 247 248/* power management stuff */ 249static bool p9100_suspend(device_t, const pmf_qual_t *); 250static bool p9100_resume(device_t, const pmf_qual_t *); 251 252#if NTCTRL > 0 253static void p9100_set_extvga(void *, int); 254#endif 255 256struct wsdisplay_accessops p9100_accessops = { 257 p9100_ioctl, 258 p9100_mmap, 259 NULL, /* vcons_alloc_screen */ 260 NULL, /* vcons_free_screen */ 261 NULL, /* vcons_show_screen */ 262 NULL, /* load_font */ 263 NULL, /* polls */ 264 NULL, /* scroll */ 265}; 266 267#ifdef PNOZZ_USE_LATCH 268#define PNOZZ_LATCH(sc, off) if(sc->sc_last_offset != (off & 0xffffff80)) { \ 269 (void)bus_space_read_4(sc->sc_bustag, sc->sc_fb_memh, off); \ 270 sc->sc_last_offset = off & 0xffffff80; } 271#else 272#define PNOZZ_LATCH(a, b) 273#endif 274 275/* 276 * Match a p9100. 277 */ 278static int 279p9100_sbus_match(device_t parent, cfdata_t cf, void *aux) 280{ 281 struct sbus_attach_args *sa = aux; 282 283 if (strcmp("p9100", sa->sa_name) == 0) 284 return 100; 285 return 0; 286} 287 288 289/* 290 * Attach a display. We need to notice if it is the console, too. 291 */ 292static void 293p9100_sbus_attach(device_t parent, device_t self, void *args) 294{ 295 struct p9100_softc *sc = device_private(self); 296 struct sbus_attach_args *sa = args; 297 struct fbdevice *fb = &sc->sc_fb; 298 int isconsole; 299 int node = sa->sa_node; 300 int i, j; 301 uint8_t ver, cmap[768]; 302 303 struct wsemuldisplaydev_attach_args aa; 304 struct rasops_info *ri; 305 unsigned long defattr; 306 307 sc->sc_last_offset = 0xffffffff; 308 sc->sc_dev = self; 309 310 /* 311 * When the ROM has mapped in a p9100 display, the address 312 * maps only the video RAM, so in any case we have to map the 313 * registers ourselves. 314 */ 315 316 if (sa->sa_npromvaddrs != 0) 317 fb->fb_pixels = (void *)sa->sa_promvaddrs[0]; 318 319 /* Remember cookies for p9100_mmap() */ 320 sc->sc_bustag = sa->sa_bustag; 321 322 sc->sc_ctl_paddr = sbus_bus_addr(sa->sa_bustag, 323 sa->sa_reg[0].oa_space, sa->sa_reg[0].oa_base); 324 sc->sc_ctl_psize = 0x8000;/*(bus_size_t)sa->sa_reg[0].oa_size;*/ 325 326 sc->sc_fb_paddr = sbus_bus_addr(sa->sa_bustag, 327 sa->sa_reg[2].oa_space, sa->sa_reg[2].oa_base); 328 sc->sc_fb_psize = (bus_size_t)sa->sa_reg[2].oa_size; 329 330 if (sbus_bus_map(sc->sc_bustag, 331 sa->sa_reg[0].oa_space, 332 sa->sa_reg[0].oa_base, 333 /* 334 * XXX for some reason the SBus resources don't cover 335 * all registers, so we just map what we need 336 */ 337 0x8000, 338 0, &sc->sc_ctl_memh) != 0) { 339 printf("%s: cannot map control registers\n", 340 device_xname(self)); 341 return; 342 } 343 344 /* 345 * we need to map the framebuffer even though we never write to it, 346 * thanks to some weirdness in the SPARCbook's SBus glue for the 347 * P9100 - all register accesses need to be 'latched in' whenever we 348 * go to another 0x80 aligned 'page' by reading the framebuffer at the 349 * same offset 350 * XXX apparently the latter isn't true - my SB3GX works fine without 351 */ 352#ifdef PNOZZ_USE_LATCH 353 if (fb->fb_pixels == NULL) { 354 if (sbus_bus_map(sc->sc_bustag, 355 sa->sa_reg[2].oa_space, 356 sa->sa_reg[2].oa_base, 357 sc->sc_fb_psize, 358 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_LARGE, 359 &sc->sc_fb_memh) != 0) { 360 printf("%s: cannot map framebuffer\n", 361 device_xname(self)); 362 return; 363 } 364 fb->fb_pixels = (char *)sc->sc_fb_memh; 365 } else { 366 sc->sc_fb_memh = (bus_space_handle_t) fb->fb_pixels; 367 } 368#endif 369 sc->sc_width = prom_getpropint(node, "width", 800); 370 sc->sc_height = prom_getpropint(node, "height", 600); 371 sc->sc_depth = prom_getpropint(node, "depth", 8) >> 3; 372 373 sc->sc_stride = prom_getpropint(node, "linebytes", 374 sc->sc_width * sc->sc_depth); 375 376 fb->fb_driver = &p9100fbdriver; 377 fb->fb_device = sc->sc_dev; 378 fb->fb_flags = device_cfdata(sc->sc_dev)->cf_flags & FB_USERMASK; 379#ifdef PNOZZ_EMUL_CG3 380 fb->fb_type.fb_type = FBTYPE_SUN3COLOR; 381#else 382 fb->fb_type.fb_type = FBTYPE_P9100; 383#endif 384 fb->fb_pixels = NULL; 385 386 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 387 388 isconsole = fb_is_console(node); 389#if 0 390 if (!isconsole) { 391 aprint_normal("\n"); 392 aprint_error_dev(self, "fatal error: PROM didn't configure device\n"); 393 return; 394 } 395#endif 396 397 fb->fb_type.fb_depth = 8; 398 sc->sc_depth = 1; 399 sc->sc_depthshift = 0; 400 401 /* check the RAMDAC */ 402 ver = p9100_ramdac_read_ctl(sc, DAC_VERSION); 403 404 p9100_init_engine(sc); 405 p9100_set_depth(sc, 8); 406 407 fb_setsize_obp(fb, fb->fb_type.fb_depth, sc->sc_width, sc->sc_height, 408 node); 409 410#if 0 411 bus_intr_establish(sc->sc_bustag, sa->sa_pri, IPL_BIO, 412 p9100_intr, sc); 413#endif 414 415 fb->fb_type.fb_cmsize = prom_getpropint(node, "cmsize", 256); 416 if ((1 << fb->fb_type.fb_depth) != fb->fb_type.fb_cmsize) 417 printf(", %d entry colormap", fb->fb_type.fb_cmsize); 418 419 /* make sure we are not blanked */ 420 if (isconsole) { 421 p9100_set_video(sc, 1); 422 delay(1000); 423 /* hopefully make my oldish PLL lock */ 424 p9100_set_video(sc, 0); 425 delay(1000000); 426 p9100_set_video(sc, 1); 427 } 428 429 /* register with power management */ 430 sc->sc_video = 1; 431 sc->sc_powerstate = PWR_RESUME; 432 if (!pmf_device_register(self, p9100_suspend, p9100_resume)) { 433 panic("%s: could not register with PMF", 434 device_xname(sc->sc_dev)); 435 } 436 437 if (isconsole) { 438 printf(" (console)\n"); 439 } else 440 printf("\n"); 441 442 wsfont_init(); 443 444#ifdef PNOZZ_DEBUG 445 /* make the glyph cache visible */ 446 sc->sc_height -= 100; 447#endif 448 449 sc->sc_gc.gc_bitblt = p9100_bitblt; 450 sc->sc_gc.gc_blitcookie = sc; 451 sc->sc_gc.gc_rop = ROP_SRC; 452 453 vcons_init(&sc->vd, sc, &p9100_defscreendesc, &p9100_accessops); 454 sc->vd.init_screen = p9100_init_screen; 455 456 vcons_init_screen(&sc->vd, &p9100_console_screen, 1, &defattr); 457 p9100_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 458 459 /* Initialize the default color map. */ 460 rasops_get_cmap(&p9100_console_screen.scr_ri, cmap, 768); 461 462 j = 0; 463 for (i = 0; i < 256; i++) { 464 sc->sc_cmap.cm_map[i][0] = cmap[j]; 465 j++; 466 sc->sc_cmap.cm_map[i][1] = cmap[j]; 467 j++; 468 sc->sc_cmap.cm_map[i][2] = cmap[j]; 469 j++; 470 } 471 p9100loadcmap(sc, 0, 256); 472 473 sc->sc_bg = (defattr >> 16) & 0xff; 474 p9100_clearscreen(sc); 475 476 ri = &p9100_console_screen.scr_ri; 477 478 p9100_defscreendesc.nrows = ri->ri_rows; 479 p9100_defscreendesc.ncols = ri->ri_cols; 480 p9100_defscreendesc.textops = &ri->ri_ops; 481 p9100_defscreendesc.capabilities = ri->ri_caps; 482 483 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 484 (0x200000 / sc->sc_stride) - sc->sc_height - 5, 485 sc->sc_width, 486 ri->ri_font->fontwidth, 487 ri->ri_font->fontheight, 488 defattr); 489 490 if(isconsole) { 491 wsdisplay_cnattach(&p9100_defscreendesc, ri, 0, 0, defattr); 492 vcons_replay_msgbuf(&p9100_console_screen); 493 } 494 495 aa.console = isconsole; 496 aa.scrdata = &p9100_screenlist; 497 aa.accessops = &p9100_accessops; 498 aa.accesscookie = &sc->vd; 499 500 config_found(self, &aa, wsemuldisplaydevprint, CFARGS_NONE); 501 502 fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes; 503 printf("%s: rev %d / %x, %dx%d, depth %d mem %x\n", 504 device_xname(self), 505 (i & 7), ver, fb->fb_type.fb_width, fb->fb_type.fb_height, 506 fb->fb_type.fb_depth, (unsigned int)sc->sc_fb_psize); 507 /* cursor sprite handling */ 508 p9100_init_cursor(sc); 509 510 /* attach the fb */ 511 fb_attach(fb, isconsole); 512 513#if NTCTRL > 0 514 /* register callback for external monitor status change */ 515 if (0) tadpole_register_callback(p9100_set_extvga, sc); 516#endif 517} 518 519int 520p9100open(dev_t dev, int flags, int mode, struct lwp *l) 521{ 522 int unit = minor(dev); 523 524 if (device_lookup(&pnozz_cd, unit) == NULL) 525 return (ENXIO); 526 return (0); 527} 528 529int 530p9100close(dev_t dev, int flags, int mode, struct lwp *l) 531{ 532 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 533 534 p9100_init_engine(sc); 535 p9100_set_depth(sc, 8); 536 p9100loadcmap(sc, 0, 256); 537 p9100_clearscreen(sc); 538 glyphcache_wipe(&sc->sc_gc); 539 vcons_redraw_screen(sc->vd.active); 540 541 return 0; 542} 543 544int 545p9100ioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 546{ 547 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 548 struct fbgattr *fba; 549 int error, v; 550 551 switch (cmd) { 552 553 case FBIOGTYPE: 554 *(struct fbtype *)data = sc->sc_fb.fb_type; 555 break; 556 557 case FBIOGATTR: 558 fba = (struct fbgattr *)data; 559 fba->real_type = sc->sc_fb.fb_type.fb_type; 560 fba->owner = 0; /* XXX ??? */ 561 fba->fbtype = sc->sc_fb.fb_type; 562 fba->sattr.flags = 0; 563 fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type; 564 fba->sattr.dev_specific[0] = -1; 565 fba->emu_types[0] = sc->sc_fb.fb_type.fb_type; 566 fba->emu_types[1] = -1; 567 break; 568 569 case FBIOGETCMAP: 570#define p ((struct fbcmap *)data) 571 return (bt_getcmap(p, &sc->sc_cmap, 256, 1)); 572 573 case FBIOPUTCMAP: 574 /* copy to software map */ 575 error = bt_putcmap(p, &sc->sc_cmap, 256, 1); 576 if (error) 577 return (error); 578 /* now blast them into the chip */ 579 /* XXX should use retrace interrupt */ 580 p9100loadcmap(sc, p->index, p->count); 581#undef p 582 break; 583 584 case FBIOGVIDEO: 585 *(int *)data = p9100_get_video(sc); 586 break; 587 588 case FBIOSVIDEO: 589 p9100_set_video(sc, *(int *)data); 590 break; 591 592/* these are for both FBIOSCURSOR and FBIOGCURSOR */ 593#define p ((struct fbcursor *)data) 594#define pc (&sc->sc_cursor) 595 596 case FBIOGCURSOR: 597 p->set = FB_CUR_SETALL; /* close enough, anyway */ 598 p->enable = pc->pc_enable; 599 p->pos = pc->pc_pos; 600 p->hot = pc->pc_hot; 601 p->size = pc->pc_size; 602 603 if (p->image != NULL) { 604 error = copyout(pc->pc_bits, p->image, 0x200); 605 if (error) 606 return error; 607 error = copyout(&pc->pc_bits[0x80], p->mask, 0x200); 608 if (error) 609 return error; 610 } 611 612 p->cmap.index = 0; 613 p->cmap.count = 3; 614 if (p->cmap.red != NULL) { 615 copyout(pc->red, p->cmap.red, 3); 616 copyout(pc->green, p->cmap.green, 3); 617 copyout(pc->blue, p->cmap.blue, 3); 618 } 619 break; 620 621 case FBIOSCURSOR: 622 { 623 int count; 624 uint32_t image[0x80], mask[0x80]; 625 uint8_t red[3], green[3], blue[3]; 626 627 v = p->set; 628 if (v & FB_CUR_SETCMAP) { 629 error = copyin(p->cmap.red, red, 3); 630 error |= copyin(p->cmap.green, green, 3); 631 error |= copyin(p->cmap.blue, blue, 3); 632 if (error) 633 return error; 634 } 635 if (v & FB_CUR_SETSHAPE) { 636 if (p->size.x > 64 || p->size.y > 64) 637 return EINVAL; 638 memset(&mask, 0, 0x200); 639 memset(&image, 0, 0x200); 640 count = p->size.y * 8; 641 error = copyin(p->image, image, count); 642 if (error) 643 return error; 644 error = copyin(p->mask, mask, count); 645 if (error) 646 return error; 647 } 648 649 /* parameters are OK; do it */ 650 if (v & (FB_CUR_SETCUR | FB_CUR_SETPOS | FB_CUR_SETHOT)) { 651 if (v & FB_CUR_SETCUR) 652 pc->pc_enable = p->enable; 653 if (v & FB_CUR_SETPOS) 654 pc->pc_pos = p->pos; 655 if (v & FB_CUR_SETHOT) 656 pc->pc_hot = p->hot; 657 p9100_set_fbcursor(sc); 658 } 659 660 if (v & FB_CUR_SETCMAP) { 661 memcpy(pc->red, red, 3); 662 memcpy(pc->green, green, 3); 663 memcpy(pc->blue, blue, 3); 664 p9100_setcursorcmap(sc); 665 } 666 667 if (v & FB_CUR_SETSHAPE) { 668 memcpy(pc->pc_bits, image, 0x200); 669 memcpy(&pc->pc_bits[0x80], mask, 0x200); 670 p9100_loadcursor(sc); 671 } 672 } 673 break; 674 675#undef p 676#undef cc 677 678 case FBIOGCURPOS: 679 *(struct fbcurpos *)data = sc->sc_cursor.pc_pos; 680 break; 681 682 case FBIOSCURPOS: 683 sc->sc_cursor.pc_pos = *(struct fbcurpos *)data; 684 p9100_set_fbcursor(sc); 685 break; 686 687 case FBIOGCURMAX: 688 /* max cursor size is 64x64 */ 689 ((struct fbcurpos *)data)->x = 64; 690 ((struct fbcurpos *)data)->y = 64; 691 break; 692 693 default: 694 return (ENOTTY); 695 } 696 return (0); 697} 698 699static uint32_t 700p9100_ctl_read_4(struct p9100_softc *sc, bus_size_t off) 701{ 702 703 PNOZZ_LATCH(sc, off); 704 return bus_space_read_4(sc->sc_bustag, sc->sc_ctl_memh, off); 705} 706 707static void 708p9100_ctl_write_4(struct p9100_softc *sc, bus_size_t off, uint32_t v) 709{ 710 711 PNOZZ_LATCH(sc, off); 712 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, v); 713} 714 715/* initialize the drawing engine */ 716static void 717p9100_init_engine(struct p9100_softc *sc) 718{ 719 /* reset clipping rectangles */ 720 uint32_t rmax = ((sc->sc_width & 0x3fff) << 16) | 721 (sc->sc_height & 0x3fff); 722 723 sc->sc_last_offset = 0xffffffff; 724 725 p9100_ctl_write_4(sc, WINDOW_OFFSET, 0); 726 p9100_ctl_write_4(sc, WINDOW_MIN, 0); 727 p9100_ctl_write_4(sc, WINDOW_MAX, rmax); 728 p9100_ctl_write_4(sc, BYTE_CLIP_MIN, 0); 729 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 730 p9100_ctl_write_4(sc, DRAW_MODE, 0); 731 p9100_ctl_write_4(sc, PLANE_MASK, 0xffffffff); 732 p9100_ctl_write_4(sc, PATTERN0, 0xffffffff); 733 p9100_ctl_write_4(sc, PATTERN1, 0xffffffff); 734 p9100_ctl_write_4(sc, PATTERN2, 0xffffffff); 735 p9100_ctl_write_4(sc, PATTERN3, 0xffffffff); 736 737} 738 739/* wait until the engine is idle */ 740static void 741p9100_sync(struct p9100_softc *sc) 742{ 743 while((p9100_ctl_read_4(sc, ENGINE_STATUS) & 744 (ENGINE_BUSY | BLITTER_BUSY)) != 0); 745} 746 747static void 748p9100_set_color_reg(struct p9100_softc *sc, int reg, int32_t col) 749{ 750 uint32_t out; 751 752 switch(sc->sc_depth) 753 { 754 case 1: /* 8 bit */ 755 out = (col << 8) | col; 756 out |= out << 16; 757 break; 758 case 2: /* 16 bit */ 759 out = col | (col << 16); 760 break; 761 default: 762 out = col; 763 } 764 p9100_ctl_write_4(sc, reg, out); 765} 766 767/* screen-to-screen blit */ 768static void 769p9100_bitblt(void *cookie, int xs, int ys, int xd, int yd, int wi, 770 int he, int rop) 771{ 772 struct p9100_softc *sc = cookie; 773 uint32_t src, dst, srcw, dstw; 774 775 sc->sc_last_offset = 0xffffffff; 776 777 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 778 dst = ((xd & 0x3fff) << 16) | (yd & 0x3fff); 779 srcw = (((xs + wi - 1) & 0x3fff) << 16) | ((ys + he - 1) & 0x3fff); 780 dstw = (((xd + wi - 1) & 0x3fff) << 16) | ((yd + he - 1) & 0x3fff); 781 782 p9100_sync(sc); 783 784 p9100_ctl_write_4(sc, RASTER_OP, rop); 785 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 786 787 p9100_ctl_write_4(sc, ABS_XY0, src << sc->sc_depthshift); 788 p9100_ctl_write_4(sc, ABS_XY1, srcw << sc->sc_depthshift); 789 p9100_ctl_write_4(sc, ABS_XY2, dst << sc->sc_depthshift); 790 p9100_ctl_write_4(sc, ABS_XY3, dstw << sc->sc_depthshift); 791 792 (void)p9100_ctl_read_4(sc, COMMAND_BLIT); 793} 794 795/* solid rectangle fill */ 796static void 797p9100_rectfill(void *cookie, int xs, int ys, int wi, int he, uint32_t col) 798{ 799 struct p9100_softc *sc = cookie; 800 uint32_t src, srcw; 801 802 sc->sc_last_offset = 0xffffffff; 803 804 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 805 srcw = (((xs + wi) & 0x3fff) << 16) | ((ys + he) & 0x3fff); 806 p9100_sync(sc); 807 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 808 p9100_set_color_reg(sc, FOREGROUND_COLOR, col); 809 p9100_set_color_reg(sc, BACKGROUND_COLOR, col); 810 p9100_ctl_write_4(sc, RASTER_OP, ROP_PAT); 811 p9100_ctl_write_4(sc, COORD_INDEX, 0); 812 p9100_ctl_write_4(sc, RECT_RTW_XY, src); 813 p9100_ctl_write_4(sc, RECT_RTW_XY, srcw); 814 (void)p9100_ctl_read_4(sc, COMMAND_QUAD); 815} 816 817/* setup for mono->colour expansion */ 818static void 819p9100_setup_mono(struct p9100_softc *sc, int x, int y, int wi, int he, 820 uint32_t fg, uint32_t bg) 821{ 822 823 sc->sc_last_offset = 0xffffffff; 824 825 p9100_sync(sc); 826 /* 827 * this doesn't make any sense to me either, but for some reason the 828 * chip applies the foreground colour to 0 pixels 829 */ 830 831 p9100_set_color_reg(sc,FOREGROUND_COLOR,bg); 832 p9100_set_color_reg(sc,BACKGROUND_COLOR,fg); 833 834 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 835 p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC); 836 p9100_ctl_write_4(sc, ABS_X0, x); 837 p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL)); 838 p9100_ctl_write_4(sc, ABS_X2, (x + wi)); 839 p9100_ctl_write_4(sc, ABS_Y3, he); 840 /* now feed the data into the chip */ 841 sc->sc_mono_width = wi; 842} 843 844/* write monochrome data to the screen through the blitter */ 845static void 846p9100_feed_line(struct p9100_softc *sc, int count, uint8_t *data) 847{ 848 int i; 849 uint32_t latch = 0, bork; 850 int shift = 24; 851 int to_go = sc->sc_mono_width; 852 853 PNOZZ_LATCH(sc, PIXEL_1); 854 855 for (i = 0; i < count; i++) { 856 bork = data[i]; 857 latch |= (bork << shift); 858 if (shift == 0) { 859 /* check how many bits are significant */ 860 if (to_go > 31) { 861 bus_space_write_4(sc->sc_bustag, 862 sc->sc_ctl_memh, 863 (PIXEL_1 + (31 << 2)), latch); 864 to_go -= 32; 865 } else 866 { 867 bus_space_write_4(sc->sc_bustag, 868 sc->sc_ctl_memh, 869 (PIXEL_1 + ((to_go - 1) << 2)), latch); 870 to_go = 0; 871 } 872 latch = 0; 873 shift = 24; 874 } else 875 shift -= 8; 876 } 877 if (shift != 24) 878 p9100_ctl_write_4(sc, (PIXEL_1 + ((to_go - 1) << 2)), latch); 879} 880 881static void 882p9100_clearscreen(struct p9100_softc *sc) 883{ 884 885 p9100_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, sc->sc_bg); 886} 887 888static uint8_t 889p9100_ramdac_read(struct p9100_softc *sc, bus_size_t off) 890{ 891 892 (void)p9100_ctl_read_4(sc, PWRUP_CNFG); 893 return ((bus_space_read_4(sc->sc_bustag, 894 sc->sc_ctl_memh, off) >> 16) & 0xff); 895} 896 897static void 898p9100_ramdac_write(struct p9100_softc *sc, bus_size_t off, uint8_t v) 899{ 900 901 (void)p9100_ctl_read_4(sc, PWRUP_CNFG); 902 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, 903 ((uint32_t)v) << 16); 904} 905 906static uint8_t 907p9100_ramdac_read_ctl(struct p9100_softc *sc, int off) 908{ 909 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 910 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 911 return p9100_ramdac_read(sc, DAC_INDX_DATA); 912} 913 914static void 915p9100_ramdac_write_ctl(struct p9100_softc *sc, int off, uint8_t val) 916{ 917 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 918 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 919 p9100_ramdac_write(sc, DAC_INDX_DATA, val); 920} 921 922/* 923 * Undo the effect of an FBIOSVIDEO that turns the video off. 924 */ 925static void 926p9100unblank(device_t dev) 927{ 928 struct p9100_softc *sc = device_private(dev); 929 930 p9100_set_video(sc, 1); 931 932 /* 933 * Check if we're in terminal mode. If not force the console screen 934 * to front so we can see ddb, panic messages and so on 935 */ 936 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) { 937 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 938 if (sc->vd.active != &p9100_console_screen) { 939 SCREEN_INVISIBLE(sc->vd.active); 940 sc->vd.active = &p9100_console_screen; 941 SCREEN_VISIBLE(&p9100_console_screen); 942 } 943 p9100_init_engine(sc); 944 p9100_set_depth(sc, 8); 945 vcons_redraw_screen(&p9100_console_screen); 946 } 947} 948 949static void 950p9100_set_video(struct p9100_softc *sc, int enable) 951{ 952 uint32_t v = p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1); 953 954 if (enable) 955 v |= VIDEO_ENABLED; 956 else 957 v &= ~VIDEO_ENABLED; 958 p9100_ctl_write_4(sc, SCRN_RPNT_CTL_1, v); 959#if NTCTRL > 0 960 /* Turn On/Off the TFT if we know how. 961 */ 962 tadpole_set_video(enable); 963#endif 964} 965 966static int 967p9100_get_video(struct p9100_softc *sc) 968{ 969 return (p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1) & VIDEO_ENABLED) != 0; 970} 971 972static bool 973p9100_suspend(device_t dev, const pmf_qual_t *qual) 974{ 975 struct p9100_softc *sc = device_private(dev); 976 977 if (sc->sc_powerstate == PWR_SUSPEND) 978 return TRUE; 979 980 sc->sc_video = p9100_get_video(sc); 981 sc->sc_dac_power = p9100_ramdac_read_ctl(sc, DAC_POWER_MGT); 982 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 983 DAC_POWER_SCLK_DISABLE | 984 DAC_POWER_DDOT_DISABLE | 985 DAC_POWER_SYNC_DISABLE | 986 DAC_POWER_ICLK_DISABLE | 987 DAC_POWER_IPWR_DISABLE); 988 p9100_set_video(sc, 0); 989 sc->sc_powerstate = PWR_SUSPEND; 990 return TRUE; 991} 992 993static bool 994p9100_resume(device_t dev, const pmf_qual_t *qual) 995{ 996 struct p9100_softc *sc = device_private(dev); 997 998 if (sc->sc_powerstate == PWR_RESUME) 999 return TRUE; 1000 1001 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, sc->sc_dac_power); 1002 p9100_set_video(sc, sc->sc_video); 1003 1004 sc->sc_powerstate = PWR_RESUME; 1005 return TRUE; 1006} 1007 1008/* 1009 * Load a subset of the current (new) colormap into the IBM RAMDAC. 1010 */ 1011static void 1012p9100loadcmap(struct p9100_softc *sc, int start, int ncolors) 1013{ 1014 int i; 1015 sc->sc_last_offset = 0xffffffff; 1016 1017 p9100_ramdac_write(sc, DAC_CMAP_WRIDX, start); 1018 1019 for (i=0;i<ncolors;i++) { 1020 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1021 sc->sc_cmap.cm_map[i + start][0]); 1022 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1023 sc->sc_cmap.cm_map[i + start][1]); 1024 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1025 sc->sc_cmap.cm_map[i + start][2]); 1026 } 1027} 1028 1029/* 1030 * Return the address that would map the given device at the given 1031 * offset, allowing for the given protection, or return -1 for error. 1032 */ 1033static paddr_t 1034p9100mmap(dev_t dev, off_t off, int prot) 1035{ 1036 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 1037 1038 if (off & PGOFSET) 1039 panic("p9100mmap"); 1040 if (off < 0) 1041 return (-1); 1042 1043#ifdef PNOZZ_EMUL_CG3 1044#define CG3_MMAP_OFFSET 0x04000000 1045 /* Make Xsun think we are a CG3 (SUN3COLOR) 1046 */ 1047 if (off >= CG3_MMAP_OFFSET && off < CG3_MMAP_OFFSET + sc->sc_fb_psize) { 1048 off -= CG3_MMAP_OFFSET; 1049 return (bus_space_mmap(sc->sc_bustag, 1050 sc->sc_fb_paddr, 1051 off, 1052 prot, 1053 BUS_SPACE_MAP_LINEAR)); 1054 } 1055#endif 1056 1057 if (off >= sc->sc_fb_psize + sc->sc_ctl_psize/* + sc->sc_cmd_psize*/) 1058 return (-1); 1059 1060 if (off < sc->sc_fb_psize) { 1061 return (bus_space_mmap(sc->sc_bustag, 1062 sc->sc_fb_paddr, 1063 off, 1064 prot, 1065 BUS_SPACE_MAP_LINEAR)); 1066 } 1067 1068 off -= sc->sc_fb_psize; 1069 if (off < sc->sc_ctl_psize) { 1070 return (bus_space_mmap(sc->sc_bustag, 1071 sc->sc_ctl_paddr, 1072 off, 1073 prot, 1074 BUS_SPACE_MAP_LINEAR)); 1075 } 1076 1077 return EINVAL; 1078} 1079 1080/* wscons stuff */ 1081 1082static void 1083p9100_cursor(void *cookie, int on, int row, int col) 1084{ 1085 struct rasops_info *ri = cookie; 1086 struct vcons_screen *scr = ri->ri_hw; 1087 struct p9100_softc *sc = scr->scr_cookie; 1088 int x, y, wi,he; 1089 1090 wi = ri->ri_font->fontwidth; 1091 he = ri->ri_font->fontheight; 1092 1093 if (ri->ri_flg & RI_CURSOR) { 1094 x = ri->ri_ccol * wi + ri->ri_xorigin; 1095 y = ri->ri_crow * he + ri->ri_yorigin; 1096 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1097 ri->ri_flg &= ~RI_CURSOR; 1098 } 1099 1100 ri->ri_crow = row; 1101 ri->ri_ccol = col; 1102 1103 if (on) 1104 { 1105 x = ri->ri_ccol * wi + ri->ri_xorigin; 1106 y = ri->ri_crow * he + ri->ri_yorigin; 1107 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1108 ri->ri_flg |= RI_CURSOR; 1109 } 1110} 1111 1112#if 0 1113static int 1114p9100_mapchar(void *cookie, int uni, u_int *index) 1115{ 1116 return 0; 1117} 1118#endif 1119 1120static void 1121p9100_putchar(void *cookie, int row, int col, u_int c, long attr) 1122{ 1123 struct rasops_info *ri = cookie; 1124 struct wsdisplay_font *font = PICK_FONT(ri, c); 1125 struct vcons_screen *scr = ri->ri_hw; 1126 struct p9100_softc *sc = scr->scr_cookie; 1127 1128 int fg, bg, i; 1129 uint8_t *data; 1130 int x, y, wi, he; 1131 1132 wi = font->fontwidth; 1133 he = font->fontheight; 1134 1135 if (!CHAR_IN_FONT(c, font)) 1136 return; 1137 1138 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xff]; 1139 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xff]; 1140 x = ri->ri_xorigin + col * wi; 1141 y = ri->ri_yorigin + row * he; 1142 1143 if (c == 0x20) { 1144 p9100_rectfill(sc, x, y, wi, he, bg); 1145 } else { 1146 data = WSFONT_GLYPH(c, font); 1147 1148 p9100_setup_mono(sc, x, y, wi, 1, fg, bg); 1149 for (i = 0; i < he; i++) { 1150 p9100_feed_line(sc, font->stride, 1151 data); 1152 data += font->stride; 1153 } 1154 } 1155} 1156 1157static void 1158p9100_putchar_aa(void *cookie, int row, int col, u_int c, long attr) 1159{ 1160 struct rasops_info *ri = cookie; 1161 struct wsdisplay_font *font = PICK_FONT(ri, c); 1162 struct vcons_screen *scr = ri->ri_hw; 1163 struct p9100_softc *sc = scr->scr_cookie; 1164 uint32_t bg, latch = 0, bg8, fg8, pixel; 1165 int i, j, x, y, wi, he, r, g, b, aval, rwi; 1166 int r1, g1, b1, r0, g0, b0, fgo, bgo; 1167 uint8_t *data8; 1168 int rv; 1169 1170 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1171 return; 1172 1173 if (!CHAR_IN_FONT(c, font)) 1174 return; 1175 1176 wi = font->fontwidth; 1177 rwi = (wi + 3) & ~3; 1178 he = font->fontheight; 1179 1180 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1181 x = ri->ri_xorigin + col * wi; 1182 y = ri->ri_yorigin + row * he; 1183 1184 if (c == 0x20) { 1185 p9100_rectfill(sc, x, y, wi, he, bg); 1186 return; 1187 } 1188 1189 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1190 if (rv == GC_OK) 1191 return; 1192 1193 data8 = WSFONT_GLYPH(c, font); 1194 1195 p9100_sync(sc); 1196 1197 p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC); 1198 p9100_ctl_write_4(sc, ABS_X0, x); 1199 p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL)); 1200 p9100_ctl_write_4(sc, ABS_X2, (x + rwi)); 1201 p9100_ctl_write_4(sc, ABS_Y3, 1); 1202 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, ((x + wi - 1) << 16) | 0x3fff); 1203 1204 /* 1205 * we need the RGB colours here, so get offsets into rasops_cmap 1206 */ 1207 fgo = ((attr >> 24) & 0xf) * 3; 1208 bgo = ((attr >> 16) & 0xf) * 3; 1209 1210 r0 = rasops_cmap[bgo]; 1211 r1 = rasops_cmap[fgo]; 1212 g0 = rasops_cmap[bgo + 1]; 1213 g1 = rasops_cmap[fgo + 1]; 1214 b0 = rasops_cmap[bgo + 2]; 1215 b1 = rasops_cmap[fgo + 2]; 1216#define R3G3B2(r, g, b) ((r & 0xe0) | ((g >> 3) & 0x1c) | (b >> 6)) 1217 bg8 = R3G3B2(r0, g0, b0); 1218 fg8 = R3G3B2(r1, g1, b1); 1219 1220 //r128fb_wait(sc, 16); 1221 1222 for (i = 0; i < he; i++) { 1223 for (j = 0; j < wi; j++) { 1224 aval = *data8; 1225 if (aval == 0) { 1226 pixel = bg8; 1227 } else if (aval == 255) { 1228 pixel = fg8; 1229 } else { 1230 r = aval * r1 + (255 - aval) * r0; 1231 g = aval * g1 + (255 - aval) * g0; 1232 b = aval * b1 + (255 - aval) * b0; 1233 pixel = ((r & 0xe000) >> 8) | 1234 ((g & 0xe000) >> 11) | 1235 ((b & 0xc000) >> 14); 1236 } 1237 latch = (latch << 8) | pixel; 1238 /* write in 32bit chunks */ 1239 if ((j & 3) == 3) { 1240 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, 1241 COMMAND_PIXEL8, latch); 1242 latch = 0; 1243 } 1244 data8++; 1245 } 1246 /* if we have pixels left in latch write them out */ 1247 if ((j & 3) != 0) { 1248 latch = latch << ((4 - (j & 3)) << 3); 1249 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, 1250 COMMAND_PIXEL8, latch); 1251 } 1252 } 1253 if (rv == GC_ADD) { 1254 glyphcache_add(&sc->sc_gc, c, x, y); 1255 } 1256} 1257 1258/* 1259 * wsdisplay_accessops 1260 */ 1261 1262int 1263p9100_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 1264 struct lwp *l) 1265{ 1266 struct vcons_data *vd = v; 1267 struct p9100_softc *sc = vd->cookie; 1268 struct wsdisplay_fbinfo *wdf; 1269 struct vcons_screen *ms = vd->active; 1270 1271 switch (cmd) { 1272 case WSDISPLAYIO_GTYPE: 1273 *(u_int *)data = WSDISPLAY_TYPE_SB_P9100; 1274 return 0; 1275 1276 case FBIOGVIDEO: 1277 case WSDISPLAYIO_GVIDEO: 1278 *(int *)data = p9100_get_video(sc); 1279 return 0; 1280 1281 case WSDISPLAYIO_SVIDEO: 1282 case FBIOSVIDEO: 1283 p9100_set_video(sc, *(int *)data); 1284 return 0; 1285 1286 case WSDISPLAYIO_GINFO: 1287 wdf = (void *)data; 1288 wdf->height = ms->scr_ri.ri_height; 1289 wdf->width = ms->scr_ri.ri_width; 1290 wdf->depth = ms->scr_ri.ri_depth; 1291 wdf->cmsize = 256; 1292 return 0; 1293 1294 case WSDISPLAYIO_GETCMAP: 1295 return p9100_getcmap(sc, (struct wsdisplay_cmap *)data); 1296 1297 case WSDISPLAYIO_PUTCMAP: 1298 return p9100_putcmap(sc, (struct wsdisplay_cmap *)data); 1299 1300 case WSDISPLAYIO_SMODE: 1301 { 1302 int new_mode = *(int*)data; 1303 if (new_mode != sc->sc_mode) 1304 { 1305 sc->sc_mode = new_mode; 1306 if (new_mode == WSDISPLAYIO_MODE_EMUL) 1307 { 1308 p9100_init_engine(sc); 1309 p9100_set_depth(sc, 8); 1310 p9100loadcmap(sc, 0, 256); 1311 p9100_clearscreen(sc); 1312 glyphcache_wipe(&sc->sc_gc); 1313 vcons_redraw_screen(ms); 1314 } 1315 } 1316 } 1317 } 1318 return EPASSTHROUGH; 1319} 1320 1321static paddr_t 1322p9100_mmap(void *v, void *vs, off_t offset, int prot) 1323{ 1324 struct vcons_data *vd = v; 1325 struct p9100_softc *sc = vd->cookie; 1326 paddr_t pa; 1327 1328 /* 'regular' framebuffer mmap()ing */ 1329 if (offset < sc->sc_fb_psize) { 1330 pa = bus_space_mmap(sc->sc_bustag, sc->sc_fb_paddr + offset, 0, 1331 prot, BUS_SPACE_MAP_LINEAR); 1332 return pa; 1333 } 1334 1335 if ((offset >= sc->sc_fb_paddr) && (offset < (sc->sc_fb_paddr + 1336 sc->sc_fb_psize))) { 1337 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1338 BUS_SPACE_MAP_LINEAR); 1339 return pa; 1340 } 1341 1342 if ((offset >= sc->sc_ctl_paddr) && (offset < (sc->sc_ctl_paddr + 1343 sc->sc_ctl_psize))) { 1344 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1345 BUS_SPACE_MAP_LINEAR); 1346 return pa; 1347 } 1348 1349 return -1; 1350} 1351 1352static void 1353p9100_init_screen(void *cookie, struct vcons_screen *scr, 1354 int existing, long *defattr) 1355{ 1356 struct p9100_softc *sc = cookie; 1357 struct rasops_info *ri = &scr->scr_ri; 1358 1359 ri->ri_depth = sc->sc_depth << 3; 1360 ri->ri_width = sc->sc_width; 1361 ri->ri_height = sc->sc_height; 1362 ri->ri_stride = sc->sc_stride; 1363 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 1364 if (ri->ri_depth == 8) 1365 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA; 1366 1367#ifdef PNOZZ_USE_LATCH 1368 ri->ri_bits = bus_space_vaddr(sc->sc_bustag, sc->sc_fb_memh); 1369 DPRINTF("addr: %08lx\n",(ulong)ri->ri_bits); 1370#endif 1371 1372 rasops_init(ri, 0, 0); 1373 ri->ri_caps = WSSCREEN_WSCOLORS; 1374 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 1375 sc->sc_width / ri->ri_font->fontwidth); 1376 1377 /* enable acceleration */ 1378 ri->ri_ops.cursor = p9100_cursor; 1379 ri->ri_ops.copyrows = p9100_copyrows; 1380 ri->ri_ops.eraserows = p9100_eraserows; 1381 ri->ri_ops.copycols = p9100_copycols; 1382 ri->ri_ops.erasecols = p9100_erasecols; 1383 if (FONT_IS_ALPHA(ri->ri_font)) { 1384 ri->ri_ops.putchar = p9100_putchar_aa; 1385 } else 1386 ri->ri_ops.putchar = p9100_putchar; 1387} 1388 1389static int 1390p9100_putcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1391{ 1392 u_int index = cm->index; 1393 u_int count = cm->count; 1394 int i, error; 1395 u_char rbuf[256], gbuf[256], bbuf[256]; 1396 u_char *r, *g, *b; 1397 1398 if (cm->index >= 256 || cm->count > 256 || 1399 (cm->index + cm->count) > 256) 1400 return EINVAL; 1401 error = copyin(cm->red, &rbuf[index], count); 1402 if (error) 1403 return error; 1404 error = copyin(cm->green, &gbuf[index], count); 1405 if (error) 1406 return error; 1407 error = copyin(cm->blue, &bbuf[index], count); 1408 if (error) 1409 return error; 1410 1411 r = &rbuf[index]; 1412 g = &gbuf[index]; 1413 b = &bbuf[index]; 1414 1415 for (i = 0; i < count; i++) { 1416 sc->sc_cmap.cm_map[index][0] = *r; 1417 sc->sc_cmap.cm_map[index][1] = *g; 1418 sc->sc_cmap.cm_map[index][2] = *b; 1419 index++; 1420 r++, g++, b++; 1421 } 1422 p9100loadcmap(sc, 0, 256); 1423 return 0; 1424} 1425 1426static int 1427p9100_getcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1428{ 1429 u_int index = cm->index; 1430 u_int count = cm->count; 1431 int error, i; 1432 uint8_t red[256], green[256], blue[256]; 1433 1434 if (index >= 255 || count > 256 || index + count > 256) 1435 return EINVAL; 1436 1437 i = index; 1438 while (i < (index + count)) { 1439 red[i] = sc->sc_cmap.cm_map[i][0]; 1440 green[i] = sc->sc_cmap.cm_map[i][1]; 1441 blue[i] = sc->sc_cmap.cm_map[i][2]; 1442 i++; 1443 } 1444 error = copyout(&red[index], cm->red, count); 1445 if (error) 1446 return error; 1447 error = copyout(&green[index], cm->green, count); 1448 if (error) 1449 return error; 1450 error = copyout(&blue[index], cm->blue, count); 1451 if (error) 1452 return error; 1453 1454 return 0; 1455} 1456 1457static void 1458p9100_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1459{ 1460 struct rasops_info *ri = cookie; 1461 struct vcons_screen *scr = ri->ri_hw; 1462 int32_t xs, xd, y, width, height; 1463 1464 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1465 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1466 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1467 width = ri->ri_font->fontwidth * ncols; 1468 height = ri->ri_font->fontheight; 1469 p9100_bitblt(scr->scr_cookie, xs, y, xd, y, width, height, ROP_SRC); 1470} 1471 1472static void 1473p9100_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1474{ 1475 struct rasops_info *ri = cookie; 1476 struct vcons_screen *scr = ri->ri_hw; 1477 int32_t x, y, width, height, bg; 1478 1479 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1480 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1481 width = ri->ri_font->fontwidth * ncols; 1482 height = ri->ri_font->fontheight; 1483 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1484 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1485} 1486 1487static void 1488p9100_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1489{ 1490 struct rasops_info *ri = cookie; 1491 struct vcons_screen *scr = ri->ri_hw; 1492 int32_t x, ys, yd, width, height; 1493 1494 x = ri->ri_xorigin; 1495 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1496 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1497 width = ri->ri_emuwidth; 1498 height = ri->ri_font->fontheight * nrows; 1499 p9100_bitblt(scr->scr_cookie, x, ys, x, yd, width, height, ROP_SRC); 1500} 1501 1502static void 1503p9100_eraserows(void *cookie, int row, int nrows, long fillattr) 1504{ 1505 struct rasops_info *ri = cookie; 1506 struct vcons_screen *scr = ri->ri_hw; 1507 int32_t x, y, width, height, bg; 1508 1509 if ((row == 0) && (nrows == ri->ri_rows)) { 1510 x = y = 0; 1511 width = ri->ri_width; 1512 height = ri->ri_height; 1513 } else { 1514 x = ri->ri_xorigin; 1515 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1516 width = ri->ri_emuwidth; 1517 height = ri->ri_font->fontheight * nrows; 1518 } 1519 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1520 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1521} 1522 1523#if 0 1524static int 1525p9100_load_font(void *v, void *cookie, struct wsdisplay_font *data) 1526{ 1527 1528 return 0; 1529} 1530#endif 1531 1532#if 0 1533static int 1534p9100_intr(void *arg) 1535{ 1536 /*p9100_softc *sc=arg;*/ 1537 DPRINTF("."); 1538 return 1; 1539} 1540#endif 1541 1542static void 1543p9100_init_cursor(struct p9100_softc *sc) 1544{ 1545 1546 memset(&sc->sc_cursor, 0, sizeof(struct pnozz_cursor)); 1547 sc->sc_cursor.pc_size.x = 64; 1548 sc->sc_cursor.pc_size.y = 64; 1549 1550} 1551 1552static void 1553p9100_set_fbcursor(struct p9100_softc *sc) 1554{ 1555#ifdef PNOZZ_PARANOID 1556 int s; 1557 1558 s = splhigh(); /* just in case... */ 1559#endif 1560 sc->sc_last_offset = 0xffffffff; 1561 1562 /* set position and hotspot */ 1563 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1564 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1565 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_CTL); 1566 if (sc->sc_cursor.pc_enable) { 1567 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_X11 | 1568 DAC_CURSOR_64); 1569 } else 1570 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_OFF); 1571 /* next two registers - x low, high, y low, high */ 1572 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.x & 0xff); 1573 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.x >> 8) & 1574 0xff); 1575 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.y & 0xff); 1576 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.y >> 8) & 1577 0xff); 1578 /* hotspot */ 1579 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.x & 0xff); 1580 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.y & 0xff); 1581 1582#ifdef PNOZZ_PARANOID 1583 splx(s); 1584#endif 1585 1586} 1587 1588static void 1589p9100_setcursorcmap(struct p9100_softc *sc) 1590{ 1591 int i; 1592 1593#ifdef PNOZZ_PARANOID 1594 int s; 1595 s = splhigh(); /* just in case... */ 1596#endif 1597 sc->sc_last_offset = 0xffffffff; 1598 1599 /* set cursor colours */ 1600 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1601 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1602 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_COL_1); 1603 1604 for (i = 0; i < 3; i++) { 1605 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.red[i]); 1606 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.green[i]); 1607 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.blue[i]); 1608 } 1609 1610#ifdef PNOZZ_PARANOID 1611 splx(s); 1612#endif 1613} 1614 1615static void 1616p9100_loadcursor(struct p9100_softc *sc) 1617{ 1618 uint32_t *image, *mask; 1619 uint32_t bit, bbit, im, ma; 1620 int i, j, k; 1621 uint8_t latch1, latch2; 1622 1623#ifdef PNOZZ_PARANOID 1624 int s; 1625 s = splhigh(); /* just in case... */ 1626#endif 1627 sc->sc_last_offset = 0xffffffff; 1628 1629 /* set cursor shape */ 1630 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1631 p9100_ramdac_write(sc, DAC_INDX_HI, 1); 1632 p9100_ramdac_write(sc, DAC_INDX_LO, 0); 1633 1634 image = sc->sc_cursor.pc_bits; 1635 mask = &sc->sc_cursor.pc_bits[0x80]; 1636 1637 for (i = 0; i < 0x80; i++) { 1638 bit = 0x80000000; 1639 im = image[i]; 1640 ma = mask[i]; 1641 for (k = 0; k < 4; k++) { 1642 bbit = 0x1; 1643 latch1 = 0; 1644 for (j = 0; j < 4; j++) { 1645 if (im & bit) 1646 latch1 |= bbit; 1647 bbit <<= 1; 1648 if (ma & bit) 1649 latch1 |= bbit; 1650 bbit <<= 1; 1651 bit >>= 1; 1652 } 1653 bbit = 0x1; 1654 latch2 = 0; 1655 for (j = 0; j < 4; j++) { 1656 if (im & bit) 1657 latch2 |= bbit; 1658 bbit <<= 1; 1659 if (ma & bit) 1660 latch2 |= bbit; 1661 bbit <<= 1; 1662 bit >>= 1; 1663 } 1664 p9100_ramdac_write(sc, DAC_INDX_DATA, latch1); 1665 p9100_ramdac_write(sc, DAC_INDX_DATA, latch2); 1666 } 1667 } 1668#ifdef PNOZZ_DEBUG_CURSOR 1669 printf("image:\n"); 1670 for (i=0;i<0x80;i+=2) 1671 printf("%08x %08x\n", image[i], image[i+1]); 1672 printf("mask:\n"); 1673 for (i=0;i<0x80;i+=2) 1674 printf("%08x %08x\n", mask[i], mask[i+1]); 1675#endif 1676#ifdef PNOZZ_PARANOID 1677 splx(s); 1678#endif 1679} 1680 1681#if NTCTRL > 0 1682static void 1683p9100_set_extvga(void *cookie, int status) 1684{ 1685 struct p9100_softc *sc = cookie; 1686#ifdef PNOZZ_PARANOID 1687 int s; 1688 1689 s = splhigh(); 1690#endif 1691 1692#ifdef PNOZZ_DEBUG 1693 printf("%s: external VGA %s\n", device_xname(sc->sc_dev), 1694 status ? "on" : "off"); 1695#endif 1696 1697 sc->sc_last_offset = 0xffffffff; 1698 1699 if (status) { 1700 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1701 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) & 1702 ~DAC_POWER_IPWR_DISABLE); 1703 } else { 1704 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1705 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) | 1706 DAC_POWER_IPWR_DISABLE); 1707 } 1708#ifdef PNOZZ_PARANOID 1709 splx(s); 1710#endif 1711} 1712#endif /* NTCTRL > 0 */ 1713 1714static int 1715upper_bit(uint32_t b) 1716{ 1717 uint32_t mask=0x80000000; 1718 int cnt = 31; 1719 if (b == 0) 1720 return -1; 1721 while ((mask != 0) && ((b & mask) == 0)) { 1722 mask = mask >> 1; 1723 cnt--; 1724 } 1725 return cnt; 1726} 1727 1728static int 1729p9100_set_depth(struct p9100_softc *sc, int depth) 1730{ 1731 int new_sls; 1732 uint32_t bits, scr, memctl, mem; 1733 int s0, s1, s2, s3, ps, crtcline; 1734 uint8_t pf, mc3, es; 1735 1736 switch (depth) { 1737 case 8: 1738 sc->sc_depthshift = 0; 1739 ps = 2; 1740 pf = 3; 1741 mc3 = 0; 1742 es = 0; /* no swapping */ 1743 memctl = 3; 1744 break; 1745 case 16: 1746 sc->sc_depthshift = 1; 1747 ps = 3; 1748 pf = 4; 1749 mc3 = 0; 1750 es = 2; /* swap bytes in 16bit words */ 1751 memctl = 2; 1752 break; 1753 case 24: 1754 /* boo */ 1755 printf("We don't DO 24bit pixels dammit!\n"); 1756 return 0; 1757 case 32: 1758 sc->sc_depthshift = 2; 1759 ps = 5; 1760 pf = 6; 1761 mc3 = 0; 1762 es = 6; /* swap both half-words and bytes */ 1763 memctl = 1; /* 0 */ 1764 break; 1765 default: 1766 aprint_error("%s: bogus colour depth (%d)\n", 1767 __func__, depth); 1768 return FALSE; 1769 } 1770 /* 1771 * this could be done a lot shorter and faster but then nobody would 1772 * understand what the hell we're doing here without getting a major 1773 * headache. Scanline size is encoded as 4 shift values, 3 of them 3 bits 1774 * wide, 16 << n for n>0, one 2 bits, 512 << n for n>0. n==0 means 0 1775 */ 1776 new_sls = sc->sc_width << sc->sc_depthshift; 1777 sc->sc_stride = new_sls; 1778 bits = new_sls; 1779 s3 = upper_bit(bits); 1780 if (s3 > 9) { 1781 bits &= ~(1 << s3); 1782 s3 -= 9; 1783 } else 1784 s3 = 0; 1785 s2 = upper_bit(bits); 1786 if (s2 > 0) { 1787 bits &= ~(1 << s2); 1788 s2 -= 4; 1789 } else 1790 s2 = 0; 1791 s1 = upper_bit(bits); 1792 if (s1 > 0) { 1793 bits &= ~(1 << s1); 1794 s1 -= 4; 1795 } else 1796 s1 = 0; 1797 s0 = upper_bit(bits); 1798 if (s0 > 0) { 1799 bits &= ~(1 << s0); 1800 s0 -= 4; 1801 } else 1802 s0 = 0; 1803 1804 1805 DPRINTF("sls: %x sh: %d %d %d %d leftover: %x\n", new_sls, s0, s1, 1806 s2, s3, bits); 1807 1808 /* 1809 * now let's put these values into the System Config Register. No need to 1810 * read it here since we (hopefully) just saved the content 1811 */ 1812 scr = p9100_ctl_read_4(sc, SYS_CONF); 1813 scr = (s0 << SHIFT_0) | (s1 << SHIFT_1) | (s2 << SHIFT_2) | 1814 (s3 << SHIFT_3) | (ps << PIXEL_SHIFT) | (es << SWAP_SHIFT); 1815 1816 DPRINTF("new scr: %x DAC %x %x\n", scr, pf, mc3); 1817 1818 mem = p9100_ctl_read_4(sc, VID_MEM_CONFIG); 1819 1820 DPRINTF("old memctl: %08x\n", mem); 1821 1822 /* set shift and crtc clock */ 1823 mem &= ~(0x0000fc00); 1824 mem |= (memctl << 10) | (memctl << 13); 1825 p9100_ctl_write_4(sc, VID_MEM_CONFIG, mem); 1826 1827 DPRINTF("new memctl: %08x\n", mem); 1828 1829 /* whack the engine... */ 1830 p9100_ctl_write_4(sc, SYS_CONF, scr); 1831 1832 /* ok, whack the DAC */ 1833 p9100_ramdac_write_ctl(sc, DAC_MISC_1, 0x11); 1834 p9100_ramdac_write_ctl(sc, DAC_MISC_2, 0x45); 1835 p9100_ramdac_write_ctl(sc, DAC_MISC_3, mc3); 1836 /* 1837 * despite the 3GX manual saying otherwise we don't need to mess with 1838 * any clock dividers here 1839 */ 1840 p9100_ramdac_write_ctl(sc, DAC_MISC_CLK, 1); 1841 p9100_ramdac_write_ctl(sc, 3, 0); 1842 p9100_ramdac_write_ctl(sc, 4, 0); 1843 1844 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 0); 1845 p9100_ramdac_write_ctl(sc, DAC_OPERATION, 0); 1846 p9100_ramdac_write_ctl(sc, DAC_PALETTE_CTRL, 0); 1847 1848 p9100_ramdac_write_ctl(sc, DAC_PIXEL_FMT, pf); 1849 1850 /* TODO: distinguish between 15 and 16 bit */ 1851 p9100_ramdac_write_ctl(sc, DAC_8BIT_CTRL, 0); 1852 /* direct colour, linear, 565 */ 1853 p9100_ramdac_write_ctl(sc, DAC_16BIT_CTRL, 0xc6); 1854 /* direct colour */ 1855 p9100_ramdac_write_ctl(sc, DAC_32BIT_CTRL, 3); 1856 1857 /* From the 3GX manual. Needs magic number reduction */ 1858 p9100_ramdac_write_ctl(sc, 0x10, 2); 1859 p9100_ramdac_write_ctl(sc, 0x11, 0); 1860 p9100_ramdac_write_ctl(sc, 0x14, 5); 1861 p9100_ramdac_write_ctl(sc, 0x08, 1); 1862 p9100_ramdac_write_ctl(sc, 0x15, 5); 1863 p9100_ramdac_write_ctl(sc, 0x16, 0x63); 1864 1865 /* whack the CRTC */ 1866 /* we always transfer 64bit in one go */ 1867 crtcline = sc->sc_stride >> 3; 1868 1869 DPRINTF("crtcline: %d\n", crtcline); 1870 1871 p9100_ctl_write_4(sc, VID_HTOTAL, (24 << sc->sc_depthshift) + crtcline); 1872 p9100_ctl_write_4(sc, VID_HSRE, 8 << sc->sc_depthshift); 1873 p9100_ctl_write_4(sc, VID_HBRE, 18 << sc->sc_depthshift); 1874 p9100_ctl_write_4(sc, VID_HBFE, (18 << sc->sc_depthshift) + crtcline); 1875 1876#ifdef PNOZZ_DEBUG 1877 { 1878 uint32_t sscr; 1879 sscr = p9100_ctl_read_4(sc, SYS_CONF); 1880 printf("scr: %x\n", sscr); 1881 } 1882#endif 1883 return TRUE; 1884} 1885