1226586Sdim/* $NetBSD: qduser.h,v 1.8 2024/06/02 12:11:35 andvar Exp $ */ 2226586Sdim/*- 3226586Sdim * Copyright (c) 1982, 1986 The Regents of the University of California. 4226586Sdim * All rights reserved. 5226586Sdim * 6226586Sdim * Redistribution and use in source and binary forms, with or without 7226586Sdim * modification, are permitted provided that the following conditions 8226586Sdim * are met: 9226586Sdim * 1. Redistributions of source code must retain the above copyright 10226586Sdim * notice, this list of conditions and the following disclaimer. 11226586Sdim * 2. Redistributions in binary form must reproduce the above copyright 12226586Sdim * notice, this list of conditions and the following disclaimer in the 13263509Sdim * documentation and/or other materials provided with the distribution. 14263509Sdim * 3. Neither the name of the University nor the names of its contributors 15226586Sdim * may be used to endorse or promote products derived from this software 16226586Sdim * without specific prior written permission. 17226586Sdim * 18226586Sdim * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 19252723Sdim * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20252723Sdim * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21252723Sdim * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 22252723Sdim * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23252723Sdim * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24235633Sdim * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25226586Sdim * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26226586Sdim * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27226586Sdim * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28252723Sdim * SUCH DAMAGE. 29252723Sdim * 30226586Sdim * @(#)qduser.h 7.1 (Berkeley) 5/9/91 31226586Sdim */ 32226586Sdim 33226586Sdim/* derived from: @(#)qduser.h 6.1 (ULTRIX) 11/24/87 */ 34226586Sdim/************************************************************************ 35226586Sdim * * 36226586Sdim * Copyright (c) 1986 by * 37235633Sdim * Digital Equipment Corporation, Maynard, MA * 38226586Sdim * All rights reserved. * 39235633Sdim * * 40226586Sdim * This software is furnished under a license and may be used and * 41226586Sdim * copied only in accordance with the terms of such license and * 42226586Sdim * with the inclusion of the above copyright notice. This * 43226586Sdim * software or any other copies thereof may not be provided or * 44226586Sdim * otherwise made available to any other person. No title to and * 45226586Sdim * ownership of the software is hereby transferred. * 46226586Sdim * * 47226586Sdim * The information in this software is subject to change without * 48226586Sdim * notice and should not be construed as a commitment by Digital * 49226586Sdim * Equipment Corporation. * 50245431Sdim * * 51245431Sdim * Digital assumes no responsibility for the use or reliability * 52245431Sdim * of its software on equipment which is not supplied by Digital. * 53245431Sdim * * 54245431Sdim ************************************************************************/ 55245431Sdim 56245431Sdim/*************************************************************************** 57245431Sdim* 58245431Sdim* QDUSER... 59226586Sdim* This file defines values shared between the driver and a client 60226586Sdim* 61226586Sdim***************************************************************************/ 62226586Sdim 63226586Sdim/*************************************************************************** 64226586Sdim* revision history: 65226586Sdim**************************************************************************** 66226586Sdim* 67226586Sdim* 21 jul 86 ram fixed define of CURSOR_MIN_Y 68235633Sdim* 25 nov 85 longo added macro and bit defines for DMA error flags 69226586Sdim* 11 nov 85 longo renamed _vs_eventqueue to "qdinput" struct 70226586Sdim* 23 oct 85 longo added more defines to the DMA stuff 71245431Sdim* 17 oct 85 longo changed "struct rgb" chars to be unsigned 72245431Sdim* 16 oct 85 longo added new TABLET support definitions 73245431Sdim* 15 oct 85 longo re-wrote DMA queue access macros 74245431Sdim* 08 oct 85 longo added status flag manipulation macros to DMA stuff 75245431Sdim* 02 oct 85 longo added support for color map write buffer loading 76245431Sdim* 26 sep 85 longo removed adder sertup params from DMA request struct 77245431Sdim* 23 sep 85 longo added DMA queue access macros 78245431Sdim* 30 aug 85 longo fixed crock in "qdiobuf" struct compile-time sizing. Also 79245431Sdim* removed DMAcontrol struct from DMA buffer for field test 80245431Sdim* 26 aug 85 longo put in conditional include of "qevent.h" for user prg's 81245431Sdim* 18 jul 85 longo changed semantics so that head is tail and tail is head 82245431Sdim* 12 jul 85 longo moved "mouse_report" struct and defs over to qd_data.c 83245431Sdim* 11 jul 85 longo added device coordinate to gate array cursor coordinate 84245431Sdim* transformation macros 85245431Sdim* 03 jul 85 longo changed kernel typdef's for data types to long-hand 86245431Sdim* 10 may 85 longo created 87245431Sdim* 88226586Sdim***************************************************************************/ 89245431Sdim 90245431Sdim#include <dev/qbus/qevent.h> 91245431Sdim 92245431Sdim/*--------------------- 93245431Sdim* QDSS device map */ 94245431Sdim 95245431Sdim struct qdmap { /* map of register blocks in QDSS */ 96245431Sdim 97245431Sdim char *template; 98245431Sdim char *adder; 99245431Sdim char *dga; 100245431Sdim char *duart; 101245431Sdim char *memcsr; 102245431Sdim char *red; 103245431Sdim char *blue; 104245431Sdim char *green; 105245431Sdim }; 106245431Sdim 107245431Sdim/*-------------------------------------------- 108245431Sdim* DGA CSR bit definitions and register map */ 109245431Sdim 110245431Sdim#define DMADONE 0x8000 /* DMA done status */ 111245431Sdim#define SET_DONE_FIFO 0x4000 /* set DMADONE when FIFO empty.. */ 112245431Sdim /* ..AND count = 0 */ 113245431Sdim 114245431Sdim#define PTOB_ENB 0x0600 /* host-to-bitmap DMA xfer */ 115245431Sdim#define BTOP_ENB 0x0400 /* bitmap-to-host DMA xfer */ 116245431Sdim#define DL_ENB 0x0200 /* display list DMA xfer */ 117245431Sdim#define HALT 0x0000 /* halt DGA */ 118245431Sdim 119245431Sdim#define BYTE_DMA 0x0100 /* byte/word DMA xfer */ 120245431Sdim 121245431Sdim#define DMA_ERR 0x0080 /* DMA error bits */ 122245431Sdim#define PARITY_ERR 0x0040 /* memory parity error in DMA */ 123245431Sdim#define BUS_ERR 0x0020 /* bus timeout error in DMA */ 124245431Sdim 125245431Sdim#define GLOBAL_IE 0x0004 /* global interrupt enable */ 126245431Sdim#define DMA_IE 0x0002 /* DMA interrupt enable */ 127245431Sdim#define CURS_ENB 0x0001 /* cursor enable */ 128245431Sdim 129245431Sdim/* QDSS memcsr bit definitions */ 130245431Sdim 131245431Sdim#define UNBLANK 0x0020 132245431Sdim#define SYNC_ON 0x0008 133245431Sdim 134245431Sdim struct dga { 135245431Sdim 136245431Sdim unsigned short csr; 137245431Sdim unsigned short adrs_lo; /* destination address of bitmap to */ 138245431Sdim unsigned short adrs_hi; /* host DMA */ 139245431Sdim unsigned short bytcnt_lo; /* byte length of requested DMA */ 140245431Sdim unsigned short bytcnt_hi; /* (WO = bytcnt) (RO = fifo count) */ 141245431Sdim unsigned short fifo; /* FIFO register */ 142245431Sdim unsigned short x_cursor; /* cursor position registers */ 143245431Sdim unsigned short y_cursor; 144245431Sdim unsigned short ivr; /* interrupt vector register */ 145245431Sdim unsigned short memadr; /* memory base address register */ 146245431Sdim }; 147245431Sdim 148245431Sdim/*------------------------------------------------------------------------- 149245431Sdim* macros to transform device coordinates to hardware cursor coordinates */ 150245431Sdim 151245431Sdim#define CURS_MIN_X 232 /* device coordinate x = 0 */ 152245431Sdim#define CURS_MIN_Y 16 /* device coordinate y = 0 */ 153245431Sdim 154245431Sdim#define TRANX(x) ( -(((int)(x)+CURS_MIN_X) & ~0x0003) | \ 155245431Sdim (((int)(x)+CURS_MIN_X) & 0x0003) ) 156245431Sdim 157245431Sdim#define TRANY(y) ( -((y)+CURS_MIN_Y) ) 158245431Sdim 159245431Sdim/********************************************************************* 160245431Sdim* 161245431Sdim* EVENT QUEUE DEFINITIONS 162245431Sdim* 163245431Sdim********************************************************************** 164245431Sdim* most of the event queue definitions are found in "qevent.h". But a 165245431Sdim* few things not found there are here. */ 166245431Sdim 167245431Sdim/* The event queue header */ 168252723Sdim 169252723Sdimstruct qdinput { 170252723Sdim 171252723Sdim struct _vs_eventqueue header; /* event queue ring handling */ 172252723Sdim 173252723Sdim /* for VS100 and QVSS compatibility reasons, additions to this 174245431Sdim * structure must be made below this point. */ 175252723Sdim 176252723Sdim struct _vs_cursor curs_pos; /* current mouse position */ 177252723Sdim struct _vs_box curs_box; /* cursor reporting box */ 178245431Sdim 179245431Sdim }; 180245431Sdim 181245431Sdim/* vse_key field. definitions for mouse buttons */ 182245431Sdim 183245431Sdim#define VSE_LEFT_BUTTON 0 184245431Sdim#define VSE_MIDDLE_BUTTON 1 185245431Sdim#define VSE_RIGHT_BUTTON 2 186245431Sdim 187245431Sdim/* vse_key field. definitions for mouse buttons */ 188245431Sdim 189245431Sdim#define VSE_T_LEFT_BUTTON 0 190245431Sdim#define VSE_T_FRONT_BUTTON 1 191245431Sdim#define VSE_T_RIGHT_BUTTON 2 192245431Sdim#define VSE_T_BACK_BUTTON 4 193245431Sdim 194245431Sdim#define VSE_T_BARREL_BUTTON VSE_T_LEFT_BUTTON 195245431Sdim#define VSE_T_TIP_BUTTON VSE_T_FRONT_BUTTON 196245431Sdim 197245431Sdim/*-------------------------------------------------------------------------- 198245431Sdim* These are the macros to be used for loading and extracting from the event 199245431Sdim* queue. It is presumed that the macro user will only use the access macros 200245431Sdim* if the event queue is non-empty ( ISEMPTY(eq) == FALSE ), and that the 201245431Sdim* driver will only load the event queue after checking that it is not full 202245431Sdim* ( ISFULL(eq) == FALSE ). ("eq" is a pointer to the event queue header.) 203245431Sdim* 204245431Sdim* Before an event access session for a particular event, the macro users 205245431Sdim* must use the xxxBEGIN macro, and the xxxEND macro after an event is through 206245431Sdim* with. As seen below, the xxxBEGIN and xxxEND macros maintain the event 207245431Sdim* queue access mechanism. 208245431Sdim* 209245431Sdim* First, the macros to be used by the event queue reader 210245431Sdim*/ 211245431Sdim 212245431Sdim#define ISEMPTY(eq) ((eq)->header.head == (eq)->header.tail) 213245431Sdim#define GETBEGIN(eq) (&(eq)->header.events[(eq)->header.head]) 214245431Sdim 215245431Sdim#define GET_X(event) ((event)->vse_x) /* get x position */ 216245431Sdim#define GET_Y(event) ((event)->vse_y) /* get y position */ 217245431Sdim#define GET_TIME(event) ((event)->vse_time) /* get time */ 218245431Sdim#define GET_TYPE(event) ((event)->vse_type) /* get entry type */ 219245431Sdim#define GET_KEY(event) ((event)->vse_key) /* get keycode */ 220245431Sdim#define GET_DIR(event) ((event)->vse_direction) /* get direction */ 221245431Sdim#define GET_DEVICE(event) ((event)->vse_device) /* get device */ 222245431Sdim 223245431Sdim#define GETEND(eq) (++(eq)->header.head >= (eq)->header.size ? \ 224245431Sdim (eq)->header.head = 0 : 0 ) 225245431Sdim 226245431Sdim/*------------------------------------------------ 227245431Sdim* macros to be used by the event queue loader */ 228245431Sdim 229245431Sdim /* ISFULL yields TRUE if queue is full */ 230245431Sdim 231245431Sdim#define ISFULL(eq) ((eq)->header.tail+1 == (eq)->header.head || \ 232245431Sdim ((eq)->header.tail+1 == (eq)->header.size && \ 233245431Sdim (eq)->header.head == 0)) 234245431Sdim 235245431Sdim /* get address of the billet for NEXT event */ 236245431Sdim 237245431Sdim#define PUTBEGIN(eq) (&(eq)->header.events[(eq)->header.tail]) 238245431Sdim 239245431Sdim#define PUT_X(event, value) ((event)->vse_x = value) /* put X pos */ 240245431Sdim#define PUT_Y(event, value) ((event)->vse_y = value) /* put Y pos */ 241245431Sdim#define PUT_TIME(event, value) ((event)->vse_time = value) /* put time */ 242245431Sdim#define PUT_TYPE(event, value) ((event)->vse_type = value) /* put type */ 243245431Sdim#define PUT_KEY(event, value) ((event)->vse_key = value) /* put input key */ 244245431Sdim#define PUT_DIR(event, value) ((event)->vse_direction = value) /* put dir */ 245245431Sdim#define PUT_DEVICE(event, value) ((event)->vse_device = value) /* put dev */ 246245431Sdim 247245431Sdim#define PUTEND(eq) (++(eq)->header.tail >= (eq)->header.size ? \ 248245431Sdim (eq)->header.tail = 0 : 0) 249245431Sdim 250245431Sdim/****************************************************************** 251245431Sdim* 252245431Sdim* DMA I/O DEFINITIONS 253245431Sdim* 254245431Sdim******************************************************************/ 255245431Sdim 256245431Sdim/*--------------------------------------------------------------------- 257245431Sdim* The DMA request queue is implemented as a ring buffer of "DMAreq" 258245431Sdim structures. The queue is accessed using ring indices located in the 259245431Sdim "DMAreq_header" structure. Access is implemented using access macros 260245431Sdim similar to the event queue access macros above. */ 261245431Sdim 262245431Sdim struct DMAreq { 263245431Sdim 264245431Sdim short DMAtype; /* DMA type code (for QDSS) */ 265245431Sdim short DMAdone; /* DMA done parameter */ 266245431Sdim char *bufp; /* virtual adrs of buffer */ 267245431Sdim int length; /* transfer buffer length */ 268245431Sdim }; 269263509Sdim 270263509Sdim/* DMA type command codes */ 271263509Sdim 272263509Sdim#define DISPLIST 1 /* display list DMA */ 273263509Sdim#define PTOB 2 /* 1 plane Qbus to bitmap DMA */ 274245431Sdim#define BTOP 3 /* 1 plane bitmap to Qbus DMA */ 275235633Sdim 276245431Sdim/* DMA done notification code */ 277235633Sdim 278245431Sdim#define FIFO_EMPTY 0x01 /* DONE when FIFO becomes empty */ 279245431Sdim#define COUNT_ZERO 0x02 /* DONE when count becomes zero */ 280245431Sdim#define WORD_PACK 0x04 /* program the gate array for word packing */ 281245431Sdim#define BYTE_PACK 0x08 /* program gate array for byte packing */ 282252723Sdim#define REQUEST_DONE 0x100 /* clear when driver has processed request */ 283252723Sdim#define HARD_ERROR 0x200 /* DMA hardware error occurred */ 284245431Sdim 285245431Sdim/* DMA request queue is a ring buffer of request structures */ 286235633Sdim 287252723Sdim struct DMAreq_header { 288252723Sdim 289252723Sdim int QBAreg; /* cookie Qbus map reg for this buffer */ 290235633Sdim short status; /* master DMA status word */ 291252723Sdim int shared_size; /* size of shared memory in bytes */ 292235633Sdim struct DMAreq *DMAreq; /* start address of request queue */ 293235633Sdim int used; /* # of queue entries currently used */ 294235633Sdim int size; /* # of "DMAreq"'s in the request queue */ 295245431Sdim int oldest; /* index to oldest queue'd request */ 296245431Sdim int newest; /* index to newest queue'd request */ 297235633Sdim }; 298245431Sdim 299245431Sdim/* bit definitions for DMAstatus word in DMAreq_header */ 300235633Sdim 301235633Sdim#define DMA_ACTIVE 0x0004 /* DMA in progress */ 302245431Sdim#define DMA_ERROR 0x0080 /* DMA hardware error */ 303245431Sdim#define DMA_IGNORE 0x0002 /* flag to ignore this interrupt */ 304235633Sdim 305235633Sdim/*------------------------------------------ 306245431Sdim* macros for DMA request queue fiddling */ 307245431Sdim 308226586Sdim /* DMA status set/check macros */ 309245431Sdim 310245431Sdim#define DMA_SETACTIVE(header) ((header)->status |= DMA_ACTIVE) 311245431Sdim#define DMA_CLRACTIVE(header) ((header)->status &= ~DMA_ACTIVE) 312245431Sdim#define DMA_ISACTIVE(header) ((header)->status & DMA_ACTIVE) 313245431Sdim 314245431Sdim#define DMA_SETERROR(header) ((header)->status |= DMA_ERROR) 315245431Sdim#define DMA_CLRERROR(header) ((header)->status &= ~DMA_ERROR) 316235633Sdim#define DMA_ISERROR(header) ((header)->status & DMA_ERROR) 317245431Sdim 318245431Sdim#define DMA_SETIGNORE(header) ((header)->status |= DMA_IGNORE) 319235633Sdim#define DMA_CLRIGNORE(header) ((header)->status &= ~DMA_IGNORE) 320252723Sdim#define DMA_ISIGNORE(header) ((header)->status & DMA_IGNORE) 321252723Sdim 322245431Sdim /* yields TRUE if queue is empty (ISEMPTY) or full (ISFULL) */ 323245431Sdim 324245431Sdim#define DMA_ISEMPTY(header) ((header)->used == 0) 325245431Sdim#define DMA_ISFULL(header) ((header)->used >= (header)->size) 326245431Sdim 327245431Sdim /* returns address of the billet for next (PUT) 328252723Sdim * or oldest (GET) request */ 329245431Sdim 330245431Sdim#define DMA_PUTBEGIN(header) (&(header)->DMAreq[(header)->newest]) 331263509Sdim#define DMA_GETBEGIN(header) (&(header)->DMAreq[(header)->oldest]) 332245431Sdim 333245431Sdim /* does queue access pointer maintenance */ 334245431Sdim 335263509Sdim#define DMA_GETEND(header) (++(header)->oldest >= (header)->size \ 336245431Sdim ? (header)->oldest = 0 : 0); \ 337245431Sdim --(header)->used; 338245431Sdim 339245431Sdim#define DMA_PUTEND(header) (++(header)->newest >= (header)->size \ 340245431Sdim ? (header)->newest = 0 : 0); \ 341245431Sdim ++(header)->used; 342245431Sdim 343245431Sdim/****************************************************************** 344245431Sdim* 345263509Sdim* COLOR MAP WRITE BUFFER DEFINITIONS 346245431Sdim* 347245431Sdim******************************************************************/ 348245431Sdim 349235633Sdim struct rgb { 350245431Sdim 351245431Sdim unsigned char offset; /* color map address for load */ 352252723Sdim unsigned char red; /* data for red map */ 353235633Sdim unsigned char green; /* data for green map */ 354245431Sdim unsigned char blue; /* data for blue map */ 355235633Sdim }; 356245431Sdim 357245431Sdim struct color_buf { 358252723Sdim 359263509Sdim char status; /* load request/service status */ 360245431Sdim short count; /* number of entries to br loaded */ 361245431Sdim struct rgb rgb[256]; 362245431Sdim }; 363245431Sdim 364245431Sdim#define LOAD_COLOR_MAP 0x0001 365245431Sdim 366245431Sdim/****************************************************************** 367245431Sdim* 368245431Sdim* SCROLL ASSIST DEFINITIONS 369252723Sdim* 370245431Sdim******************************************************************/ 371245431Sdim 372245431Sdim struct scroll { 373245431Sdim 374245431Sdim short status; 375245431Sdim short viper_constant; 376245431Sdim short y_scroll_constant; 377245431Sdim short y_offset; 378245431Sdim short x_index_pending; 379235633Sdim short y_index_pending; 380245431Sdim }; 381245431Sdim 382252723Sdim#define LOAD_REGS 0x0001 383235633Sdim#define LOAD_INDEX 0x0002 384245431Sdim 385235633Sdim/****************************************************************** 386245431Sdim* 387245431Sdim* MOUSE/TABLET/KBD PROGRAMMING DEFINITIONS 388252723Sdim* 389245431Sdim******************************************************************/ 390245431Sdim 391245431Sdim/*----------------------------------- 392245431Sdim* LK201 programming definitions */ 393245431Sdim 394252723Sdim#define LK_UPDOWN 0x86 /* bits for setting lk201 modes */ 395245431Sdim#define LK_AUTODOWN 0x82 396245431Sdim#define LK_DOWN 0x80 397245431Sdim#define LK_DEFAULTS 0xD3 /* reset (some) default settings */ 398245431Sdim#define LK_AR_ENABLE 0xE3 /* global auto repeat enable */ 399245431Sdim#define LK_CL_ENABLE 0x1B /* keyclick enable */ 400245431Sdim#define LK_KBD_ENABLE 0x8B /* keyboard enable */ 401245431Sdim#define LK_BELL_ENABLE 0x23 /* the bell */ 402245431Sdim#define LK_RING_BELL 0xA7 /* ring keyboard bell */ 403245431Sdim 404245431Sdim#define LK_LED_ENABLE 0x13 /* light led */ 405245431Sdim#define LK_LED_DISABLE 0x11 /* turn off led */ 406245431Sdim#define LED_1 0x81 /* led bits */ 407245431Sdim#define LED_2 0x82 408245431Sdim#define LED_3 0x84 409245431Sdim#define LED_4 0x88 410245431Sdim#define LED_ALL 0x8F 411245431Sdim#define LK_LED_HOLD LED_4 412245431Sdim#define LK_LED_LOCK LED_3 413245431Sdim#define LK_LED_COMPOSE LED_2 414245431Sdim#define LK_LED_WAIT LED_1 415245431Sdim 416245431Sdim#define LK_KDOWN_ERROR 0x3D /* key down on powerup error */ 417245431Sdim#define LK_POWER_ERROR 0x3E /* keyboard failure on powerup test */ 418245431Sdim#define LK_OUTPUT_ERROR 0xB5 /* keystrokes lost during inhibit */ 419245431Sdim#define LK_INPUT_ERROR 0xB6 /* garbage command to keyboard */ 420252723Sdim#define LK_LOWEST 0x56 /* lowest significant keycode */ 421252723Sdim#define LK_DIV6_START 0xAD /* start of div 6 */ 422245431Sdim#define LK_DIV5_END 0xB2 /* end of div 5 */ 423245431Sdim 424245431Sdim#define LAST_PARAM 0x80 /* "no more params" bit */ 425245431Sdim 426245431Sdim struct prgkbd { 427252723Sdim 428245431Sdim short cmd; /* LK201 command opcode */ 429245431Sdim short param1; /* 1st cmd parameter (can be null) */ 430245431Sdim short param2; /* 2nd cmd parameter (can be null) */ 431245431Sdim }; 432245431Sdim 433245431Sdim/*------------------------- 434245431Sdim* "special" LK-201 keys */ 435252723Sdim 436245431Sdim#define SHIFT 174 437245431Sdim#define LOCK 176 438245431Sdim#define REPEAT 180 439245431Sdim#define CNTRL 175 440245431Sdim#define ALLUP 179 441245431Sdim 442252723Sdim/*-------------------------------- 443245431Sdim* cursor programming structure */ 444252723Sdim 445245431Sdim struct prg_cursor { 446252723Sdim 447245431Sdim unsigned short acc_factor; /* cursor aceleration factor */ 448252723Sdim unsigned short threshold; /* threshold to trigger acc at */ 449245431Sdim }; 450235633Sdim 451245431Sdim/*--------------------- 452245431Sdim* mouse definitions */ 453245431Sdim 454245431Sdim#define INC_STREAM_MODE 'R' /* stream mode reports (55 hz) */ 455245431Sdim#define PROMPT_MODE 'D' /* report when prompted */ 456245431Sdim#define REQUEST_POS 'P' /* request position report */ 457245431Sdim#define SELF_TEST 'T' /* request self test */ 458245431Sdim 459245431Sdim#define MOUSE_ID 0x2 /* mouse ID in lo 4 bits */ 460245431Sdim 461235633Sdim#define START_FRAME 0x80 /* start of report frame bit */ 462245431Sdim#define X_SIGN 0x10 /* position sign bits */ 463245431Sdim#define Y_SIGN 0x08 464235633Sdim 465226586Sdim#define RIGHT_BUTTON 0x01 /* mouse buttons */ 466226586Sdim#define MIDDLE_BUTTON 0x02 467245431Sdim#define LEFT_BUTTON 0x04 468235633Sdim 469235633Sdim /* mouse report structure definition */ 470235633Sdim 471235633Sdim struct mouse_report { 472252723Sdim 473252723Sdim char state; /* buttons and sign bits */ 474245431Sdim short dx; /* delta X since last change */ 475235633Sdim short dy; /* delta Y since last change */ 476245431Sdim char bytcnt; /* mouse report byte count */ 477252723Sdim }; 478245431Sdim 479245431Sdim/*----------------------------------------- 480245431Sdim* tablet command/interface definitions */ 481245431Sdim 482245431Sdim#define T_STREAM 'R' /* continuous stream report mode */ 483245431Sdim#define T_POINT 'D' /* enter report-on-request mode */ 484245431Sdim#define T_REQUEST 'P' /* request position report */ 485245431Sdim 486245431Sdim#define T_BAUD 'B' /* increase baud to 9600 from 4800 */ 487245431Sdim#define T_RATE_55 'K' /* report rate: 55/sec */ 488245431Sdim#define T_RATE_72 'L' /* report rate: 72/sec */ 489235633Sdim#define T_RATE_120 'M' /* report rate: 120/sec (9600 only) */ 490235633Sdim 491245431Sdim#define T_TEST SELF_TEST /* do self test */ 492235633Sdim 493235633Sdim#define TABLET_ID 0x4 /* tablet ID in lo 4 bits */ 494235633Sdim 495245431Sdim#define T_START_FRAME 0x80 /* start of report frame bit */ 496235633Sdim#define T_PROXIMITY 0x01 /* state pointer in proximity */ 497252723Sdim 498245431Sdim#define T_LEFT_BUTTON 0x02 /* puck buttons */ 499245431Sdim#define T_FRONT_BUTTON 0x04 500252723Sdim#define T_RIGHT_BUTTON 0x08 501252723Sdim#define T_BACK_BUTTON 0x10 502245431Sdim 503263509Sdim#define T_BARREL_BUTTON T_LEFT_BUTTON /* stylus buttons */ 504245431Sdim#define T_TIP_BUTTON T_FRONT_BUTTON 505245431Sdim 506263509Sdim