esp_pcmcia.c revision 1.9
1/* $NetBSD: esp_pcmcia.c,v 1.9 2001/04/25 17:53:37 bouyer Exp $ */ 2 3/*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/device.h> 42#include <sys/buf.h> 43 44#include <machine/bus.h> 45#include <machine/intr.h> 46 47#include <dev/scsipi/scsi_all.h> 48#include <dev/scsipi/scsipi_all.h> 49#include <dev/scsipi/scsiconf.h> 50 51#include <dev/pcmcia/pcmciareg.h> 52#include <dev/pcmcia/pcmciavar.h> 53#include <dev/pcmcia/pcmciadevs.h> 54 55#include <dev/ic/ncr53c9xreg.h> 56#include <dev/ic/ncr53c9xvar.h> 57 58struct esp_pcmcia_softc { 59 struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */ 60 61 int sc_active; /* Pseudo-DMA state vars */ 62 int sc_tc; 63 int sc_datain; 64 size_t sc_dmasize; 65 size_t sc_dmatrans; 66 char **sc_dmaaddr; 67 size_t *sc_pdmalen; 68 69 /* PCMCIA-specific goo. */ 70 struct pcmcia_io_handle sc_pcioh; /* PCMCIA i/o space info */ 71 int sc_io_window; /* our i/o window */ 72 struct pcmcia_function *sc_pf; /* our PCMCIA function */ 73 void *sc_ih; /* interrupt handler */ 74#ifdef ESP_PCMCIA_POLL 75 struct callout sc_poll_ch; 76#endif 77 int sc_flags; 78#define ESP_PCMCIA_ATTACHED 1 /* attach completed */ 79#define ESP_PCMCIA_ATTACHING 2 /* attach in progress */ 80}; 81 82int esp_pcmcia_match __P((struct device *, struct cfdata *, void *)); 83void esp_pcmcia_attach __P((struct device *, struct device *, void *)); 84void esp_pcmcia_init __P((struct esp_pcmcia_softc *)); 85int esp_pcmcia_detach __P((struct device *, int)); 86int esp_pcmcia_enable __P((void *, int)); 87 88struct cfattach esp_pcmcia_ca = { 89 sizeof(struct esp_pcmcia_softc), esp_pcmcia_match, esp_pcmcia_attach, 90 esp_pcmcia_detach 91}; 92 93/* 94 * Functions and the switch for the MI code. 95 */ 96#ifdef ESP_PCMCIA_POLL 97void esp_pcmcia_poll __P((void *)); 98#endif 99u_char esp_pcmcia_read_reg __P((struct ncr53c9x_softc *, int)); 100void esp_pcmcia_write_reg __P((struct ncr53c9x_softc *, int, u_char)); 101int esp_pcmcia_dma_isintr __P((struct ncr53c9x_softc *)); 102void esp_pcmcia_dma_reset __P((struct ncr53c9x_softc *)); 103int esp_pcmcia_dma_intr __P((struct ncr53c9x_softc *)); 104int esp_pcmcia_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, 105 size_t *, int, size_t *)); 106void esp_pcmcia_dma_go __P((struct ncr53c9x_softc *)); 107void esp_pcmcia_dma_stop __P((struct ncr53c9x_softc *)); 108int esp_pcmcia_dma_isactive __P((struct ncr53c9x_softc *)); 109 110struct ncr53c9x_glue esp_pcmcia_glue = { 111 esp_pcmcia_read_reg, 112 esp_pcmcia_write_reg, 113 esp_pcmcia_dma_isintr, 114 esp_pcmcia_dma_reset, 115 esp_pcmcia_dma_intr, 116 esp_pcmcia_dma_setup, 117 esp_pcmcia_dma_go, 118 esp_pcmcia_dma_stop, 119 esp_pcmcia_dma_isactive, 120 NULL, /* gl_clear_latched_intr */ 121}; 122 123const struct pcmcia_product esp_pcmcia_products[] = { 124 { PCMCIA_STR_PANASONIC_KXLC002, PCMCIA_VENDOR_PANASONIC, 125 PCMCIA_PRODUCT_PANASONIC_KXLC002, 0 }, 126 127 { NULL } 128}; 129 130int 131esp_pcmcia_match(parent, match, aux) 132 struct device *parent; 133 struct cfdata *match; 134 void *aux; 135{ 136 struct pcmcia_attach_args *pa = aux; 137 138 if (pcmcia_product_lookup(pa, esp_pcmcia_products, 139 sizeof esp_pcmcia_products[0], NULL) != NULL) 140 return (1); 141 return (0); 142} 143 144void 145esp_pcmcia_attach(parent, self, aux) 146 struct device *parent, *self; 147 void *aux; 148{ 149 struct esp_pcmcia_softc *esc = (void *)self; 150 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 151 struct pcmcia_attach_args *pa = aux; 152 struct pcmcia_config_entry *cfe; 153 struct pcmcia_function *pf = pa->pf; 154 const struct pcmcia_product *pp; 155 156 esc->sc_pf = pf; 157 158 for (cfe = SIMPLEQ_FIRST(&pf->cfe_head); cfe != NULL; 159 cfe = SIMPLEQ_NEXT(cfe, cfe_list)) { 160 if (cfe->num_memspace != 0 || 161 cfe->num_iospace != 1) 162 continue; 163 164 if (pcmcia_io_alloc(pa->pf, cfe->iospace[0].start, 165 cfe->iospace[0].length, 0, &esc->sc_pcioh) == 0) 166 break; 167 } 168 169 if (cfe == 0) { 170 printf(": can't alloc i/o space\n"); 171 goto no_config_entry; 172 } 173 174 /* Enable the card. */ 175 pcmcia_function_init(pf, cfe); 176 if (pcmcia_function_enable(pf)) { 177 printf(": function enable failed\n"); 178 goto enable_failed; 179 } 180 181 /* Map in the I/O space */ 182 if (pcmcia_io_map(pa->pf, PCMCIA_WIDTH_AUTO, 0, esc->sc_pcioh.size, 183 &esc->sc_pcioh, &esc->sc_io_window)) { 184 printf(": can't map i/o space\n"); 185 goto iomap_failed; 186 } 187 188 pp = pcmcia_product_lookup(pa, esp_pcmcia_products, 189 sizeof esp_pcmcia_products[0], NULL); 190 if (pp == NULL) { 191 printf("\n"); 192 panic("esp_pcmcia_attach: impossible"); 193 } 194 195 printf(": %s\n", pp->pp_name); 196 197 esp_pcmcia_init(esc); 198 199 /* 200 * Initialize nca board itself. 201 */ 202 esc->sc_flags |= ESP_PCMCIA_ATTACHING; 203 sc->sc_adapter.adapt_minphys = minphys; 204 sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request; 205 ncr53c9x_attach(sc); 206 esc->sc_flags &= ~ESP_PCMCIA_ATTACHING; 207 esc->sc_flags |= ESP_PCMCIA_ATTACHED; 208 return; 209 210iomap_failed: 211 /* Disable the device. */ 212 pcmcia_function_disable(esc->sc_pf); 213 214enable_failed: 215 /* Unmap our I/O space. */ 216 pcmcia_io_free(esc->sc_pf, &esc->sc_pcioh); 217 218no_config_entry: 219 return; 220} 221 222void 223esp_pcmcia_init(esc) 224 struct esp_pcmcia_softc *esc; 225{ 226 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 227 bus_space_tag_t iot = esc->sc_pcioh.iot; 228 bus_space_handle_t ioh = esc->sc_pcioh.ioh; 229 230 /* id 7, clock 40M, parity ON, sync OFF, fast ON, slow ON */ 231 232 sc->sc_glue = &esp_pcmcia_glue; 233 234#ifdef ESP_PCMCIA_POLL 235 callout_init(&esc->sc_poll_ch); 236#endif 237 238 sc->sc_rev = NCR_VARIANT_ESP406; 239 sc->sc_id = 7; 240 sc->sc_freq = 40; 241 /* try -PARENB -SLOW */ 242 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB | NCRCFG1_SLOW; 243 /* try +FE */ 244 sc->sc_cfg2 = NCRCFG2_SCSI2; 245 /* try -IDM -FSCSI -FCLK */ 246 sc->sc_cfg3 = NCRESPCFG3_CDB | NCRESPCFG3_FCLK | NCRESPCFG3_IDM | 247 NCRESPCFG3_FSCSI; 248 sc->sc_cfg4 = NCRCFG4_ACTNEG; 249 /* try +INTP */ 250 sc->sc_cfg5 = NCRCFG5_CRS1 | NCRCFG5_AADDR | NCRCFG5_PTRINC; 251 sc->sc_minsync = 0; 252 sc->sc_maxxfer = 64 * 1024; 253 254 bus_space_write_1(iot, ioh, NCR_CFG5, sc->sc_cfg5); 255 256 bus_space_write_1(iot, ioh, NCR_PIOI, 0); 257 bus_space_write_1(iot, ioh, NCR_PSTAT, 0); 258 bus_space_write_1(iot, ioh, 0x09, 0x24); 259 260 bus_space_write_1(iot, ioh, NCR_CFG4, sc->sc_cfg4); 261} 262 263int 264esp_pcmcia_detach(self, flags) 265 struct device *self; 266 int flags; 267{ 268 struct esp_pcmcia_softc *esc = (void *)self; 269 int error; 270 271 if ((esc->sc_flags & ESP_PCMCIA_ATTACHED) == 0) { 272 /* Nothing to detach. */ 273 return (0); 274 } 275 276 error = ncr53c9x_detach(&esc->sc_ncr53c9x, flags); 277 if (error) 278 return (error); 279 280 /* Unmap our i/o window and i/o space. */ 281 pcmcia_io_unmap(esc->sc_pf, esc->sc_io_window); 282 pcmcia_io_free(esc->sc_pf, &esc->sc_pcioh); 283 284 return (0); 285} 286 287int 288esp_pcmcia_enable(arg, onoff) 289 void *arg; 290 int onoff; 291{ 292 struct esp_pcmcia_softc *esc = arg; 293 294 if (onoff) { 295#ifdef ESP_PCMCIA_POLL 296 callout_reset(&esc->sc_poll_ch, 1, esp_pcmcia_poll, esc); 297#else 298 /* Establish the interrupt handler. */ 299 esc->sc_ih = pcmcia_intr_establish(esc->sc_pf, IPL_BIO, 300 ncr53c9x_intr, &esc->sc_ncr53c9x); 301 if (esc->sc_ih == NULL) { 302 printf("%s: couldn't establish interrupt handler\n", 303 esc->sc_ncr53c9x.sc_dev.dv_xname); 304 return (EIO); 305 } 306#endif 307 308 /* 309 * If attach is in progress, we know that card power is 310 * enabled and chip will be initialized later. 311 * Otherwise, enable and reset now. 312 */ 313 if ((esc->sc_flags & ESP_PCMCIA_ATTACHING) == 0) { 314 if (pcmcia_function_enable(esc->sc_pf)) { 315 printf("%s: couldn't enable PCMCIA function\n", 316 esc->sc_ncr53c9x.sc_dev.dv_xname); 317 pcmcia_intr_disestablish(esc->sc_pf, 318 esc->sc_ih); 319 return (EIO); 320 } 321 322 /* Initialize only chip. */ 323 ncr53c9x_init(&esc->sc_ncr53c9x, 0); 324 } 325 } else { 326 pcmcia_function_disable(esc->sc_pf); 327#ifdef ESP_PCMCIA_POLL 328 callout_stop(&esc->sc_poll_ch); 329#else 330 pcmcia_intr_disestablish(esc->sc_pf, esc->sc_ih); 331#endif 332 } 333 334 return (0); 335} 336 337#ifdef ESP_PCMCIA_POLL 338void 339esp_pcmcia_poll(arg) 340 void *arg; 341{ 342 struct esp_pcmcia_softc *esc = arg; 343 344 (void) ncr53c9x_intr(&esc->sc_ncr53c9x); 345 callout_reset(&esc->sc_poll_ch, 1, esp_pcmcia_poll, esc); 346} 347#endif 348 349/* 350 * Glue functions. 351 */ 352u_char 353esp_pcmcia_read_reg(sc, reg) 354 struct ncr53c9x_softc *sc; 355 int reg; 356{ 357 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 358 u_char v; 359 360 v = bus_space_read_1(esc->sc_pcioh.iot, esc->sc_pcioh.ioh, reg); 361 return v; 362} 363 364void 365esp_pcmcia_write_reg(sc, reg, val) 366 struct ncr53c9x_softc *sc; 367 int reg; 368 u_char val; 369{ 370 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 371 u_char v = val; 372 373 if (reg == NCR_CMD && v == (NCRCMD_TRANS|NCRCMD_DMA)) 374 v = NCRCMD_TRANS; 375 bus_space_write_1(esc->sc_pcioh.iot, esc->sc_pcioh.ioh, reg, v); 376} 377 378int 379esp_pcmcia_dma_isintr(sc) 380 struct ncr53c9x_softc *sc; 381{ 382 383 return NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT; 384} 385 386void 387esp_pcmcia_dma_reset(sc) 388 struct ncr53c9x_softc *sc; 389{ 390 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 391 392 esc->sc_active = 0; 393 esc->sc_tc = 0; 394} 395 396int 397esp_pcmcia_dma_intr(sc) 398 struct ncr53c9x_softc *sc; 399{ 400 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 401 u_char *p; 402 u_int espphase, espstat, espintr; 403 int cnt; 404 405 if (esc->sc_active == 0) { 406 printf("%s: dma_intr--inactive DMA\n", sc->sc_dev.dv_xname); 407 return -1; 408 } 409 410 if ((sc->sc_espintr & NCRINTR_BS) == 0) { 411 esc->sc_active = 0; 412 return 0; 413 } 414 415 cnt = *esc->sc_pdmalen; 416 if (*esc->sc_pdmalen == 0) { 417 printf("%s: data interrupt, but no count left\n", 418 sc->sc_dev.dv_xname); 419 } 420 421 p = *esc->sc_dmaaddr; 422 espphase = sc->sc_phase; 423 espstat = (u_int) sc->sc_espstat; 424 espintr = (u_int) sc->sc_espintr; 425 do { 426 if (esc->sc_datain) { 427 *p++ = NCR_READ_REG(sc, NCR_FIFO); 428 cnt--; 429 if (espphase == DATA_IN_PHASE) 430 NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS); 431 else 432 esc->sc_active = 0; 433 } else { 434 if (espphase == DATA_OUT_PHASE || 435 espphase == MESSAGE_OUT_PHASE) { 436 NCR_WRITE_REG(sc, NCR_FIFO, *p++); 437 cnt--; 438 NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS); 439 } else 440 esc->sc_active = 0; 441 } 442 443 if (esc->sc_active) { 444 while (!(NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)); 445 espstat = NCR_READ_REG(sc, NCR_STAT); 446 espintr = NCR_READ_REG(sc, NCR_INTR); 447 espphase = (espintr & NCRINTR_DIS) 448 ? /* Disconnected */ BUSFREE_PHASE 449 : espstat & PHASE_MASK; 450 } 451 } while (esc->sc_active && espintr); 452 sc->sc_phase = espphase; 453 sc->sc_espstat = (u_char) espstat; 454 sc->sc_espintr = (u_char) espintr; 455 *esc->sc_dmaaddr = p; 456 *esc->sc_pdmalen = cnt; 457 458 if (*esc->sc_pdmalen == 0) 459 esc->sc_tc = NCRSTAT_TC; 460 sc->sc_espstat |= esc->sc_tc; 461 return 0; 462} 463 464int 465esp_pcmcia_dma_setup(sc, addr, len, datain, dmasize) 466 struct ncr53c9x_softc *sc; 467 caddr_t *addr; 468 size_t *len; 469 int datain; 470 size_t *dmasize; 471{ 472 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 473 474 esc->sc_dmaaddr = addr; 475 esc->sc_pdmalen = len; 476 esc->sc_datain = datain; 477 esc->sc_dmasize = *dmasize; 478 esc->sc_tc = 0; 479 480 return 0; 481} 482 483void 484esp_pcmcia_dma_go(sc) 485 struct ncr53c9x_softc *sc; 486{ 487 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 488 489 esc->sc_active = 1; 490} 491 492void 493esp_pcmcia_dma_stop(sc) 494 struct ncr53c9x_softc *sc; 495{ 496} 497 498int 499esp_pcmcia_dma_isactive(sc) 500 struct ncr53c9x_softc *sc; 501{ 502 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 503 504 return (esc->sc_active); 505} 506