1/* $NetBSD: yds.c,v 1.70 2024/02/09 22:08:36 andvar Exp $ */ 2 3/* 4 * Copyright (c) 2000, 2001 Kazuki Sakamoto and Minoura Makoto. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28/* 29 * Yamaha YMF724[B-F]/740[B-C]/744/754 30 * 31 * Documentation links: 32 * - ftp://ftp.alsa-project.org/pub/manuals/yamaha/ 33 * - ftp://ftp.alsa-project.org/pub/manuals/yamaha/pci/ 34 * 35 * TODO: 36 * - FM synth volume (difficult: mixed before ac97) 37 * - Digital in/out (SPDIF) support 38 * - Effect?? 39 */ 40 41#include <sys/cdefs.h> 42__KERNEL_RCSID(0, "$NetBSD: yds.c,v 1.70 2024/02/09 22:08:36 andvar Exp $"); 43 44#include "mpu.h" 45 46#include <sys/param.h> 47#include <sys/systm.h> 48#include <sys/kernel.h> 49#include <sys/fcntl.h> 50#include <sys/kmem.h> 51#include <sys/device.h> 52#include <sys/proc.h> 53 54#include <dev/pci/pcidevs.h> 55#include <dev/pci/pcireg.h> 56#include <dev/pci/pcivar.h> 57 58#include <sys/audioio.h> 59#include <dev/audio/audio_if.h> 60#include <dev/ic/ac97reg.h> 61#include <dev/ic/ac97var.h> 62#include <dev/ic/mpuvar.h> 63 64#include <sys/bus.h> 65#include <sys/intr.h> 66 67#include <dev/microcode/yds/yds_hwmcode.h> 68#include <dev/pci/ydsreg.h> 69#include <dev/pci/ydsvar.h> 70 71/* Debug */ 72#undef YDS_USE_REC_SLOT 73#define YDS_USE_P44 74 75#ifdef AUDIO_DEBUG 76# define DPRINTF(x) if (ydsdebug) printf x 77# define DPRINTFN(n,x) if (ydsdebug>(n)) printf x 78int ydsdebug = 0; 79#else 80# define DPRINTF(x) 81# define DPRINTFN(n,x) 82#endif 83#ifdef YDS_USE_REC_SLOT 84# define YDS_INPUT_SLOT 0 /* REC slot = ADC + loopbacks */ 85#else 86# define YDS_INPUT_SLOT 1 /* ADC slot */ 87#endif 88 89static int yds_match(device_t, cfdata_t, void *); 90static void yds_attach(device_t, device_t, void *); 91static int yds_intr(void *); 92 93#define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 94#define KERNADDR(p) ((void *)((p)->addr)) 95 96static int yds_allocmem(struct yds_softc *, size_t, size_t, 97 struct yds_dma *); 98static int yds_freemem(struct yds_softc *, struct yds_dma *); 99 100#ifndef AUDIO_DEBUG 101#define YWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x)) 102#define YWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x)) 103#define YWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x)) 104#define YREAD1(sc, r) bus_space_read_1((sc)->memt, (sc)->memh, (r)) 105#define YREAD2(sc, r) bus_space_read_2((sc)->memt, (sc)->memh, (r)) 106#define YREAD4(sc, r) bus_space_read_4((sc)->memt, (sc)->memh, (r)) 107#else 108static uint16_t YREAD2(struct yds_softc *sc, bus_size_t r) 109{ 110 DPRINTFN(5, (" YREAD2(0x%lX)\n", (unsigned long)r)); 111 return bus_space_read_2(sc->memt, sc->memh, r); 112} 113 114static uint32_t YREAD4(struct yds_softc *sc, bus_size_t r) 115{ 116 DPRINTFN(5, (" YREAD4(0x%lX)\n", (unsigned long)r)); 117 return bus_space_read_4(sc->memt, sc->memh, r); 118} 119 120#ifdef notdef 121static void YWRITE1(struct yds_softc *sc, bus_size_t r, uint8_t x) 122{ 123 DPRINTFN(5, (" YWRITE1(0x%lX,0x%lX)\n", (unsigned long)r, 124 (unsigned long)x)); 125 bus_space_write_1(sc->memt, sc->memh, r, x); 126} 127#endif 128 129static void YWRITE2(struct yds_softc *sc, bus_size_t r, uint16_t x) 130{ 131 DPRINTFN(5, (" YWRITE2(0x%lX,0x%lX)\n", (unsigned long)r, 132 (unsigned long)x)); 133 bus_space_write_2(sc->memt, sc->memh, r, x); 134} 135 136static void YWRITE4(struct yds_softc *sc, bus_size_t r, uint32_t x) 137{ 138 DPRINTFN(5, (" YWRITE4(0x%lX,0x%lX)\n", (unsigned long)r, 139 (unsigned long)x)); 140 bus_space_write_4(sc->memt, sc->memh, r, x); 141} 142#endif 143 144#define YWRITEREGION4(sc, r, x, c) \ 145 bus_space_write_region_4((sc)->memt, (sc)->memh, (r), (x), (c) / 4) 146 147CFATTACH_DECL_NEW(yds, sizeof(struct yds_softc), 148 yds_match, yds_attach, NULL, NULL); 149 150static int yds_open(void *, int); 151static void yds_close(void *); 152static int yds_query_format(void *, audio_format_query_t *); 153static int yds_set_format(void *, int, 154 const audio_params_t *, const audio_params_t *, 155 audio_filter_reg_t *, audio_filter_reg_t *); 156static int yds_round_blocksize(void *, int, int, const audio_params_t *); 157static int yds_trigger_output(void *, void *, void *, int, 158 void (*)(void *), void *, 159 const audio_params_t *); 160static int yds_trigger_input(void *, void *, void *, int, 161 void (*)(void *), void *, 162 const audio_params_t *); 163static int yds_halt_output(void *); 164static int yds_halt_input(void *); 165static int yds_getdev(void *, struct audio_device *); 166static int yds_mixer_set_port(void *, mixer_ctrl_t *); 167static int yds_mixer_get_port(void *, mixer_ctrl_t *); 168static void * yds_malloc(void *, int, size_t); 169static void yds_free(void *, void *, size_t); 170static size_t yds_round_buffersize(void *, int, size_t); 171static int yds_get_props(void *); 172static int yds_query_devinfo(void *, mixer_devinfo_t *); 173static void yds_get_locks(void *, kmutex_t **, kmutex_t **); 174 175static int yds_attach_codec(void *, struct ac97_codec_if *); 176static int yds_read_codec(void *, uint8_t, uint16_t *); 177static int yds_write_codec(void *, uint8_t, uint16_t); 178static int yds_reset_codec(void *); 179 180static u_int yds_get_dstype(int); 181static int yds_download_mcode(struct yds_softc *); 182static int yds_allocate_slots(struct yds_softc *); 183static void yds_configure_legacy(device_t); 184static void yds_enable_dsp(struct yds_softc *); 185static int yds_disable_dsp(struct yds_softc *); 186static int yds_ready_codec(struct yds_codec_softc *); 187static int yds_halt(struct yds_softc *); 188static uint32_t yds_get_lpfq(u_int); 189static uint32_t yds_get_lpfk(u_int); 190static struct yds_dma *yds_find_dma(struct yds_softc *, void *); 191 192static int yds_init(struct yds_softc *); 193 194#ifdef AUDIO_DEBUG 195static void yds_dump_play_slot(struct yds_softc *, int); 196#define YDS_DUMP_PLAY_SLOT(n, sc, bank) \ 197 if (ydsdebug > (n)) yds_dump_play_slot(sc, bank) 198#else 199#define YDS_DUMP_PLAY_SLOT(n, sc, bank) 200#endif /* AUDIO_DEBUG */ 201 202static const struct audio_hw_if yds_hw_if = { 203 .open = yds_open, 204 .close = yds_close, 205 .query_format = yds_query_format, 206 .set_format = yds_set_format, 207 .round_blocksize = yds_round_blocksize, 208 .commit_settings = NULL, 209 .init_output = NULL, 210 .init_input = NULL, 211 .start_output = NULL, 212 .start_input = NULL, 213 .halt_output = yds_halt_output, 214 .halt_input = yds_halt_input, 215 .speaker_ctl = NULL, 216 .getdev = yds_getdev, 217 .set_port = yds_mixer_set_port, 218 .get_port = yds_mixer_get_port, 219 .query_devinfo = yds_query_devinfo, 220 .allocm = yds_malloc, 221 .freem = yds_free, 222 .round_buffersize = yds_round_buffersize, 223 .get_props = yds_get_props, 224 .trigger_output = yds_trigger_output, 225 .trigger_input = yds_trigger_input, 226 .dev_ioctl = NULL, 227 .get_locks = yds_get_locks, 228}; 229 230static const struct audio_device yds_device = { 231 .name = "Yamaha DS-1", 232 .version = "", 233 .config = "yds" 234}; 235 236static const struct { 237 uint id; 238 u_int flags; 239#define YDS_CAP_MCODE_1 0x0001 240#define YDS_CAP_MCODE_1E 0x0002 241#define YDS_CAP_LEGACY_SELECTABLE 0x0004 242#define YDS_CAP_LEGACY_FLEXIBLE 0x0008 243#define YDS_CAP_HAS_P44 0x0010 244} yds_chip_capabliity_list[] = { 245 { PCI_PRODUCT_YAMAHA_YMF724, 246 YDS_CAP_MCODE_1|YDS_CAP_LEGACY_SELECTABLE }, 247 /* 740[C] has only 32 slots. But anyway we use only 2 */ 248 { PCI_PRODUCT_YAMAHA_YMF740, 249 YDS_CAP_MCODE_1|YDS_CAP_LEGACY_SELECTABLE }, /* XXX NOT TESTED */ 250 { PCI_PRODUCT_YAMAHA_YMF740C, 251 YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_SELECTABLE }, 252 { PCI_PRODUCT_YAMAHA_YMF724F, 253 YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_SELECTABLE }, 254 { PCI_PRODUCT_YAMAHA_YMF744B, 255 YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_FLEXIBLE }, 256 { PCI_PRODUCT_YAMAHA_YMF754, 257 YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_FLEXIBLE|YDS_CAP_HAS_P44 }, 258 { 0, 0 } 259}; 260#ifdef AUDIO_DEBUG 261#define YDS_CAP_BITS "\020\005P44\004LEGFLEX\003LEGSEL\002MCODE1E\001MCODE1" 262#endif 263 264static const struct audio_format yds_formats[] = { 265 { 266 .mode = AUMODE_PLAY | AUMODE_RECORD, 267 .encoding = AUDIO_ENCODING_SLINEAR_LE, 268 .validbits = 16, 269 .precision = 16, 270 .channels = 2, 271 .channel_mask = AUFMT_STEREO, 272 .frequency_type = 8, 273 .frequency = 274 { 5512, 8000, 11025, 16000, 22050, 32000, 44100, 48000 }, 275 }, 276}; 277#define YDS_NFORMATS (sizeof(yds_formats) / sizeof(struct audio_format)) 278 279#ifdef AUDIO_DEBUG 280static void 281yds_dump_play_slot(struct yds_softc *sc, int bank) 282{ 283 int i, j; 284 uint32_t *p; 285 uint32_t num; 286 bus_addr_t pa; 287 288 for (i = 0; i < N_PLAY_SLOTS; i++) { 289 printf("pbankp[%d] = %p,", i*2, sc->pbankp[i*2]); 290 printf("pbankp[%d] = %p\n", i*2+1, sc->pbankp[i*2+1]); 291 } 292 293 pa = DMAADDR(&sc->sc_ctrldata) + sc->pbankoff; 294 p = sc->ptbl; 295 printf("ptbl + 0: %d\n", *p++); 296 for (i = 0; i < N_PLAY_SLOTS; i++) { 297 printf("ptbl + %d: %#x, should be %#" PRIxPADDR "\n", 298 i+1, *p, 299 pa + i * sizeof(struct play_slot_ctrl_bank) * 300 N_PLAY_SLOT_CTRL_BANK); 301 p++; 302 } 303 304 num = le32toh(*(uint32_t*)sc->ptbl); 305 printf("numofplay = %d\n", num); 306 307 for (i = 0; i < num; i++) { 308 p = (uint32_t *)sc->pbankp[i*2]; 309 310 printf(" pbankp[%d], bank 0 : %p\n", i*2, p); 311 for (j = 0; 312 j < sizeof(struct play_slot_ctrl_bank) / sizeof(uint32_t); 313 j++) { 314 printf(" 0x%02x: 0x%08x\n", 315 (unsigned)(j * sizeof(uint32_t)), 316 (unsigned)*p++); 317 } 318 319 p = (uint32_t *)sc->pbankp[i*2 + 1]; 320 printf(" pbankp[%d], bank 1 : %p\n", i*2 + 1, p); 321 for (j = 0; 322 j < sizeof(struct play_slot_ctrl_bank) / sizeof(uint32_t); 323 j++) { 324 printf(" 0x%02x: 0x%08x\n", 325 (unsigned)(j * sizeof(uint32_t)), 326 (unsigned)*p++); 327 } 328 } 329} 330#endif /* AUDIO_DEBUG */ 331 332static u_int 333yds_get_dstype(int id) 334{ 335 int i; 336 337 for (i = 0; yds_chip_capabliity_list[i].id; i++) { 338 if (PCI_PRODUCT(id) == yds_chip_capabliity_list[i].id) 339 return yds_chip_capabliity_list[i].flags; 340 } 341 342 return -1; 343} 344 345static int 346yds_download_mcode(struct yds_softc *sc) 347{ 348 static struct { 349 const uint32_t *mcode; 350 size_t size; 351 } ctrls[] = { 352 {yds_ds1_ctrl_mcode, sizeof(yds_ds1_ctrl_mcode)}, 353 {yds_ds1e_ctrl_mcode, sizeof(yds_ds1e_ctrl_mcode)}, 354 }; 355 u_int ctrl; 356 const uint32_t *p; 357 size_t size; 358 int dstype; 359 360 if (sc->sc_flags & YDS_CAP_MCODE_1) 361 dstype = YDS_DS_1; 362 else if (sc->sc_flags & YDS_CAP_MCODE_1E) 363 dstype = YDS_DS_1E; 364 else 365 return 1; /* unknown */ 366 367 if (yds_disable_dsp(sc)) 368 return 1; 369 370 /* Software reset */ 371 YWRITE4(sc, YDS_MODE, YDS_MODE_RESET); 372 YWRITE4(sc, YDS_MODE, 0); 373 374 YWRITE4(sc, YDS_MAPOF_REC, 0); 375 YWRITE4(sc, YDS_MAPOF_EFFECT, 0); 376 YWRITE4(sc, YDS_PLAY_CTRLBASE, 0); 377 YWRITE4(sc, YDS_REC_CTRLBASE, 0); 378 YWRITE4(sc, YDS_EFFECT_CTRLBASE, 0); 379 YWRITE4(sc, YDS_WORK_BASE, 0); 380 381 ctrl = YREAD2(sc, YDS_GLOBAL_CONTROL); 382 YWRITE2(sc, YDS_GLOBAL_CONTROL, ctrl & ~0x0007); 383 384 /* Download DSP microcode. */ 385 p = yds_dsp_mcode; 386 size = sizeof(yds_dsp_mcode); 387 YWRITEREGION4(sc, YDS_DSP_INSTRAM, p, size); 388 389 /* Download CONTROL microcode. */ 390 p = ctrls[dstype].mcode; 391 size = ctrls[dstype].size; 392 YWRITEREGION4(sc, YDS_CTRL_INSTRAM, p, size); 393 394 yds_enable_dsp(sc); 395 delay(10 * 1000); /* nessesary on my 724F (??) */ 396 397 return 0; 398} 399 400static int 401yds_allocate_slots(struct yds_softc *sc) 402{ 403 size_t pcs, rcs, ecs, ws, memsize; 404 void *mp; 405 uint32_t da; /* DMA address */ 406 char *va; /* KVA */ 407 off_t cb; 408 int i; 409 struct yds_dma *p; 410 411 /* Alloc DSP Control Data */ 412 pcs = YREAD4(sc, YDS_PLAY_CTRLSIZE) * sizeof(uint32_t); 413 rcs = YREAD4(sc, YDS_REC_CTRLSIZE) * sizeof(uint32_t); 414 ecs = YREAD4(sc, YDS_EFFECT_CTRLSIZE) * sizeof(uint32_t); 415 ws = WORK_SIZE; 416 YWRITE4(sc, YDS_WORK_SIZE, ws / sizeof(uint32_t)); 417 418 DPRINTF(("play control size : %d\n", (unsigned int)pcs)); 419 DPRINTF(("rec control size : %d\n", (unsigned int)rcs)); 420 DPRINTF(("eff control size : %d\n", (unsigned int)ecs)); 421#ifndef AUDIO_DEBUG 422 __USE(ecs); 423#endif 424 DPRINTF(("work size : %d\n", (unsigned int)ws)); 425#ifdef DIAGNOSTIC 426 if (pcs != sizeof(struct play_slot_ctrl_bank)) { 427 aprint_error_dev(sc->sc_dev, "invalid play slot ctrldata %d != %d\n", 428 (unsigned int)pcs, 429 (unsigned int)sizeof(struct play_slot_ctrl_bank)); 430 if (rcs != sizeof(struct rec_slot_ctrl_bank)) 431 aprint_error_dev(sc->sc_dev, "invalid rec slot ctrldata %d != %d\n", 432 (unsigned int)rcs, 433 (unsigned int)sizeof(struct rec_slot_ctrl_bank)); 434 } 435#endif 436 437 memsize = N_PLAY_SLOTS*N_PLAY_SLOT_CTRL_BANK*pcs + 438 N_REC_SLOT_CTRL*N_REC_SLOT_CTRL_BANK*rcs + ws; 439 memsize += (N_PLAY_SLOTS+1)*sizeof(uint32_t); 440 441 p = &sc->sc_ctrldata; 442 if (KERNADDR(p) == NULL) { 443 i = yds_allocmem(sc, memsize, 16, p); 444 if (i) { 445 aprint_error_dev(sc->sc_dev, "couldn't alloc/map DSP DMA buffer, reason %d\n", i); 446 return 1; 447 } 448 } 449 mp = KERNADDR(p); 450 da = DMAADDR(p); 451 452 DPRINTF(("mp:%p, DMA addr:%#" PRIxPADDR "\n", 453 mp, sc->sc_ctrldata.map->dm_segs[0].ds_addr)); 454 455 memset(mp, 0, memsize); 456 457 /* Work space */ 458 cb = 0; 459 va = (uint8_t *)mp; 460 YWRITE4(sc, YDS_WORK_BASE, da + cb); 461 cb += ws; 462 463 /* Play control data table */ 464 sc->ptbl = (uint32_t *)(va + cb); 465 sc->ptbloff = cb; 466 YWRITE4(sc, YDS_PLAY_CTRLBASE, da + cb); 467 cb += (N_PLAY_SLOT_CTRL + 1) * sizeof(uint32_t); 468 469 /* Record slot control data */ 470 sc->rbank = (struct rec_slot_ctrl_bank *)(va + cb); 471 YWRITE4(sc, YDS_REC_CTRLBASE, da + cb); 472 sc->rbankoff = cb; 473 cb += N_REC_SLOT_CTRL * N_REC_SLOT_CTRL_BANK * rcs; 474 475#if 0 476 /* Effect slot control data -- unused */ 477 YWRITE4(sc, YDS_EFFECT_CTRLBASE, da + cb); 478 cb += N_EFFECT_SLOT_CTRL * N_EFFECT_SLOT_CTRL_BANK * ecs; 479#endif 480 481 /* Play slot control data */ 482 sc->pbankoff = cb; 483 for (i=0; i < N_PLAY_SLOT_CTRL; i++) { 484 sc->pbankp[i*2] = (struct play_slot_ctrl_bank *)(va + cb); 485 *(sc->ptbl + i+1) = htole32(da + cb); 486 cb += pcs; 487 488 sc->pbankp[i*2+1] = (struct play_slot_ctrl_bank *)(va + cb); 489 cb += pcs; 490 } 491 /* Sync play control data table */ 492 bus_dmamap_sync(sc->sc_dmatag, p->map, 493 sc->ptbloff, (N_PLAY_SLOT_CTRL+1) * sizeof(uint32_t), 494 BUS_DMASYNC_PREWRITE); 495 496 return 0; 497} 498 499static void 500yds_enable_dsp(struct yds_softc *sc) 501{ 502 503 YWRITE4(sc, YDS_CONFIG, YDS_DSP_SETUP); 504} 505 506static int 507yds_disable_dsp(struct yds_softc *sc) 508{ 509 int to; 510 uint32_t data; 511 512 data = YREAD4(sc, YDS_CONFIG); 513 if (data) 514 YWRITE4(sc, YDS_CONFIG, YDS_DSP_DISABLE); 515 516 for (to = 0; to < YDS_WORK_TIMEOUT; to++) { 517 if ((YREAD4(sc, YDS_STATUS) & YDS_STAT_WORK) == 0) 518 return 0; 519 delay(1); 520 } 521 522 return 1; 523} 524 525static int 526yds_match(device_t parent, cfdata_t match, void *aux) 527{ 528 struct pci_attach_args *pa; 529 530 pa = (struct pci_attach_args *)aux; 531 switch (PCI_VENDOR(pa->pa_id)) { 532 case PCI_VENDOR_YAMAHA: 533 switch (PCI_PRODUCT(pa->pa_id)) { 534 case PCI_PRODUCT_YAMAHA_YMF724: 535 case PCI_PRODUCT_YAMAHA_YMF740: 536 case PCI_PRODUCT_YAMAHA_YMF740C: 537 case PCI_PRODUCT_YAMAHA_YMF724F: 538 case PCI_PRODUCT_YAMAHA_YMF744B: 539 case PCI_PRODUCT_YAMAHA_YMF754: 540 return 1; 541 } 542 break; 543 } 544 545 return 0; 546} 547 548/* 549 * This routine is called after all the ISA devices are configured, 550 * to avoid conflict. 551 */ 552static void 553yds_configure_legacy(device_t self) 554#define FLEXIBLE (sc->sc_flags & YDS_CAP_LEGACY_FLEXIBLE) 555#define SELECTABLE (sc->sc_flags & YDS_CAP_LEGACY_SELECTABLE) 556{ 557 static const bus_addr_t opl_addrs[] = {0x388, 0x398, 0x3A0, 0x3A8}; 558 static const bus_addr_t mpu_addrs[] = {0x330, 0x300, 0x332, 0x334}; 559 struct yds_softc *sc; 560 pcireg_t reg; 561 device_t dev; 562 int i; 563 564 sc = device_private(self); 565 if (!FLEXIBLE && !SELECTABLE) 566 return; 567 568 reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY); 569 reg &= ~0x8133c03f; /* these bits are out of interest */ 570 reg |= ((YDS_PCI_EX_LEGACY_IMOD) | 571 (YDS_PCI_LEGACY_FMEN | 572 YDS_PCI_LEGACY_MEN /*| YDS_PCI_LEGACY_MIEN*/)); 573 reg |= YDS_PCI_EX_LEGACY_SMOD_DISABLE; 574 if (FLEXIBLE) { 575 pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg); 576 delay(100*1000); 577 } 578 579 /* Look for OPL */ 580 dev = 0; 581 for (i = 0; i < sizeof(opl_addrs) / sizeof(bus_addr_t); i++) { 582 if (SELECTABLE) { 583 pci_conf_write(sc->sc_pc, sc->sc_pcitag, 584 YDS_PCI_LEGACY, reg | (i << (0+16))); 585 delay(100*1000); /* wait 100ms */ 586 } else 587 pci_conf_write(sc->sc_pc, sc->sc_pcitag, 588 YDS_PCI_FM_BA, opl_addrs[i]); 589 if (bus_space_map(sc->sc_opl_iot, 590 opl_addrs[i], 4, 0, &sc->sc_opl_ioh) == 0) { 591 struct audio_attach_args aa; 592 593 aa.type = AUDIODEV_TYPE_OPL; 594 aa.hwif = aa.hdl = NULL; 595 dev = config_found(self, &aa, audioprint, 596 CFARGS(.iattr = "yds")); 597 if (dev == 0) 598 bus_space_unmap(sc->sc_opl_iot, 599 sc->sc_opl_ioh, 4); 600 else { 601 if (SELECTABLE) 602 reg |= (i << (0+16)); 603 break; 604 } 605 } 606 } 607 if (dev == 0) { 608 reg &= ~YDS_PCI_LEGACY_FMEN; 609 pci_conf_write(sc->sc_pc, sc->sc_pcitag, 610 YDS_PCI_LEGACY, reg); 611 } else { 612 /* Max. volume */ 613 YWRITE4(sc, YDS_LEGACY_OUT_VOLUME, 0x3fff3fff); 614 YWRITE4(sc, YDS_LEGACY_REC_VOLUME, 0x3fff3fff); 615 } 616 617 /* Look for MPU */ 618 dev = NULL; 619 for (i = 0; i < sizeof(mpu_addrs) / sizeof(bus_addr_t); i++) { 620 if (SELECTABLE) 621 pci_conf_write(sc->sc_pc, sc->sc_pcitag, 622 YDS_PCI_LEGACY, reg | (i << (4+16))); 623 else 624 pci_conf_write(sc->sc_pc, sc->sc_pcitag, 625 YDS_PCI_MPU_BA, mpu_addrs[i]); 626 if (bus_space_map(sc->sc_mpu_iot, 627 mpu_addrs[i], 2, 0, &sc->sc_mpu_ioh) == 0) { 628 struct audio_attach_args aa; 629 630 aa.type = AUDIODEV_TYPE_MPU; 631 aa.hwif = aa.hdl = NULL; 632 dev = config_found(self, &aa, audioprint, 633 CFARGS(.iattr = "yds")); 634 if (dev == 0) 635 bus_space_unmap(sc->sc_mpu_iot, 636 sc->sc_mpu_ioh, 2); 637 else { 638 if (SELECTABLE) 639 reg |= (i << (4+16)); 640 break; 641 } 642 } 643 } 644 if (dev == 0) { 645 reg &= ~(YDS_PCI_LEGACY_MEN | YDS_PCI_LEGACY_MIEN); 646 pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg); 647 } 648 sc->sc_mpu = dev; 649} 650#undef FLEXIBLE 651#undef SELECTABLE 652 653static int 654yds_init(struct yds_softc *sc) 655{ 656 uint32_t reg; 657 658 DPRINTF(("yds_init()\n")); 659 660 /* Download microcode */ 661 if (yds_download_mcode(sc)) { 662 aprint_error_dev(sc->sc_dev, "download microcode failed\n"); 663 return 1; 664 } 665 666 /* Allocate DMA buffers */ 667 if (yds_allocate_slots(sc)) { 668 aprint_error_dev(sc->sc_dev, "could not allocate slots\n"); 669 return 1; 670 } 671 672 /* Warm reset */ 673 reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL); 674 pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL, 675 reg | YDS_DSCTRL_WRST); 676 delay(50000); 677 678 return 0; 679} 680 681static bool 682yds_suspend(device_t dv, const pmf_qual_t *qual) 683{ 684 struct yds_softc *sc = device_private(dv); 685 pci_chipset_tag_t pc = sc->sc_pc; 686 pcitag_t tag = sc->sc_pcitag; 687 688 mutex_enter(&sc->sc_lock); 689 mutex_spin_enter(&sc->sc_intr_lock); 690 sc->sc_enabled = 0; 691 sc->sc_dsctrl = pci_conf_read(pc, tag, YDS_PCI_DSCTRL); 692 sc->sc_legacy = pci_conf_read(pc, tag, YDS_PCI_LEGACY); 693 sc->sc_ba[0] = pci_conf_read(pc, tag, YDS_PCI_FM_BA); 694 sc->sc_ba[1] = pci_conf_read(pc, tag, YDS_PCI_MPU_BA); 695 mutex_spin_exit(&sc->sc_intr_lock); 696 mutex_exit(&sc->sc_lock); 697 698 return true; 699} 700 701static bool 702yds_resume(device_t dv, const pmf_qual_t *qual) 703{ 704 struct yds_softc *sc = device_private(dv); 705 pci_chipset_tag_t pc = sc->sc_pc; 706 pcitag_t tag = sc->sc_pcitag; 707 pcireg_t reg; 708 709 /* Disable legacy mode */ 710 mutex_enter(&sc->sc_lock); 711 mutex_spin_enter(&sc->sc_intr_lock); 712 reg = pci_conf_read(pc, tag, YDS_PCI_LEGACY); 713 pci_conf_write(pc, tag, YDS_PCI_LEGACY, reg & YDS_PCI_LEGACY_LAD); 714 715 /* Enable the device. */ 716 reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 717 reg |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 718 PCI_COMMAND_MASTER_ENABLE); 719 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, reg); 720 reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 721 mutex_spin_exit(&sc->sc_intr_lock); 722 if (yds_init(sc)) { 723 aprint_error_dev(dv, "reinitialize failed\n"); 724 mutex_exit(&sc->sc_lock); 725 return false; 726 } 727 728 pci_conf_write(pc, tag, YDS_PCI_DSCTRL, sc->sc_dsctrl); 729 sc->sc_enabled = 1; 730 sc->sc_codec[0].codec_if->vtbl->restore_ports(sc->sc_codec[0].codec_if); 731 mutex_exit(&sc->sc_lock); 732 733 return true; 734} 735 736static void 737yds_attach(device_t parent, device_t self, void *aux) 738{ 739 struct yds_softc *sc; 740 struct pci_attach_args *pa; 741 pci_chipset_tag_t pc; 742 char const *intrstr; 743 pci_intr_handle_t ih; 744 pcireg_t reg; 745 struct yds_codec_softc *codec; 746 int i, r, to; 747 int revision; 748 int ac97_id2; 749 char intrbuf[PCI_INTRSTR_LEN]; 750 751 sc = device_private(self); 752 sc->sc_dev = self; 753 pa = (struct pci_attach_args *)aux; 754 pc = pa->pa_pc; 755 revision = PCI_REVISION(pa->pa_class); 756 757 pci_aprint_devinfo(pa, NULL); 758 759 /* Map register to memory */ 760 if (pci_mapreg_map(pa, YDS_PCI_MBA, PCI_MAPREG_TYPE_MEM, 0, 761 &sc->memt, &sc->memh, NULL, NULL)) { 762 aprint_error_dev(self, "can't map memory space\n"); 763 return; 764 } 765 766 /* Map and establish the interrupt. */ 767 if (pci_intr_map(pa, &ih)) { 768 aprint_error_dev(self, "couldn't map interrupt\n"); 769 return; 770 } 771 772 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 773 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); 774 775 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 776 sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_AUDIO, yds_intr, sc, 777 device_xname(self)); 778 if (sc->sc_ih == NULL) { 779 aprint_error_dev(self, "couldn't establish interrupt"); 780 if (intrstr != NULL) 781 aprint_error(" at %s", intrstr); 782 aprint_error("\n"); 783 mutex_destroy(&sc->sc_lock); 784 mutex_destroy(&sc->sc_intr_lock); 785 return; 786 } 787 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 788 789 sc->sc_enabled = 0; 790 sc->sc_dmatag = pa->pa_dmat; 791 sc->sc_pc = pc; 792 sc->sc_pcitag = pa->pa_tag; 793 sc->sc_id = pa->pa_id; 794 sc->sc_revision = revision; 795 sc->sc_flags = yds_get_dstype(sc->sc_id); 796#ifdef AUDIO_DEBUG 797 if (ydsdebug) { 798 char bits[80]; 799 800 snprintb(bits, sizeof(bits), YDS_CAP_BITS, sc->sc_flags); 801 printf("%s: chip has %s\n", device_xname(self), bits); 802 } 803#endif 804 805 /* Disable legacy mode */ 806 reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_LEGACY); 807 pci_conf_write(pc, pa->pa_tag, YDS_PCI_LEGACY, 808 reg & YDS_PCI_LEGACY_LAD); 809 810 /* Enable the device. */ 811 reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 812 reg |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 813 PCI_COMMAND_MASTER_ENABLE); 814 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg); 815 reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 816 817 /* Mute all volumes */ 818 for (i = 0x80; i < 0xc0; i += 2) 819 YWRITE2(sc, i, 0); 820 821 /* Initialize the device */ 822 if (yds_init(sc)) { 823 aprint_error_dev(self, "initialize failed\n"); 824 mutex_destroy(&sc->sc_lock); 825 mutex_destroy(&sc->sc_intr_lock); 826 return; 827 } 828 829 /* 830 * Detect primary/secondary AC97 831 * YMF754 Hardware Specification Rev 1.01 page 24 832 */ 833 reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_DSCTRL); 834 pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST); 835 delay(400000); /* Needed for 740C. */ 836 837 /* Primary */ 838 for (to = 0; to < AC97_TIMEOUT; to++) { 839 if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0) 840 break; 841 delay(1); 842 } 843 if (to == AC97_TIMEOUT) { 844 aprint_error_dev(self, "no AC97 available\n"); 845 mutex_destroy(&sc->sc_lock); 846 mutex_destroy(&sc->sc_intr_lock); 847 return; 848 } 849 850 /* Secondary */ 851 /* Secondary AC97 is used for 4ch audio. Currently unused. */ 852 ac97_id2 = -1; 853 if ((YREAD2(sc, YDS_ACTIVITY) & YDS_ACTIVITY_DOCKA) == 0) 854 goto detected; 855#if 0 /* reset secondary... */ 856 YWRITE2(sc, YDS_GPIO_OCTRL, 857 YREAD2(sc, YDS_GPIO_OCTRL) & ~YDS_GPIO_GPO2); 858 YWRITE2(sc, YDS_GPIO_FUNCE, 859 (YREAD2(sc, YDS_GPIO_FUNCE)&(~YDS_GPIO_GPC2))|YDS_GPIO_GPE2); 860#endif 861 for (to = 0; to < AC97_TIMEOUT; to++) { 862 if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY) == 0) 863 break; 864 delay(1); 865 } 866 if (to < AC97_TIMEOUT) { 867 /* detect id */ 868 for (ac97_id2 = 1; ac97_id2 < 4; ac97_id2++) { 869 YWRITE2(sc, AC97_CMD_ADDR, 870 AC97_CMD_READ | AC97_ID(ac97_id2) | 0x28); 871 872 for (to = 0; to < AC97_TIMEOUT; to++) { 873 if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY) 874 == 0) 875 goto detected; 876 delay(1); 877 } 878 } 879 if (ac97_id2 == 4) 880 ac97_id2 = -1; 881detected: 882 ; 883 } 884 885 pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg | YDS_DSCTRL_CRST); 886 delay (20); 887 pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST); 888 delay (400000); 889 for (to = 0; to < AC97_TIMEOUT; to++) { 890 if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0) 891 break; 892 delay(1); 893 } 894 895 /* 896 * Attach ac97 codec 897 */ 898 for (i = 0; i < 2; i++) { 899 static struct { 900 int data; 901 int addr; 902 } statregs[] = { 903 {AC97_STAT_DATA1, AC97_STAT_ADDR1}, 904 {AC97_STAT_DATA2, AC97_STAT_ADDR2}, 905 }; 906 907 if (i == 1 && ac97_id2 == -1) 908 break; /* secondary ac97 not available */ 909 910 codec = &sc->sc_codec[i]; 911 codec->sc = sc; 912 codec->id = i == 1 ? ac97_id2 : 0; 913 codec->status_data = statregs[i].data; 914 codec->status_addr = statregs[i].addr; 915 codec->host_if.arg = codec; 916 codec->host_if.attach = yds_attach_codec; 917 codec->host_if.read = yds_read_codec; 918 codec->host_if.write = yds_write_codec; 919 codec->host_if.reset = yds_reset_codec; 920 921 r = ac97_attach(&codec->host_if, self, &sc->sc_lock); 922 if (r != 0) { 923 aprint_error_dev(self, 924 "can't attach codec (error 0x%X)\n", r); 925 mutex_destroy(&sc->sc_lock); 926 mutex_destroy(&sc->sc_intr_lock); 927 return; 928 } 929 } 930 931 audio_attach_mi(&yds_hw_if, sc, self); 932 933 sc->sc_legacy_iot = pa->pa_iot; 934 config_defer(self, yds_configure_legacy); 935 936 if (!pmf_device_register(self, yds_suspend, yds_resume)) 937 aprint_error_dev(self, "couldn't establish power handler\n"); 938 939 mutex_spin_enter(&sc->sc_intr_lock); 940 sc->sc_enabled = 1; 941 mutex_spin_exit(&sc->sc_intr_lock); 942} 943 944static int 945yds_attach_codec(void *sc_, struct ac97_codec_if *codec_if) 946{ 947 struct yds_codec_softc *sc; 948 949 sc = sc_; 950 sc->codec_if = codec_if; 951 return 0; 952} 953 954static int 955yds_ready_codec(struct yds_codec_softc *sc) 956{ 957 int to; 958 959 for (to = 0; to < AC97_TIMEOUT; to++) { 960 if ((YREAD2(sc->sc, sc->status_addr) & AC97_BUSY) == 0) 961 return 0; 962 delay(1); 963 } 964 965 return 1; 966} 967 968static int 969yds_read_codec(void *sc_, uint8_t reg, uint16_t *data) 970{ 971 struct yds_codec_softc *sc; 972 973 sc = sc_; 974 YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_READ | AC97_ID(sc->id) | reg); 975 976 if (yds_ready_codec(sc)) { 977 aprint_error_dev(sc->sc->sc_dev, "yds_read_codec timeout\n"); 978 return EIO; 979 } 980 981 if (PCI_PRODUCT(sc->sc->sc_id) == PCI_PRODUCT_YAMAHA_YMF744B && 982 sc->sc->sc_revision < 2) { 983 int i; 984 for (i=0; i<600; i++) 985 (void)YREAD2(sc->sc, sc->status_data); 986 } 987 988 *data = YREAD2(sc->sc, sc->status_data); 989 990 return 0; 991} 992 993static int 994yds_write_codec(void *sc_, uint8_t reg, uint16_t data) 995{ 996 struct yds_codec_softc *sc; 997 998 sc = sc_; 999 YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_WRITE | AC97_ID(sc->id) | reg); 1000 YWRITE2(sc->sc, AC97_CMD_DATA, data); 1001 1002 if (yds_ready_codec(sc)) { 1003 aprint_error_dev(sc->sc->sc_dev, "yds_write_codec timeout\n"); 1004 return EIO; 1005 } 1006 1007 return 0; 1008} 1009 1010/* 1011 * XXX: Must handle the secondary differently!! 1012 */ 1013static int 1014yds_reset_codec(void *sc_) 1015{ 1016 struct yds_codec_softc *codec; 1017 struct yds_softc *sc; 1018 pcireg_t reg; 1019 1020 codec = sc_; 1021 sc = codec->sc; 1022 /* reset AC97 codec */ 1023 reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL); 1024 if (reg & 0x03) { 1025 pci_conf_write(sc->sc_pc, sc->sc_pcitag, 1026 YDS_PCI_DSCTRL, reg & ~0x03); 1027 pci_conf_write(sc->sc_pc, sc->sc_pcitag, 1028 YDS_PCI_DSCTRL, reg | 0x03); 1029 pci_conf_write(sc->sc_pc, sc->sc_pcitag, 1030 YDS_PCI_DSCTRL, reg & ~0x03); 1031 delay(50000); 1032 } 1033 1034 yds_ready_codec(sc_); 1035 return 0; 1036} 1037 1038static int 1039yds_intr(void *p) 1040{ 1041 struct yds_softc *sc = p; 1042#if NMPU > 0 1043 struct mpu_softc *sc_mpu = device_private(sc->sc_mpu); 1044#endif 1045 u_int status; 1046 1047 mutex_spin_enter(&sc->sc_intr_lock); 1048 if (!sc->sc_enabled) { 1049 mutex_spin_exit(&sc->sc_intr_lock); 1050 return 0; 1051 } 1052 1053 status = YREAD4(sc, YDS_STATUS); 1054 DPRINTFN(1, ("yds_intr: status=%08x\n", status)); 1055 if ((status & (YDS_STAT_INT|YDS_STAT_TINT)) == 0) { 1056#if NMPU > 0 1057 if (sc_mpu) 1058 return mpu_intr(sc_mpu); 1059#endif 1060 mutex_spin_exit(&sc->sc_intr_lock); 1061 return 0; 1062 } 1063 1064 if (status & YDS_STAT_TINT) { 1065 YWRITE4(sc, YDS_STATUS, YDS_STAT_TINT); 1066 printf ("yds_intr: timeout!\n"); 1067 } 1068 1069 /* 1070 * XXX 1071 * An interrupt in YMF754 occurs when next hardware frame is 1072 * requested, not when current hardware frame processing is 1073 * completed. According to the datasheet, only access to the 1074 * inactive bank is permitted, but in fact, fields in inactive 1075 * bank that the chip should write to may or may not be filled 1076 * at that time. On the other hand, both the CPU and the device 1077 * must guarantee that the fields in active bank are determined 1078 * at the beginning of the interrupt. 1079 * Therefore, we read active bank. 1080 */ 1081 1082 if (status & YDS_STAT_INT) { 1083 int nbank; 1084 u_int pdma = 0; 1085 u_int rdma = 0; 1086 1087 /* nbank is bank number that YDS is processing now. */ 1088 nbank = YREAD4(sc, YDS_CONTROL_SELECT) & 1; 1089 1090 /* Clear interrupt flag */ 1091 YWRITE4(sc, YDS_STATUS, YDS_STAT_INT); 1092 1093 /* Read current data offset before ACTV2 */ 1094 if (sc->sc_play.intr) { 1095 /* Sync play slot control data */ 1096 bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map, 1097 sc->pbankoff, 1098 sizeof(struct play_slot_ctrl_bank)* 1099 le32toh(*sc->ptbl)* 1100 N_PLAY_SLOT_CTRL_BANK, 1101 BUS_DMASYNC_POSTWRITE| 1102 BUS_DMASYNC_POSTREAD); 1103 /* start offset of current processing bank */ 1104 pdma = le32toh(sc->pbankp[nbank]->pgstart) * 1105 sc->sc_play.factor; 1106 } 1107 1108 if (sc->sc_rec.intr) { 1109 /* Sync rec slot control data */ 1110 bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map, 1111 sc->rbankoff, 1112 sizeof(struct rec_slot_ctrl_bank)* 1113 N_REC_SLOT_CTRL* 1114 N_REC_SLOT_CTRL_BANK, 1115 BUS_DMASYNC_POSTWRITE| 1116 BUS_DMASYNC_POSTREAD); 1117 /* start offset of current processing bank */ 1118 rdma = le32toh( 1119 sc->rbank[YDS_INPUT_SLOT * 2 + nbank].pgstartadr); 1120 } 1121 1122 /* Buffer for the next frame is always ready. */ 1123 YWRITE4(sc, YDS_MODE, YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV2); 1124 1125 if (sc->sc_play.intr) { 1126 if (pdma < sc->sc_play.offset) 1127 pdma += sc->sc_play.length; 1128 if (pdma >= sc->sc_play.offset + sc->sc_play.blksize) { 1129 /* We can fill the next block */ 1130 /* Sync ring buffer for previous write */ 1131 bus_dmamap_sync(sc->sc_dmatag, 1132 sc->sc_play.dma->map, 1133 0, sc->sc_play.length, 1134 BUS_DMASYNC_POSTWRITE); 1135 sc->sc_play.intr(sc->sc_play.intr_arg); 1136 sc->sc_play.offset += sc->sc_play.blksize; 1137 if (sc->sc_play.offset >= sc->sc_play.length) { 1138 sc->sc_play.offset -= sc->sc_play.length; 1139#ifdef DIAGNOSTIC 1140 if (sc->sc_play.offset != 0) 1141 printf ("Audio ringbuffer botch\n"); 1142#endif 1143 } 1144 /* Sync ring buffer for next write */ 1145 bus_dmamap_sync(sc->sc_dmatag, 1146 sc->sc_play.dma->map, 1147 0, sc->sc_play.length, 1148 BUS_DMASYNC_PREWRITE); 1149 } 1150 } 1151 if (sc->sc_rec.intr) { 1152 if (rdma < sc->sc_rec.offset) 1153 rdma += sc->sc_rec.length; 1154 if (rdma >= sc->sc_rec.offset + sc->sc_rec.blksize) { 1155 /* We can drain the current block */ 1156 /* Sync ring buffer first */ 1157 bus_dmamap_sync(sc->sc_dmatag, 1158 sc->sc_rec.dma->map, 1159 0, sc->sc_rec.length, 1160 BUS_DMASYNC_POSTREAD); 1161 sc->sc_rec.intr(sc->sc_rec.intr_arg); 1162 sc->sc_rec.offset += sc->sc_rec.blksize; 1163 if (sc->sc_rec.offset >= sc->sc_rec.length) { 1164 sc->sc_rec.offset -= sc->sc_rec.length; 1165#ifdef DIAGNOSTIC 1166 if (sc->sc_rec.offset != 0) 1167 printf ("Audio ringbuffer botch\n"); 1168#endif 1169 } 1170 /* Sync ring buffer for next read */ 1171 bus_dmamap_sync(sc->sc_dmatag, 1172 sc->sc_rec.dma->map, 1173 0, sc->sc_rec.length, 1174 BUS_DMASYNC_PREREAD); 1175 } 1176 } 1177 } 1178 1179 mutex_spin_exit(&sc->sc_intr_lock); 1180 return 1; 1181} 1182 1183static int 1184yds_allocmem(struct yds_softc *sc, size_t size, size_t align, struct yds_dma *p) 1185{ 1186 int error; 1187 1188 p->size = size; 1189 error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0, 1190 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1191 &p->nsegs, BUS_DMA_WAITOK); 1192 if (error) 1193 return error; 1194 1195 error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size, 1196 &p->addr, BUS_DMA_WAITOK|BUS_DMA_COHERENT); 1197 if (error) 1198 goto free; 1199 1200 error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size, 1201 0, BUS_DMA_WAITOK, &p->map); 1202 if (error) 1203 goto unmap; 1204 1205 error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL, 1206 BUS_DMA_WAITOK); 1207 if (error) 1208 goto destroy; 1209 return 0; 1210 1211destroy: 1212 bus_dmamap_destroy(sc->sc_dmatag, p->map); 1213unmap: 1214 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 1215free: 1216 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 1217 return error; 1218} 1219 1220static int 1221yds_freemem(struct yds_softc *sc, struct yds_dma *p) 1222{ 1223 1224 bus_dmamap_unload(sc->sc_dmatag, p->map); 1225 bus_dmamap_destroy(sc->sc_dmatag, p->map); 1226 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 1227 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 1228 return 0; 1229} 1230 1231static int 1232yds_open(void *addr, int flags) 1233{ 1234 struct yds_softc *sc; 1235 uint32_t mode; 1236 1237 sc = addr; 1238 /* Select bank 0. */ 1239 YWRITE4(sc, YDS_CONTROL_SELECT, 0); 1240 1241 /* Start the DSP operation. */ 1242 mode = YREAD4(sc, YDS_MODE); 1243 mode |= YDS_MODE_ACTV; 1244 mode &= ~YDS_MODE_ACTV2; 1245 YWRITE4(sc, YDS_MODE, mode); 1246 1247 return 0; 1248} 1249 1250static void 1251yds_close(void *addr) 1252{ 1253 1254 yds_halt(addr); 1255} 1256 1257static int 1258yds_query_format(void *addr, audio_format_query_t *afp) 1259{ 1260 1261 return audio_query_format(yds_formats, YDS_NFORMATS, afp); 1262} 1263 1264static int 1265yds_set_format(void *addr, int setmode, 1266 const audio_params_t *play, const audio_params_t *rec, 1267 audio_filter_reg_t *pfil, audio_filter_reg_t *rfil) 1268{ 1269 return 0; 1270} 1271 1272static int 1273yds_round_blocksize(void *addr, int blk, int mode, 1274 const audio_params_t *param) 1275{ 1276 1277 /* 1278 * Block size must be bigger than a frame. 1279 * That is 1024bytes at most, i.e. for 48000Hz, 16bit, 2ch. 1280 */ 1281 if (blk < 1024) 1282 blk = 1024; 1283 1284 return blk; 1285} 1286 1287static uint32_t 1288yds_get_lpfq(u_int sample_rate) 1289{ 1290 int i; 1291 static struct lpfqt { 1292 u_int rate; 1293 uint32_t lpfq; 1294 } lpfqt[] = { 1295 {8000, 0x32020000}, 1296 {11025, 0x31770000}, 1297 {16000, 0x31390000}, 1298 {22050, 0x31c90000}, 1299 {32000, 0x33d00000}, 1300 {48000, 0x40000000}, 1301 {0, 0} 1302 }; 1303 1304 if (sample_rate == 44100) /* for P44 slot? */ 1305 return 0x370A0000; 1306 1307 for (i = 0; lpfqt[i].rate != 0; i++) 1308 if (sample_rate <= lpfqt[i].rate) 1309 break; 1310 1311 return lpfqt[i].lpfq; 1312} 1313 1314static uint32_t 1315yds_get_lpfk(u_int sample_rate) 1316{ 1317 int i; 1318 static struct lpfkt { 1319 u_int rate; 1320 uint32_t lpfk; 1321 } lpfkt[] = { 1322 {8000, 0x18b20000}, 1323 {11025, 0x20930000}, 1324 {16000, 0x2b9a0000}, 1325 {22050, 0x35a10000}, 1326 {32000, 0x3eaa0000}, 1327 {48000, 0x40000000}, 1328 {0, 0} 1329 }; 1330 1331 if (sample_rate == 44100) /* for P44 slot? */ 1332 return 0x46460000; 1333 1334 for (i = 0; lpfkt[i].rate != 0; i++) 1335 if (sample_rate <= lpfkt[i].rate) 1336 break; 1337 1338 return lpfkt[i].lpfk; 1339} 1340 1341static int 1342yds_trigger_output(void *addr, void *start, void *end, int blksize, 1343 void (*intr)(void *), void *arg, const audio_params_t *param) 1344#define P44 (sc->sc_flags & YDS_CAP_HAS_P44) 1345{ 1346 struct yds_softc *sc; 1347 struct yds_dma *p; 1348 struct play_slot_ctrl_bank *psb; 1349 const u_int gain = 0x40000000; 1350 bus_addr_t s; 1351 size_t l; 1352 int i; 1353 int p44, channels; 1354 uint32_t format; 1355 1356 sc = addr; 1357#ifdef DIAGNOSTIC 1358 if (sc->sc_play.intr) 1359 panic("yds_trigger_output: already running"); 1360#endif 1361 1362 sc->sc_play.intr = intr; 1363 sc->sc_play.intr_arg = arg; 1364 sc->sc_play.offset = 0; 1365 sc->sc_play.blksize = blksize; 1366 1367 DPRINTFN(1, ("yds_trigger_output: sc=%p start=%p end=%p " 1368 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1369 1370 p = yds_find_dma(sc, start); 1371 if (!p) { 1372 printf("yds_trigger_output: bad addr %p\n", start); 1373 return EINVAL; 1374 } 1375 sc->sc_play.dma = p; 1376 1377#ifdef YDS_USE_P44 1378 /* The document says the P44 SRC supports only stereo, 16bit PCM. */ 1379 if (P44) 1380 p44 = ((param->sample_rate == 44100) && 1381 (param->channels == 2) && 1382 (param->precision == 16)); 1383 else 1384#endif 1385 p44 = 0; 1386 channels = p44 ? 1 : param->channels; 1387 1388 s = DMAADDR(p); 1389 l = ((char *)end - (char *)start); 1390 sc->sc_play.length = l; 1391 1392 *sc->ptbl = htole32(channels); /* Num of play */ 1393 1394 sc->sc_play.factor = 1; 1395 if (param->channels == 2) 1396 sc->sc_play.factor *= 2; 1397 if (param->precision != 8) 1398 sc->sc_play.factor *= 2; 1399 l /= sc->sc_play.factor; 1400 1401 format = ((channels == 2 ? PSLT_FORMAT_STEREO : 0) | 1402 (param->precision == 8 ? PSLT_FORMAT_8BIT : 0) | 1403 (p44 ? PSLT_FORMAT_SRC441 : 0)); 1404 1405 psb = sc->pbankp[0]; 1406 memset(psb, 0, sizeof(*psb)); 1407 psb->format = htole32(format); 1408 psb->pgbase = htole32(s); 1409 psb->pgloopend = htole32(l); 1410 if (!p44) { 1411 psb->pgdeltaend = htole32((param->sample_rate * 65536 / 48000) << 12); 1412 psb->lpfkend = htole32(yds_get_lpfk(param->sample_rate)); 1413 psb->eggainend = htole32(gain); 1414 psb->lpfq = htole32(yds_get_lpfq(param->sample_rate)); 1415 psb->pgdelta = htole32(psb->pgdeltaend); 1416 psb->lpfk = htole32(yds_get_lpfk(param->sample_rate)); 1417 psb->eggain = htole32(gain); 1418 } 1419 1420 for (i = 0; i < channels; i++) { 1421 /* i == 0: left or mono, i == 1: right */ 1422 psb = sc->pbankp[i*2]; 1423 if (i) 1424 /* copy from left */ 1425 *psb = *(sc->pbankp[0]); 1426 if (channels == 2) { 1427 /* stereo */ 1428 if (i == 0) { 1429 psb->lchgain = psb->lchgainend = htole32(gain); 1430 } else { 1431 psb->lchgain = psb->lchgainend = 0; 1432 psb->rchgain = psb->rchgainend = htole32(gain); 1433 psb->format |= htole32(PSLT_FORMAT_RCH); 1434 } 1435 } else if (!p44) { 1436 /* mono */ 1437 psb->lchgain = psb->rchgain = htole32(gain); 1438 psb->lchgainend = psb->rchgainend = htole32(gain); 1439 } 1440 /* copy to the other bank */ 1441 *(sc->pbankp[i*2+1]) = *psb; 1442 } 1443 1444 YDS_DUMP_PLAY_SLOT(5, sc, 0); 1445 YDS_DUMP_PLAY_SLOT(5, sc, 1); 1446 1447 if (p44) 1448 YWRITE4(sc, YDS_P44_OUT_VOLUME, 0x3fff3fff); 1449 else 1450 YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0x3fff3fff); 1451 1452 /* Now the play slot for the next frame is set up!! */ 1453 /* Sync play slot control data for both directions */ 1454 bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map, 1455 sc->pbankoff, 1456 sizeof(struct play_slot_ctrl_bank) * 1457 channels * N_PLAY_SLOT_CTRL_BANK, 1458 BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD); 1459 /* Sync ring buffer */ 1460 bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize, 1461 BUS_DMASYNC_PREWRITE); 1462 /* HERE WE GO!! */ 1463 YWRITE4(sc, YDS_MODE, 1464 YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2); 1465 1466 return 0; 1467} 1468#undef P44 1469 1470static int 1471yds_trigger_input(void *addr, void *start, void *end, int blksize, 1472 void (*intr)(void *), void *arg, const audio_params_t *param) 1473{ 1474 struct yds_softc *sc; 1475 struct yds_dma *p; 1476 u_int srate, format; 1477 struct rec_slot_ctrl_bank *rsb; 1478 bus_addr_t s; 1479 size_t l; 1480 1481 sc = addr; 1482#ifdef DIAGNOSTIC 1483 if (sc->sc_rec.intr) 1484 panic("yds_trigger_input: already running"); 1485#endif 1486 sc->sc_rec.intr = intr; 1487 sc->sc_rec.intr_arg = arg; 1488 sc->sc_rec.offset = 0; 1489 sc->sc_rec.blksize = blksize; 1490 1491 DPRINTFN(1, ("yds_trigger_input: " 1492 "sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 1493 addr, start, end, blksize, intr, arg)); 1494 DPRINTFN(1, (" parameters: rate=%u, precision=%u, channels=%u\n", 1495 param->sample_rate, param->precision, param->channels)); 1496 1497 p = yds_find_dma(sc, start); 1498 if (!p) { 1499 printf("yds_trigger_input: bad addr %p\n", start); 1500 return EINVAL; 1501 } 1502 sc->sc_rec.dma = p; 1503 1504 s = DMAADDR(p); 1505 l = ((char *)end - (char *)start); 1506 sc->sc_rec.length = l; 1507 1508 sc->sc_rec.factor = 1; 1509 if (param->channels == 2) 1510 sc->sc_rec.factor *= 2; 1511 if (param->precision != 8) 1512 sc->sc_rec.factor *= 2; 1513 1514 rsb = &sc->rbank[0]; 1515 memset(rsb, 0, sizeof(*rsb)); 1516 rsb->pgbase = htole32(s); 1517 rsb->pgloopendadr = htole32(l); 1518 /* Seems all 4 banks must be set up... */ 1519 sc->rbank[1] = *rsb; 1520 sc->rbank[2] = *rsb; 1521 sc->rbank[3] = *rsb; 1522 1523 YWRITE4(sc, YDS_ADC_IN_VOLUME, 0x3fff3fff); 1524 YWRITE4(sc, YDS_REC_IN_VOLUME, 0x3fff3fff); 1525 srate = 48000 * 4096 / param->sample_rate - 1; 1526 format = ((param->precision == 8 ? YDS_FORMAT_8BIT : 0) | 1527 (param->channels == 2 ? YDS_FORMAT_STEREO : 0)); 1528 DPRINTF(("srate=%d, format=%08x\n", srate, format)); 1529#ifdef YDS_USE_REC_SLOT 1530 YWRITE4(sc, YDS_DAC_REC_VOLUME, 0x3fff3fff); 1531 YWRITE4(sc, YDS_P44_REC_VOLUME, 0x3fff3fff); 1532 YWRITE4(sc, YDS_MAPOF_REC, YDS_RECSLOT_VALID); 1533 YWRITE4(sc, YDS_REC_SAMPLE_RATE, srate); 1534 YWRITE4(sc, YDS_REC_FORMAT, format); 1535#else 1536 YWRITE4(sc, YDS_MAPOF_REC, YDS_ADCSLOT_VALID); 1537 YWRITE4(sc, YDS_ADC_SAMPLE_RATE, srate); 1538 YWRITE4(sc, YDS_ADC_FORMAT, format); 1539#endif 1540 /* Now the rec slot for the next frame is set up!! */ 1541 /* Sync record slot control data */ 1542 bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map, 1543 sc->rbankoff, 1544 sizeof(struct rec_slot_ctrl_bank)* 1545 N_REC_SLOT_CTRL* 1546 N_REC_SLOT_CTRL_BANK, 1547 BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD); 1548 /* Sync ring buffer */ 1549 bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize, 1550 BUS_DMASYNC_PREREAD); 1551 /* HERE WE GO!! */ 1552 YWRITE4(sc, YDS_MODE, 1553 YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2); 1554 1555 return 0; 1556} 1557 1558static int 1559yds_halt(struct yds_softc *sc) 1560{ 1561 uint32_t mode; 1562 1563 /* Stop the DSP operation. */ 1564 mode = YREAD4(sc, YDS_MODE); 1565 YWRITE4(sc, YDS_MODE, mode & ~(YDS_MODE_ACTV|YDS_MODE_ACTV2)); 1566 1567 /* Paranoia... mute all */ 1568 YWRITE4(sc, YDS_P44_OUT_VOLUME, 0); 1569 YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0); 1570 YWRITE4(sc, YDS_ADC_IN_VOLUME, 0); 1571 YWRITE4(sc, YDS_REC_IN_VOLUME, 0); 1572 YWRITE4(sc, YDS_DAC_REC_VOLUME, 0); 1573 YWRITE4(sc, YDS_P44_REC_VOLUME, 0); 1574 1575 return 0; 1576} 1577 1578static int 1579yds_halt_output(void *addr) 1580{ 1581 struct yds_softc *sc; 1582 1583 DPRINTF(("yds: yds_halt_output\n")); 1584 sc = addr; 1585 if (sc->sc_play.intr) { 1586 sc->sc_play.intr = 0; 1587 /* Sync play slot control data */ 1588 bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map, 1589 sc->pbankoff, 1590 sizeof(struct play_slot_ctrl_bank)* 1591 (*sc->ptbl)*N_PLAY_SLOT_CTRL_BANK, 1592 BUS_DMASYNC_POSTWRITE|BUS_DMASYNC_POSTREAD); 1593 /* Stop the play slot operation */ 1594 sc->pbankp[0]->status = 1595 sc->pbankp[1]->status = 1596 sc->pbankp[2]->status = 1597 sc->pbankp[3]->status = 1; 1598 /* Sync ring buffer */ 1599 bus_dmamap_sync(sc->sc_dmatag, sc->sc_play.dma->map, 1600 0, sc->sc_play.length, BUS_DMASYNC_POSTWRITE); 1601 } 1602 1603 return 0; 1604} 1605 1606static int 1607yds_halt_input(void *addr) 1608{ 1609 struct yds_softc *sc; 1610 1611 DPRINTF(("yds: yds_halt_input\n")); 1612 sc = addr; 1613 if (sc->sc_rec.intr) { 1614 sc->sc_rec.intr = NULL; 1615 /* Stop the rec slot operation */ 1616 YWRITE4(sc, YDS_MAPOF_REC, 0); 1617 /* Sync rec slot control data */ 1618 bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map, 1619 sc->rbankoff, 1620 sizeof(struct rec_slot_ctrl_bank)* 1621 N_REC_SLOT_CTRL*N_REC_SLOT_CTRL_BANK, 1622 BUS_DMASYNC_POSTWRITE|BUS_DMASYNC_POSTREAD); 1623 /* Sync ring buffer */ 1624 bus_dmamap_sync(sc->sc_dmatag, sc->sc_rec.dma->map, 1625 0, sc->sc_rec.length, BUS_DMASYNC_POSTREAD); 1626 } 1627 1628 return 0; 1629} 1630 1631static int 1632yds_getdev(void *addr, struct audio_device *retp) 1633{ 1634 1635 *retp = yds_device; 1636 return 0; 1637} 1638 1639static int 1640yds_mixer_set_port(void *addr, mixer_ctrl_t *cp) 1641{ 1642 struct yds_softc *sc; 1643 1644 sc = addr; 1645 return sc->sc_codec[0].codec_if->vtbl->mixer_set_port( 1646 sc->sc_codec[0].codec_if, cp); 1647} 1648 1649static int 1650yds_mixer_get_port(void *addr, mixer_ctrl_t *cp) 1651{ 1652 struct yds_softc *sc; 1653 1654 sc = addr; 1655 return sc->sc_codec[0].codec_if->vtbl->mixer_get_port( 1656 sc->sc_codec[0].codec_if, cp); 1657} 1658 1659static int 1660yds_query_devinfo(void *addr, mixer_devinfo_t *dip) 1661{ 1662 struct yds_softc *sc; 1663 1664 sc = addr; 1665 return sc->sc_codec[0].codec_if->vtbl->query_devinfo( 1666 sc->sc_codec[0].codec_if, dip); 1667} 1668 1669static void * 1670yds_malloc(void *addr, int direction, size_t size) 1671{ 1672 struct yds_softc *sc; 1673 struct yds_dma *p; 1674 int error; 1675 1676 p = kmem_alloc(sizeof(*p), KM_SLEEP); 1677 sc = addr; 1678 error = yds_allocmem(sc, size, 16, p); 1679 if (error) { 1680 kmem_free(p, sizeof(*p)); 1681 return NULL; 1682 } 1683 p->next = sc->sc_dmas; 1684 sc->sc_dmas = p; 1685 return KERNADDR(p); 1686} 1687 1688static void 1689yds_free(void *addr, void *ptr, size_t size) 1690{ 1691 struct yds_softc *sc; 1692 struct yds_dma **pp, *p; 1693 1694 sc = addr; 1695 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1696 if (KERNADDR(p) == ptr) { 1697 yds_freemem(sc, p); 1698 *pp = p->next; 1699 kmem_free(p, sizeof(*p)); 1700 return; 1701 } 1702 } 1703} 1704 1705static struct yds_dma * 1706yds_find_dma(struct yds_softc *sc, void *addr) 1707{ 1708 struct yds_dma *p; 1709 1710 for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next) 1711 continue; 1712 1713 return p; 1714} 1715 1716static size_t 1717yds_round_buffersize(void *addr, int direction, size_t size) 1718{ 1719 1720 /* 1721 * Buffer size should be at least twice as bigger as a frame. 1722 */ 1723 if (size < 1024 * 3) 1724 size = 1024 * 3; 1725 return size; 1726} 1727 1728static int 1729yds_get_props(void *addr) 1730{ 1731 1732 return AUDIO_PROP_PLAYBACK | AUDIO_PROP_CAPTURE | 1733 AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1734} 1735 1736static void 1737yds_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread) 1738{ 1739 struct yds_softc *sc; 1740 1741 sc = addr; 1742 *intr = &sc->sc_intr_lock; 1743 *thread = &sc->sc_lock; 1744} 1745