1/* $NetBSD: voodoofbreg.h,v 1.3 2012/01/19 18:35:27 macallan Exp $ */ 2 3/* 4 * Copyright 2005, 2006 by Michael Lorenz. 5 * 6 * Permission to use, copy, modify, distribute, and sell this software and 7 * its documentation for any purpose is hereby granted without fee, 8 * provided that the above copyright notice appear in all copies and that 9 * both that copyright notice and this permission notice appear in 10 * supporting documentation, and that the name of Kevin E. Martin not be 11 * used in advertising or publicity pertaining to distribution of the 12 * software without specific, written prior permission. Kevin E. Martin 13 * makes no representations about the suitability of this software for any 14 * purpose. It is provided "as is" without express or implied warranty. 15 * 16 * KEVIN E. MARTIN, RICKARD E. FAITH, AND TIAGO GONS DISCLAIM ALL 17 * WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL IMPLIED 18 * WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL THE 19 * AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR 20 * ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, 21 * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, 22 * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS 23 * SOFTWARE. 24 * 25*/ 26 27/* 28 * stolen wholesale from Andreas Drewke's (andreas_dr@gmx.de) Voodoo3 driver 29 * for BeOS 30 */ 31 32#ifndef VOODOOFB_H 33#define VOODOOFB_H 34 35/* membase0 register offsets */ 36#define STATUS 0x00 37#define PCIINIT0 0x04 38#define SIPMONITOR 0x08 39#define LFBMEMORYCONFIG 0x0c 40#define MISCINIT0 0x10 41#define MISCINIT1 0x14 42#define DRAMINIT0 0x18 43#define DRAMINIT1 0x1c 44#define AGPINIT 0x20 45#define TMUGBEINIT 0x24 46#define VGAINIT0 0x28 47#define VGAINIT1 0x2c 48#define DRAMCOMMAND 0x30 49#define DRAMDATA 0x34 50/* reserved 0x38 */ 51/* reserved 0x3c */ 52#define PLLCTRL0 0x40 /* video clock */ 53#define PLLCTRL1 0x44 /* memory clock */ 54 55/* PLL ctrl 0 and 1 registers: 56 * freq = (( N + 2 ) * Fref) / (( M + 2 ) * ( 2^K )) 57 * with Fref usually 14.31818MHz 58 * N: REG & 0xff00 59 * M: REG & 0xfc 60 * K: REG & 0x3 61 */ 62 63#define PLLCTRL2 0x48 /* test modes for AGP */ 64 65#define DACMODE 0x4c 66#define DAC_MODE_1_2 0x1 /* DAC in 2:1 mode. 1:1 mode when 0 */ 67#define DAC_MODE_LOCK_VSYNC 0x02 /* lock vsync */ 68#define DAC_MODE_VSYNC_VAL 0x04 /* vsync output when locked */ 69#define DAC_MODE_LOCK_HSYNC 0x08 /* lock hsync */ 70#define DAC_MODE_HSYNC_VAL 0x10 /* hsync output when locked */ 71 72#define DACADDR 0x50 73#define DACDATA 0x54 74#define RGBMAXDELTA 0x58 75#define VIDPROCCFG 0x5c 76#define HWCURPATADDR 0x60 77#define HWCURLOC 0x64 78#define HWCURC0 0x68 79#define HWCURC1 0x6c 80#define VIDINFORMAT 0x70 81#define VIDINSTATUS 0x74 82#define VIDSERPARPORT 0x78 83/* i2c stuff */ 84#define VSP_TVOUT_RESET 0x80000000 /* 0 forces TVout reset */ 85#define VSP_GPIO2_IN 0x40000000 86#define VSP_GPIO1_OUT 0x20000000 87#define VSP_VMI_RESET_N 0x10000000 /* 0 forces a VMI reset */ 88#define VSP_SDA1_IN 0x08000000 /* i2c bus on the feature connector */ 89#define VSP_SCL1_IN 0x04000000 90#define VSP_SDA1_OUT 0x02000000 91#define VSP_SCL1_OUT 0x01000000 92#define VSP_ENABLE_IIC1 0x00800000 /* 1 enables I2C bus 1 */ 93#define VSP_SDA0_IN 0x00400000 /* i2c bus on the monitor connector */ 94#define VSP_SCL0_IN 0x00200000 95#define VSP_SDA0_OUT 0x00100000 96#define VSP_SCL0_OUT 0x00080000 97#define VSP_ENABLE_IIC0 0x00040000 /* 1 enables I2C bus 0 */ 98#define VSP_VMI_ADDRESS 0x0003c000 /* mask */ 99#define VSP_VMI_DATA 0x00003fc0 /* mask */ 100#define VSP_VMI_DISABLE 0x00000020 /* 0 enables VMI output */ 101#define VSP_VMI_RDY_N 0x00000010 102#define VSP_RW_N 0x00000008 103#define VSP_DS_N 0x00000004 104#define VSP_CS_N 0x00000002 105#define VSP_HOST_ENABLE 0x00000001 /* 1 enables VMI host control*/ 106 107#define VIDINXDELTA 0x7c 108#define VIDININITERR 0x80 109#define VIDINYDELTA 0x84 110#define VIDPIXBUFTHOLD 0x88 111#define VIDCHRMIN 0x8c 112#define VIDCHRMAX 0x90 113#define VIDCURLIN 0x94 114#define VIDSCREENSIZE 0x98 115#define VIDOVRSTARTCRD 0x9c 116#define VIDOVRENDCRD 0xa0 117#define VIDOVRDUDX 0xa4 118#define VIDOVRDUDXOFF 0xa8 119#define VIDOVRDVDY 0xac 120/* ... */ 121 122#define VIDOVRDVDYOFF 0xe0 123#define VIDDESKSTART 0xe4 124#define VIDDESKSTRIDE 0xe8 125/* 126 * desktop and overlay strides in pixels 127 * desktop stride: reg & 0x00007fff 128 * overlay stride: reg & 0x7fff0000 129 */ 130 131#define VIDINADDR0 0xec 132#define VIDINADDR1 0xf0 133#define VIDINADDR2 0xf4 134#define VIDINSTRIDE 0xf8 135#define VIDCUROVRSTART 0xfc 136#define VIDOVERLAYSTARTCOORDS 0x9c 137#define VIDOVERLAYENDSCREENCOORDS 0xa0 138#define VIDOVERLAYDUDX 0xa4 139#define VIDOVERLAYDUDXOFFSETSRCWIDTH 0xa8 140#define VIDOVERLAYDVDY 0xac 141#define VIDOVERLAYDVDYOFFSET 0xe0 142 143#define SST_3D_OFFSET 0x200000 144#define SST_3D_LEFTOVERLAYBUF SST_3D_OFFSET+0x250 145 146#define V3_STATUS (0x00100000) 147#define INTCTRL (0x00100000 + 0x04) 148#define CLIP0MIN (0x00100000 + 0x08) 149#define CLIP0MAX (0x00100000 + 0x0c) 150#define DSTBASE (0x00100000 + 0x10) 151#define DSTFORMAT (0x00100000 + 0x14) 152 #define FMT_STRIDE_MASK 0x00003fff 153 #define FMT_MONO 0x00000000 154 #define FMT_8BIT 0x00010000 155 #define FMT_16BIT 0x00030000 156 #define FMT_24BIT 0x00040000 157 #define FMT_32BIT 0x00050000 158 #define FMT_422YUYV 0x00080000 159 #define FMT_422UYVY 0x00090000 160 #define FMT_PAD_STRIDE 0x00000000 161 #define FMT_PAD_BYTE 0x00400000 162 #define FMT_PAD_WORD 0x00800000 163 #define FMT_PAD_LONG 0x00c00000 164#define SRCBASE (0x00100000 + 0x34) 165#define COMMANDEXTRA_2D (0x00100000 + 0x38) 166#define CLIP1MIN (0x00100000 + 0x4c) 167#define CLIP1MAX (0x00100000 + 0x50) 168#define SRCFORMAT (0x00100000 + 0x54) 169#define SRCSIZE (0x00100000 + 0x58) 170#define SRCXY (0x00100000 + 0x5c) 171#define COLORBACK (0x00100000 + 0x60) 172#define COLORFORE (0x00100000 + 0x64) 173#define DSTSIZE (0x00100000 + 0x68) 174#define DSTXY (0x00100000 + 0x6c) 175#define COMMAND_2D (0x00100000 + 0x70) 176/* 177 * ROP0 : reg & 0xff000000 178 * select clip 1 : 0x00800000 179 * Y pattern offset : 0x00700000 180 * X pattern offset : 0x000e0000 181 * mono transparent : 0x00010000 182 * pattern expand : 0x00002000 183 * stipple line : 0x00001000 184 * adjust dstx : 0x00000800 xdst will contain xdst+xwidth 185 * adjust dsty : 0x00000400 186 * line reversible : 0x00000200 187 * start now : 0x00000100 run immediately instead of wait for launch area 188 * command : 0x0000000f 189 */ 190 191#define LAUNCH_2D (0x00100000 + 0x80) 192 193#define COMMAND_3D (0x00200000 + 0x120) 194 195/* register bitfields (not all, only as needed) */ 196 197#define BIT(x) (1UL << (x)) 198 199/* COMMAND_2D reg. values */ 200#define ROP_COPY 0xccU // src 201#define ROP_INVERT 0x55U // NOT dst 202#define ROP_XOR 0x66U // src XOR dst 203 204#define AUTOINC_DSTX BIT(10) 205#define AUTOINC_DSTY BIT(11) 206#define COMMAND_2D_FILLRECT 0x05 207#define COMMAND_2D_S2S_BITBLT 0x01 // screen to screen 208#define COMMAND_2D_H2S_BITBLT 0x03 // host to screen 209#define SST_2D_GO BIT(8) 210 211#define COMMAND_3D_NOP 0x00 212#define STATUS_RETRACE BIT(6) 213#define STATUS_BUSY BIT(9) 214#define MISCINIT1_CLUT_INV BIT(0) 215#define MISCINIT1_2DBLOCK_DIS BIT(15) 216#define DRAMINIT0_SGRAM_NUM BIT(26) 217#define DRAMINIT0_SGRAM_TYPE BIT(27) 218#define DRAMINIT1_MEM_SDRAM BIT(30) 219#define VGAINIT0_VGA_DISABLE BIT(0) 220#define VGAINIT0_EXT_TIMING BIT(1) 221#define VGAINIT0_8BIT_DAC BIT(2) 222#define VGAINIT0_EXT_ENABLE BIT(6) 223#define VGAINIT0_WAKEUP_3C3 BIT(8) 224#define VGAINIT0_LEGACY_DISABLE BIT(9) 225#define VGAINIT0_ALT_READBACK BIT(10) 226#define VGAINIT0_FAST_BLINK BIT(11) 227#define VGAINIT0_EXTSHIFTOUT BIT(12) 228#define VGAINIT0_DECODE_3C6 BIT(13) 229#define VGAINIT0_SGRAM_HBLANK_DISABLE BIT(22) 230#define VGAINIT1_MASK 0x1fffff 231#define VIDCFG_VIDPROC_ENABLE BIT(0) 232#define VIDCFG_CURS_X11 BIT(1) 233#define VIDCFG_HALF_MODE BIT(4) 234#define VIDCFG_CHROMA_KEY BIT(5) 235#define VIDCFG_CHROMA_KEY_INVERSION BIT(6) 236#define VIDCFG_DESK_ENABLE BIT(7) 237#define VIDCFG_OVL_ENABLE BIT(8) 238#define VIDCFG_OVL_NOT_VIDEO_IN BIT(9) 239#define VIDCFG_CLUT_BYPASS BIT(10) 240#define VIDCFG_OVL_CLUT_BYPASS BIT(11) 241#define VIDCFG_OVL_HSCALE BIT(14) 242#define VIDCFG_OVL_VSCALE BIT(15) 243#define VIDCFG_OVL_FILTER_SHIFT 16 244#define VIDCFG_OVL_FILTER_POINT 0 245#define VIDCFG_OVL_FILTER_2X2 1 246#define VIDCFG_OVL_FILTER_4X4 2 247#define VIDCFG_OVL_FILTER_BILIN 3 248#define VIDCFG_OVL_FMT_SHIFT 21 249#define VIDCFG_OVL_FMT_RGB565 1 250#define VIDCFG_OVL_FMT_YUV411 4 251#define VIDCFG_OVL_FMT_YUYV422 5 252#define VIDCFG_OVL_FMT_UYVY422 6 253#define VIDCFG_OVL_FMT_RGB565_DITHER 7 254 255#define VIDCFG_2X BIT(26) 256#define VIDCFG_HWCURSOR_ENABLE BIT(27) 257#define VIDCFG_PIXFMT_SHIFT 18 258#define DACMODE_2X BIT(0) 259#define VIDPROCCFGMASK 0xa2e3eb6c 260#define VIDPROCDEFAULT 134481025 261 262#define VIDCHROMAMIN 0x8c 263#define VIDCHROMAMAX 0x90 264#define VIDDESKTOPOVERLAYSTRIDE 0xe8 265 266#define CRTC_INDEX 0x3d4 267#define CRTC_DATA 0x3d5 268#define SEQ_INDEX 0x3c4 269#define SEQ_DATA 0x3c5 270#define MISC_W 0x3c2 271 #define VSYNC_NEG 0x80 272 #define HSYNC_NEG 0x40 273#define GRA_INDEX 0x3ce 274#define GRA_DATA 0x3cf 275#define ATT_IW 0x3c0 276#define IS1_R 0x3da 277 278/* CRTC registers */ 279#define CRTC_HTOTAL 0 /* lower 8 bit of display width in chars -5 */ 280#define CRTC_HDISP_ENABLE_END 1 /* no. of visible chars per line -1 */ 281#define CRTC_HDISP_BLANK_START 2 /* characters per line before blanking */ 282#define CRTC_HDISP_BLANK_END 3 /* no. o blank chars, skew, compatibility read */ 283#define CRTC_HDISP_SYNC_START 4 /* character count when sync becomes active */ 284#define CRTC_HDISP_SYNC_END 5 /* sync end, skew, blank end */ 285#define CRTC_VDISP_TOTAL 6 /* number of scanlines -2 */ 286#define CRTC_OVERFLOW 7 /* various overflow bits */ 287#define CRTC_PRESET_ROW_SCAN 8 /* horizontal soft scrolling in character mode */ 288#define CRTC_MAX_SCAN_LINE 9 /* scanlines per character */ 289#define CRTC_CURSOR_START 10 /* text cursor start line */ 290#define CRTC_CURSOR_END 11 /* text cursor end line */ 291#define CRTC_SCREEN_START_HIGH 12 /* offset in display memory */ 292#define CRTC_SCREEN_START_LOW 13 293#define CRTC_CURSOR_POS_HIGH 14 294#define CRTC_CURSOR_POS_LOW 15 295#define CRTC_VSYNC_START 16 296#define CRTC_VSYNC_END 17 297#define CRTC_VDISP_ENABLE_END 18 298#define CRTC_OFFSET 19 /* textmode stride */ 299#define CRTC_UNDERLINE_LOC 20 300#define CRTC_VDISP_BLANK_START 21 301#define CRTC_VDISP_BLANK_END 22 302#define CRTC_MODE_CONTROL 23 303#define CRTC_LINE_COMPARE 24 304#define CRTC_HDISP_EXT 26 305#define CRTC_VDISP_EXT 27 306#define CRTC_PCI_READBACK 28 307#define CRTC_SCRATCH_1 29 308#define CRTC_SCRATCH_2 30 309#define CRTC_SCRATCH_3 31 310#define CRTC_VDISP_PRELOAD_LOW 32 311#define CRTC_VDISP_PRELOAD_HIGH 33 312#define CRTC_LATCHES_READBACK 34 313#define CRTC_ATTR_READBACK 36 /* bit 7 = 0 : attr. ctrlr reads index, 1 -> data */ 314#define CRTC_ATTR_INDEX 38 315 316#endif 317