virtio.c revision 1.66
1/* $NetBSD: virtio.c,v 1.66 2023/03/23 03:27:48 yamaguchi Exp $ */ 2 3/* 4 * Copyright (c) 2020 The NetBSD Foundation, Inc. 5 * Copyright (c) 2012 Stefan Fritsch, Alexander Fiveg. 6 * Copyright (c) 2010 Minoura Makoto. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#include <sys/cdefs.h> 31__KERNEL_RCSID(0, "$NetBSD: virtio.c,v 1.66 2023/03/23 03:27:48 yamaguchi Exp $"); 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/kernel.h> 36#include <sys/atomic.h> 37#include <sys/bus.h> 38#include <sys/device.h> 39#include <sys/kmem.h> 40#include <sys/module.h> 41 42#define VIRTIO_PRIVATE 43 44#include <dev/pci/virtioreg.h> /* XXX: move to non-pci */ 45#include <dev/pci/virtiovar.h> /* XXX: move to non-pci */ 46 47#define MINSEG_INDIRECT 2 /* use indirect if nsegs >= this value */ 48 49/* incomplete list */ 50static const char *virtio_device_name[] = { 51 "unknown (0)", /* 0 */ 52 "network", /* 1 */ 53 "block", /* 2 */ 54 "console", /* 3 */ 55 "entropy", /* 4 */ 56 "memory balloon", /* 5 */ 57 "I/O memory", /* 6 */ 58 "remote processor messaging", /* 7 */ 59 "SCSI", /* 8 */ 60 "9P transport", /* 9 */ 61}; 62#define NDEVNAMES __arraycount(virtio_device_name) 63 64static void virtio_init_vq(struct virtio_softc *, 65 struct virtqueue *, const bool); 66 67void 68virtio_set_status(struct virtio_softc *sc, int status) 69{ 70 sc->sc_ops->set_status(sc, status); 71} 72 73/* 74 * Reset the device. 75 */ 76/* 77 * To reset the device to a known state, do following: 78 * virtio_reset(sc); // this will stop the device activity 79 * <dequeue finished requests>; // virtio_dequeue() still can be called 80 * <revoke pending requests in the vqs if any>; 81 * virtio_reinit_start(sc); // dequeue prohibitted 82 * newfeatures = virtio_negotiate_features(sc, requestedfeatures); 83 * <some other initialization>; 84 * virtio_reinit_end(sc); // device activated; enqueue allowed 85 * Once attached, feature negotiation can only be allowed after virtio_reset. 86 */ 87void 88virtio_reset(struct virtio_softc *sc) 89{ 90 virtio_device_reset(sc); 91} 92 93int 94virtio_reinit_start(struct virtio_softc *sc) 95{ 96 int i, r; 97 98 virtio_set_status(sc, VIRTIO_CONFIG_DEVICE_STATUS_ACK); 99 virtio_set_status(sc, VIRTIO_CONFIG_DEVICE_STATUS_DRIVER); 100 for (i = 0; i < sc->sc_nvqs; i++) { 101 int n; 102 struct virtqueue *vq = &sc->sc_vqs[i]; 103 n = sc->sc_ops->read_queue_size(sc, vq->vq_index); 104 if (n == 0) /* vq disappeared */ 105 continue; 106 if (n != vq->vq_num) { 107 panic("%s: virtqueue size changed, vq index %d\n", 108 device_xname(sc->sc_dev), 109 vq->vq_index); 110 } 111 virtio_init_vq(sc, vq, true); 112 sc->sc_ops->setup_queue(sc, vq->vq_index, 113 vq->vq_dmamap->dm_segs[0].ds_addr); 114 } 115 116 r = sc->sc_ops->setup_interrupts(sc, 1); 117 if (r != 0) 118 goto fail; 119 120 return 0; 121 122fail: 123 virtio_set_status(sc, VIRTIO_CONFIG_DEVICE_STATUS_FAILED); 124 125 return 1; 126} 127 128void 129virtio_reinit_end(struct virtio_softc *sc) 130{ 131 virtio_set_status(sc, VIRTIO_CONFIG_DEVICE_STATUS_DRIVER_OK); 132} 133 134/* 135 * Feature negotiation. 136 */ 137void 138virtio_negotiate_features(struct virtio_softc *sc, uint64_t guest_features) 139{ 140 if (!(device_cfdata(sc->sc_dev)->cf_flags & 1) && 141 !(device_cfdata(sc->sc_child)->cf_flags & 1)) /* XXX */ 142 guest_features |= VIRTIO_F_RING_INDIRECT_DESC; 143 sc->sc_ops->neg_features(sc, guest_features); 144 if (sc->sc_active_features & VIRTIO_F_RING_INDIRECT_DESC) 145 sc->sc_indirect = true; 146 else 147 sc->sc_indirect = false; 148} 149 150 151/* 152 * Device configuration registers readers/writers 153 */ 154#if 0 155#define DPRINTFR(n, fmt, val, index, num) \ 156 printf("\n%s (", n); \ 157 for (int i = 0; i < num; i++) \ 158 printf("%02x ", bus_space_read_1(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, index+i)); \ 159 printf(") -> "); printf(fmt, val); printf("\n"); 160#define DPRINTFR2(n, fmt, val_s, val_n) \ 161 printf("%s ", n); \ 162 printf("\n stream "); printf(fmt, val_s); printf(" norm "); printf(fmt, val_n); printf("\n"); 163#else 164#define DPRINTFR(n, fmt, val, index, num) 165#define DPRINTFR2(n, fmt, val_s, val_n) 166#endif 167 168 169uint8_t 170virtio_read_device_config_1(struct virtio_softc *sc, int index) 171{ 172 bus_space_tag_t iot = sc->sc_devcfg_iot; 173 bus_space_handle_t ioh = sc->sc_devcfg_ioh; 174 uint8_t val; 175 176 val = bus_space_read_1(iot, ioh, index); 177 178 DPRINTFR("read_1", "%02x", val, index, 1); 179 return val; 180} 181 182uint16_t 183virtio_read_device_config_2(struct virtio_softc *sc, int index) 184{ 185 bus_space_tag_t iot = sc->sc_devcfg_iot; 186 bus_space_handle_t ioh = sc->sc_devcfg_ioh; 187 uint16_t val; 188 189 val = bus_space_read_2(iot, ioh, index); 190 if (BYTE_ORDER != sc->sc_bus_endian) 191 val = bswap16(val); 192 193 DPRINTFR("read_2", "%04x", val, index, 2); 194 DPRINTFR2("read_2", "%04x", 195 bus_space_read_stream_2(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, 196 index), 197 bus_space_read_2(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, index)); 198 return val; 199} 200 201uint32_t 202virtio_read_device_config_4(struct virtio_softc *sc, int index) 203{ 204 bus_space_tag_t iot = sc->sc_devcfg_iot; 205 bus_space_handle_t ioh = sc->sc_devcfg_ioh; 206 uint32_t val; 207 208 val = bus_space_read_4(iot, ioh, index); 209 if (BYTE_ORDER != sc->sc_bus_endian) 210 val = bswap32(val); 211 212 DPRINTFR("read_4", "%08x", val, index, 4); 213 DPRINTFR2("read_4", "%08x", 214 bus_space_read_stream_4(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, 215 index), 216 bus_space_read_4(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, index)); 217 return val; 218} 219 220/* 221 * The Virtio spec explicitly tells that reading and writing 8 bytes are not 222 * considered atomic and no triggers may be connected to reading or writing 223 * it. We access it using two 32 reads. See virtio spec 4.1.3.1. 224 */ 225uint64_t 226virtio_read_device_config_8(struct virtio_softc *sc, int index) 227{ 228 bus_space_tag_t iot = sc->sc_devcfg_iot; 229 bus_space_handle_t ioh = sc->sc_devcfg_ioh; 230 union { 231 uint64_t u64; 232 uint32_t l[2]; 233 } v; 234 uint64_t val; 235 236 v.l[0] = bus_space_read_4(iot, ioh, index); 237 v.l[1] = bus_space_read_4(iot, ioh, index + 4); 238 if (sc->sc_bus_endian != sc->sc_struct_endian) { 239 v.l[0] = bswap32(v.l[0]); 240 v.l[1] = bswap32(v.l[1]); 241 } 242 val = v.u64; 243 244 if (BYTE_ORDER != sc->sc_struct_endian) 245 val = bswap64(val); 246 247 DPRINTFR("read_8", "%08"PRIx64, val, index, 8); 248 DPRINTFR2("read_8 low ", "%08x", 249 bus_space_read_stream_4(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, 250 index), 251 bus_space_read_4(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, index)); 252 DPRINTFR2("read_8 high ", "%08x", 253 bus_space_read_stream_4(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, 254 index + 4), 255 bus_space_read_4(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, index + 4)); 256 return val; 257} 258 259/* 260 * In the older virtio spec, device config registers are host endian. On newer 261 * they are little endian. Some newer devices however explicitly specify their 262 * register to always be little endian. These functions cater for these. 263 */ 264uint16_t 265virtio_read_device_config_le_2(struct virtio_softc *sc, int index) 266{ 267 bus_space_tag_t iot = sc->sc_devcfg_iot; 268 bus_space_handle_t ioh = sc->sc_devcfg_ioh; 269 uint16_t val; 270 271 val = bus_space_read_2(iot, ioh, index); 272 if (sc->sc_bus_endian != LITTLE_ENDIAN) 273 val = bswap16(val); 274 275 DPRINTFR("read_le_2", "%04x", val, index, 2); 276 DPRINTFR2("read_le_2", "%04x", 277 bus_space_read_stream_2(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, 0), 278 bus_space_read_2(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, 0)); 279 return val; 280} 281 282uint32_t 283virtio_read_device_config_le_4(struct virtio_softc *sc, int index) 284{ 285 bus_space_tag_t iot = sc->sc_devcfg_iot; 286 bus_space_handle_t ioh = sc->sc_devcfg_ioh; 287 uint32_t val; 288 289 val = bus_space_read_4(iot, ioh, index); 290 if (sc->sc_bus_endian != LITTLE_ENDIAN) 291 val = bswap32(val); 292 293 DPRINTFR("read_le_4", "%08x", val, index, 4); 294 DPRINTFR2("read_le_4", "%08x", 295 bus_space_read_stream_4(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, 0), 296 bus_space_read_4(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, 0)); 297 return val; 298} 299 300void 301virtio_write_device_config_1(struct virtio_softc *sc, int index, uint8_t value) 302{ 303 bus_space_tag_t iot = sc->sc_devcfg_iot; 304 bus_space_handle_t ioh = sc->sc_devcfg_ioh; 305 306 bus_space_write_1(iot, ioh, index, value); 307} 308 309void 310virtio_write_device_config_2(struct virtio_softc *sc, int index, 311 uint16_t value) 312{ 313 bus_space_tag_t iot = sc->sc_devcfg_iot; 314 bus_space_handle_t ioh = sc->sc_devcfg_ioh; 315 316 if (BYTE_ORDER != sc->sc_bus_endian) 317 value = bswap16(value); 318 bus_space_write_2(iot, ioh, index, value); 319} 320 321void 322virtio_write_device_config_4(struct virtio_softc *sc, int index, 323 uint32_t value) 324{ 325 bus_space_tag_t iot = sc->sc_devcfg_iot; 326 bus_space_handle_t ioh = sc->sc_devcfg_ioh; 327 328 if (BYTE_ORDER != sc->sc_bus_endian) 329 value = bswap32(value); 330 bus_space_write_4(iot, ioh, index, value); 331} 332 333/* 334 * The Virtio spec explicitly tells that reading and writing 8 bytes are not 335 * considered atomic and no triggers may be connected to reading or writing 336 * it. We access it using two 32 bit writes. For good measure it is stated to 337 * always write lsb first just in case of a hypervisor bug. See See virtio 338 * spec 4.1.3.1. 339 */ 340void 341virtio_write_device_config_8(struct virtio_softc *sc, int index, 342 uint64_t value) 343{ 344 bus_space_tag_t iot = sc->sc_devcfg_iot; 345 bus_space_handle_t ioh = sc->sc_devcfg_ioh; 346 union { 347 uint64_t u64; 348 uint32_t l[2]; 349 } v; 350 351 if (BYTE_ORDER != sc->sc_struct_endian) 352 value = bswap64(value); 353 354 v.u64 = value; 355 if (sc->sc_bus_endian != sc->sc_struct_endian) { 356 v.l[0] = bswap32(v.l[0]); 357 v.l[1] = bswap32(v.l[1]); 358 } 359 360 if (sc->sc_struct_endian == LITTLE_ENDIAN) { 361 bus_space_write_4(iot, ioh, index, v.l[0]); 362 bus_space_write_4(iot, ioh, index + 4, v.l[1]); 363 } else { 364 bus_space_write_4(iot, ioh, index + 4, v.l[1]); 365 bus_space_write_4(iot, ioh, index, v.l[0]); 366 } 367} 368 369/* 370 * In the older virtio spec, device config registers are host endian. On newer 371 * they are little endian. Some newer devices however explicitly specify their 372 * register to always be little endian. These functions cater for these. 373 */ 374void 375virtio_write_device_config_le_2(struct virtio_softc *sc, int index, 376 uint16_t value) 377{ 378 bus_space_tag_t iot = sc->sc_devcfg_iot; 379 bus_space_handle_t ioh = sc->sc_devcfg_ioh; 380 381 if (sc->sc_bus_endian != LITTLE_ENDIAN) 382 value = bswap16(value); 383 bus_space_write_2(iot, ioh, index, value); 384} 385 386void 387virtio_write_device_config_le_4(struct virtio_softc *sc, int index, 388 uint32_t value) 389{ 390 bus_space_tag_t iot = sc->sc_devcfg_iot; 391 bus_space_handle_t ioh = sc->sc_devcfg_ioh; 392 393 if (sc->sc_bus_endian != LITTLE_ENDIAN) 394 value = bswap32(value); 395 bus_space_write_4(iot, ioh, index, value); 396} 397 398 399/* 400 * data structures endian helpers 401 */ 402uint16_t 403virtio_rw16(struct virtio_softc *sc, uint16_t val) 404{ 405 KASSERT(sc); 406 return BYTE_ORDER != sc->sc_struct_endian ? bswap16(val) : val; 407} 408 409uint32_t 410virtio_rw32(struct virtio_softc *sc, uint32_t val) 411{ 412 KASSERT(sc); 413 return BYTE_ORDER != sc->sc_struct_endian ? bswap32(val) : val; 414} 415 416uint64_t 417virtio_rw64(struct virtio_softc *sc, uint64_t val) 418{ 419 KASSERT(sc); 420 return BYTE_ORDER != sc->sc_struct_endian ? bswap64(val) : val; 421} 422 423 424/* 425 * Interrupt handler. 426 */ 427static void 428virtio_soft_intr(void *arg) 429{ 430 struct virtio_softc *sc = arg; 431 432 KASSERT(sc->sc_intrhand != NULL); 433 434 (*sc->sc_intrhand)(sc); 435} 436 437/* 438 * dmamap sync operations for a virtqueue. 439 */ 440static inline void 441vq_sync_descs(struct virtio_softc *sc, struct virtqueue *vq, int ops) 442{ 443 444 /* availoffset == sizeof(vring_desc) * vq_num */ 445 bus_dmamap_sync(sc->sc_dmat, vq->vq_dmamap, 0, vq->vq_availoffset, 446 ops); 447} 448 449static inline void 450vq_sync_aring_all(struct virtio_softc *sc, struct virtqueue *vq, int ops) 451{ 452 uint16_t hdrlen = offsetof(struct vring_avail, ring); 453 size_t payloadlen = vq->vq_num * sizeof(uint16_t); 454 size_t usedlen = 0; 455 456 if (sc->sc_active_features & VIRTIO_F_RING_EVENT_IDX) 457 usedlen = sizeof(uint16_t); 458 bus_dmamap_sync(sc->sc_dmat, vq->vq_dmamap, 459 vq->vq_availoffset, hdrlen + payloadlen + usedlen, ops); 460} 461 462static inline void 463vq_sync_aring_header(struct virtio_softc *sc, struct virtqueue *vq, int ops) 464{ 465 uint16_t hdrlen = offsetof(struct vring_avail, ring); 466 467 bus_dmamap_sync(sc->sc_dmat, vq->vq_dmamap, 468 vq->vq_availoffset, hdrlen, ops); 469} 470 471static inline void 472vq_sync_aring_payload(struct virtio_softc *sc, struct virtqueue *vq, int ops) 473{ 474 uint16_t hdrlen = offsetof(struct vring_avail, ring); 475 size_t payloadlen = vq->vq_num * sizeof(uint16_t); 476 477 bus_dmamap_sync(sc->sc_dmat, vq->vq_dmamap, 478 vq->vq_availoffset + hdrlen, payloadlen, ops); 479} 480 481static inline void 482vq_sync_aring_used(struct virtio_softc *sc, struct virtqueue *vq, int ops) 483{ 484 uint16_t hdrlen = offsetof(struct vring_avail, ring); 485 size_t payloadlen = vq->vq_num * sizeof(uint16_t); 486 size_t usedlen = sizeof(uint16_t); 487 488 if ((sc->sc_active_features & VIRTIO_F_RING_EVENT_IDX) == 0) 489 return; 490 bus_dmamap_sync(sc->sc_dmat, vq->vq_dmamap, 491 vq->vq_availoffset + hdrlen + payloadlen, usedlen, ops); 492} 493 494static inline void 495vq_sync_uring_all(struct virtio_softc *sc, struct virtqueue *vq, int ops) 496{ 497 uint16_t hdrlen = offsetof(struct vring_used, ring); 498 size_t payloadlen = vq->vq_num * sizeof(struct vring_used_elem); 499 size_t availlen = 0; 500 501 if (sc->sc_active_features & VIRTIO_F_RING_EVENT_IDX) 502 availlen = sizeof(uint16_t); 503 bus_dmamap_sync(sc->sc_dmat, vq->vq_dmamap, 504 vq->vq_usedoffset, hdrlen + payloadlen + availlen, ops); 505} 506 507static inline void 508vq_sync_uring_header(struct virtio_softc *sc, struct virtqueue *vq, int ops) 509{ 510 uint16_t hdrlen = offsetof(struct vring_used, ring); 511 512 bus_dmamap_sync(sc->sc_dmat, vq->vq_dmamap, 513 vq->vq_usedoffset, hdrlen, ops); 514} 515 516static inline void 517vq_sync_uring_payload(struct virtio_softc *sc, struct virtqueue *vq, int ops) 518{ 519 uint16_t hdrlen = offsetof(struct vring_used, ring); 520 size_t payloadlen = vq->vq_num * sizeof(struct vring_used_elem); 521 522 bus_dmamap_sync(sc->sc_dmat, vq->vq_dmamap, 523 vq->vq_usedoffset + hdrlen, payloadlen, ops); 524} 525 526static inline void 527vq_sync_uring_avail(struct virtio_softc *sc, struct virtqueue *vq, int ops) 528{ 529 uint16_t hdrlen = offsetof(struct vring_used, ring); 530 size_t payloadlen = vq->vq_num * sizeof(struct vring_used_elem); 531 size_t availlen = sizeof(uint16_t); 532 533 if ((sc->sc_active_features & VIRTIO_F_RING_EVENT_IDX) == 0) 534 return; 535 bus_dmamap_sync(sc->sc_dmat, vq->vq_dmamap, 536 vq->vq_usedoffset + hdrlen + payloadlen, availlen, ops); 537} 538 539static inline void 540vq_sync_indirect(struct virtio_softc *sc, struct virtqueue *vq, int slot, 541 int ops) 542{ 543 int offset = vq->vq_indirectoffset + 544 sizeof(struct vring_desc) * vq->vq_maxnsegs * slot; 545 546 bus_dmamap_sync(sc->sc_dmat, vq->vq_dmamap, 547 offset, sizeof(struct vring_desc) * vq->vq_maxnsegs, ops); 548} 549 550bool 551virtio_vq_is_enqueued(struct virtio_softc *sc, struct virtqueue *vq) 552{ 553 554 if (vq->vq_queued) { 555 vq->vq_queued = 0; 556 vq_sync_aring_all(sc, vq, BUS_DMASYNC_POSTWRITE); 557 } 558 559 vq_sync_uring_header(sc, vq, BUS_DMASYNC_POSTREAD); 560 if (vq->vq_used_idx == virtio_rw16(sc, vq->vq_used->idx)) 561 return 0; 562 vq_sync_uring_payload(sc, vq, BUS_DMASYNC_POSTREAD); 563 return 1; 564} 565 566/* 567 * Scan vq, bus_dmamap_sync for the vqs (not for the payload), 568 * and calls (*vq_done)() if some entries are consumed. 569 * 570 * Can be used as sc_intrhand. 571 */ 572int 573virtio_vq_intr(struct virtio_softc *sc) 574{ 575 struct virtqueue *vq; 576 int i, r = 0; 577 578 for (i = 0; i < sc->sc_nvqs; i++) { 579 vq = &sc->sc_vqs[i]; 580 if (virtio_vq_is_enqueued(sc, vq) == 1) { 581 if (vq->vq_done) 582 r |= (*vq->vq_done)(vq); 583 } 584 } 585 586 return r; 587} 588 589int 590virtio_vq_intrhand(struct virtio_softc *sc) 591{ 592 struct virtqueue *vq; 593 int i, r = 0; 594 595 for (i = 0; i < sc->sc_nvqs; i++) { 596 vq = &sc->sc_vqs[i]; 597 r |= (*vq->vq_intrhand)(vq->vq_intrhand_arg); 598 } 599 600 return r; 601} 602 603 604/* 605 * Increase the event index in order to delay interrupts. 606 */ 607int 608virtio_postpone_intr(struct virtio_softc *sc, struct virtqueue *vq, 609 uint16_t nslots) 610{ 611 uint16_t idx, nused; 612 613 idx = vq->vq_used_idx + nslots; 614 615 /* set the new event index: avail_ring->used_event = idx */ 616 *vq->vq_used_event = virtio_rw16(sc, idx); 617 vq_sync_aring_used(vq->vq_owner, vq, BUS_DMASYNC_PREWRITE); 618 vq->vq_queued++; 619 620 nused = (uint16_t) 621 (virtio_rw16(sc, vq->vq_used->idx) - vq->vq_used_idx); 622 KASSERT(nused <= vq->vq_num); 623 624 return nslots < nused; 625} 626 627/* 628 * Postpone interrupt until 3/4 of the available descriptors have been 629 * consumed. 630 */ 631int 632virtio_postpone_intr_smart(struct virtio_softc *sc, struct virtqueue *vq) 633{ 634 uint16_t nslots; 635 636 nslots = (uint16_t) 637 (virtio_rw16(sc, vq->vq_avail->idx) - vq->vq_used_idx) * 3 / 4; 638 639 return virtio_postpone_intr(sc, vq, nslots); 640} 641 642/* 643 * Postpone interrupt until all of the available descriptors have been 644 * consumed. 645 */ 646int 647virtio_postpone_intr_far(struct virtio_softc *sc, struct virtqueue *vq) 648{ 649 uint16_t nslots; 650 651 nslots = (uint16_t) 652 (virtio_rw16(sc, vq->vq_avail->idx) - vq->vq_used_idx); 653 654 return virtio_postpone_intr(sc, vq, nslots); 655} 656 657/* 658 * Start/stop vq interrupt. No guarantee. 659 */ 660void 661virtio_stop_vq_intr(struct virtio_softc *sc, struct virtqueue *vq) 662{ 663 664 if (sc->sc_active_features & VIRTIO_F_RING_EVENT_IDX) { 665 /* 666 * No way to disable the interrupt completely with 667 * RingEventIdx. Instead advance used_event by half the 668 * possible value. This won't happen soon and is far enough in 669 * the past to not trigger a spurios interrupt. 670 */ 671 *vq->vq_used_event = virtio_rw16(sc, vq->vq_used_idx + 0x8000); 672 vq_sync_aring_used(sc, vq, BUS_DMASYNC_PREWRITE); 673 } else { 674 vq->vq_avail->flags |= 675 virtio_rw16(sc, VRING_AVAIL_F_NO_INTERRUPT); 676 vq_sync_aring_header(sc, vq, BUS_DMASYNC_PREWRITE); 677 } 678 vq->vq_queued++; 679} 680 681int 682virtio_start_vq_intr(struct virtio_softc *sc, struct virtqueue *vq) 683{ 684 685 if (sc->sc_active_features & VIRTIO_F_RING_EVENT_IDX) { 686 /* 687 * If event index feature is negotiated, enabling interrupts 688 * is done through setting the latest consumed index in the 689 * used_event field 690 */ 691 *vq->vq_used_event = virtio_rw16(sc, vq->vq_used_idx); 692 vq_sync_aring_used(sc, vq, BUS_DMASYNC_PREWRITE); 693 } else { 694 vq->vq_avail->flags &= 695 ~virtio_rw16(sc, VRING_AVAIL_F_NO_INTERRUPT); 696 vq_sync_aring_header(sc, vq, BUS_DMASYNC_PREWRITE); 697 } 698 vq->vq_queued++; 699 700 vq_sync_uring_header(sc, vq, BUS_DMASYNC_POSTREAD); 701 if (vq->vq_used_idx == virtio_rw16(sc, vq->vq_used->idx)) 702 return 0; 703 vq_sync_uring_payload(sc, vq, BUS_DMASYNC_POSTREAD); 704 return 1; 705} 706 707/* 708 * Initialize vq structure. 709 */ 710static void 711virtio_init_vq(struct virtio_softc *sc, struct virtqueue *vq, 712 const bool reinit) 713{ 714 int i, j; 715 int vq_size = vq->vq_num; 716 717 memset(vq->vq_vaddr, 0, vq->vq_bytesize); 718 719 /* build the indirect descriptor chain */ 720 if (vq->vq_indirect != NULL) { 721 struct vring_desc *vd; 722 723 for (i = 0; i < vq_size; i++) { 724 vd = vq->vq_indirect; 725 vd += vq->vq_maxnsegs * i; 726 for (j = 0; j < vq->vq_maxnsegs - 1; j++) { 727 vd[j].next = virtio_rw16(sc, j + 1); 728 } 729 } 730 } 731 732 /* free slot management */ 733 SIMPLEQ_INIT(&vq->vq_freelist); 734 for (i = 0; i < vq_size; i++) { 735 SIMPLEQ_INSERT_TAIL(&vq->vq_freelist, &vq->vq_entries[i], 736 qe_list); 737 vq->vq_entries[i].qe_index = i; 738 } 739 if (!reinit) 740 mutex_init(&vq->vq_freelist_lock, MUTEX_SPIN, sc->sc_ipl); 741 742 /* enqueue/dequeue status */ 743 vq->vq_avail_idx = 0; 744 vq->vq_used_idx = 0; 745 vq->vq_queued = 0; 746 if (!reinit) { 747 mutex_init(&vq->vq_aring_lock, MUTEX_SPIN, sc->sc_ipl); 748 mutex_init(&vq->vq_uring_lock, MUTEX_SPIN, sc->sc_ipl); 749 } 750 vq_sync_uring_all(sc, vq, BUS_DMASYNC_PREREAD); 751 vq->vq_queued++; 752} 753 754/* 755 * Allocate/free a vq. 756 */ 757int 758virtio_alloc_vq(struct virtio_softc *sc, struct virtqueue *vq, int index, 759 int maxsegsize, int maxnsegs, const char *name) 760{ 761 int vq_size, allocsize1, allocsize2, allocsize3, allocsize = 0; 762 int rsegs, r, hdrlen; 763#define VIRTQUEUE_ALIGN(n) roundup(n, VIRTIO_PAGE_SIZE) 764 765 memset(vq, 0, sizeof(*vq)); 766 767 vq_size = sc->sc_ops->read_queue_size(sc, index); 768 if (vq_size == 0) { 769 aprint_error_dev(sc->sc_dev, 770 "virtqueue not exist, index %d for %s\n", 771 index, name); 772 goto err; 773 } 774 775 hdrlen = sc->sc_active_features & VIRTIO_F_RING_EVENT_IDX ? 3 : 2; 776 777 /* allocsize1: descriptor table + avail ring + pad */ 778 allocsize1 = VIRTQUEUE_ALIGN(sizeof(struct vring_desc) * vq_size 779 + sizeof(uint16_t) * (hdrlen + vq_size)); 780 /* allocsize2: used ring + pad */ 781 allocsize2 = VIRTQUEUE_ALIGN(sizeof(uint16_t) * hdrlen 782 + sizeof(struct vring_used_elem) * vq_size); 783 /* allocsize3: indirect table */ 784 if (sc->sc_indirect && maxnsegs >= MINSEG_INDIRECT) 785 allocsize3 = sizeof(struct vring_desc) * maxnsegs * vq_size; 786 else 787 allocsize3 = 0; 788 allocsize = allocsize1 + allocsize2 + allocsize3; 789 790 /* alloc and map the memory */ 791 r = bus_dmamem_alloc(sc->sc_dmat, allocsize, VIRTIO_PAGE_SIZE, 0, 792 &vq->vq_segs[0], 1, &rsegs, BUS_DMA_WAITOK); 793 if (r != 0) { 794 aprint_error_dev(sc->sc_dev, 795 "virtqueue %d for %s allocation failed, " 796 "error code %d\n", index, name, r); 797 goto err; 798 } 799 r = bus_dmamem_map(sc->sc_dmat, &vq->vq_segs[0], rsegs, allocsize, 800 &vq->vq_vaddr, BUS_DMA_WAITOK); 801 if (r != 0) { 802 aprint_error_dev(sc->sc_dev, 803 "virtqueue %d for %s map failed, " 804 "error code %d\n", index, name, r); 805 goto err; 806 } 807 r = bus_dmamap_create(sc->sc_dmat, allocsize, 1, allocsize, 0, 808 BUS_DMA_WAITOK, &vq->vq_dmamap); 809 if (r != 0) { 810 aprint_error_dev(sc->sc_dev, 811 "virtqueue %d for %s dmamap creation failed, " 812 "error code %d\n", index, name, r); 813 goto err; 814 } 815 r = bus_dmamap_load(sc->sc_dmat, vq->vq_dmamap, 816 vq->vq_vaddr, allocsize, NULL, BUS_DMA_WAITOK); 817 if (r != 0) { 818 aprint_error_dev(sc->sc_dev, 819 "virtqueue %d for %s dmamap load failed, " 820 "error code %d\n", index, name, r); 821 goto err; 822 } 823 824 /* remember addresses and offsets for later use */ 825 vq->vq_owner = sc; 826 vq->vq_num = vq_size; 827 vq->vq_index = index; 828 vq->vq_desc = vq->vq_vaddr; 829 vq->vq_availoffset = sizeof(struct vring_desc) * vq_size; 830 vq->vq_avail = (void *)(((char *)vq->vq_desc) + vq->vq_availoffset); 831 vq->vq_used_event = (uint16_t *)((char *)vq->vq_avail + 832 offsetof(struct vring_avail, ring[vq->vq_num])); 833 vq->vq_usedoffset = allocsize1; 834 vq->vq_used = (void *)(((char *)vq->vq_desc) + vq->vq_usedoffset); 835 vq->vq_avail_event = (uint16_t *)((char *)vq->vq_used + 836 offsetof(struct vring_used, ring[vq->vq_num])); 837 838 if (allocsize3 > 0) { 839 vq->vq_indirectoffset = allocsize1 + allocsize2; 840 vq->vq_indirect = (void *)(((char *)vq->vq_desc) 841 + vq->vq_indirectoffset); 842 } 843 vq->vq_bytesize = allocsize; 844 vq->vq_maxsegsize = maxsegsize; 845 vq->vq_maxnsegs = maxnsegs; 846 847 /* free slot management */ 848 vq->vq_entries = kmem_zalloc(sizeof(struct vq_entry) * vq_size, 849 KM_SLEEP); 850 virtio_init_vq(sc, vq, false); 851 852 /* set the vq address */ 853 sc->sc_ops->setup_queue(sc, index, 854 vq->vq_dmamap->dm_segs[0].ds_addr); 855 856 aprint_verbose_dev(sc->sc_dev, 857 "allocated %u byte for virtqueue %d for %s, size %d\n", 858 allocsize, index, name, vq_size); 859 if (allocsize3 > 0) 860 aprint_verbose_dev(sc->sc_dev, 861 "using %d byte (%d entries) indirect descriptors\n", 862 allocsize3, maxnsegs * vq_size); 863 864 return 0; 865 866err: 867 sc->sc_ops->setup_queue(sc, index, 0); 868 if (vq->vq_dmamap) 869 bus_dmamap_destroy(sc->sc_dmat, vq->vq_dmamap); 870 if (vq->vq_vaddr) 871 bus_dmamem_unmap(sc->sc_dmat, vq->vq_vaddr, allocsize); 872 if (vq->vq_segs[0].ds_addr) 873 bus_dmamem_free(sc->sc_dmat, &vq->vq_segs[0], 1); 874 memset(vq, 0, sizeof(*vq)); 875 876 return -1; 877} 878 879int 880virtio_free_vq(struct virtio_softc *sc, struct virtqueue *vq) 881{ 882 struct vq_entry *qe; 883 int i = 0; 884 885 /* device must be already deactivated */ 886 /* confirm the vq is empty */ 887 SIMPLEQ_FOREACH(qe, &vq->vq_freelist, qe_list) { 888 i++; 889 } 890 if (i != vq->vq_num) { 891 printf("%s: freeing non-empty vq, index %d\n", 892 device_xname(sc->sc_dev), vq->vq_index); 893 return EBUSY; 894 } 895 896 /* tell device that there's no virtqueue any longer */ 897 sc->sc_ops->setup_queue(sc, vq->vq_index, 0); 898 899 vq_sync_aring_all(sc, vq, BUS_DMASYNC_POSTWRITE); 900 901 kmem_free(vq->vq_entries, sizeof(*vq->vq_entries) * vq->vq_num); 902 bus_dmamap_unload(sc->sc_dmat, vq->vq_dmamap); 903 bus_dmamap_destroy(sc->sc_dmat, vq->vq_dmamap); 904 bus_dmamem_unmap(sc->sc_dmat, vq->vq_vaddr, vq->vq_bytesize); 905 bus_dmamem_free(sc->sc_dmat, &vq->vq_segs[0], 1); 906 mutex_destroy(&vq->vq_freelist_lock); 907 mutex_destroy(&vq->vq_uring_lock); 908 mutex_destroy(&vq->vq_aring_lock); 909 memset(vq, 0, sizeof(*vq)); 910 911 return 0; 912} 913 914/* 915 * Free descriptor management. 916 */ 917static struct vq_entry * 918vq_alloc_entry(struct virtqueue *vq) 919{ 920 struct vq_entry *qe; 921 922 mutex_enter(&vq->vq_freelist_lock); 923 if (SIMPLEQ_EMPTY(&vq->vq_freelist)) { 924 mutex_exit(&vq->vq_freelist_lock); 925 return NULL; 926 } 927 qe = SIMPLEQ_FIRST(&vq->vq_freelist); 928 SIMPLEQ_REMOVE_HEAD(&vq->vq_freelist, qe_list); 929 mutex_exit(&vq->vq_freelist_lock); 930 931 return qe; 932} 933 934static void 935vq_free_entry(struct virtqueue *vq, struct vq_entry *qe) 936{ 937 mutex_enter(&vq->vq_freelist_lock); 938 SIMPLEQ_INSERT_TAIL(&vq->vq_freelist, qe, qe_list); 939 mutex_exit(&vq->vq_freelist_lock); 940 941 return; 942} 943 944/* 945 * Enqueue several dmamaps as a single request. 946 */ 947/* 948 * Typical usage: 949 * <queue size> number of followings are stored in arrays 950 * - command blocks (in dmamem) should be pre-allocated and mapped 951 * - dmamaps for command blocks should be pre-allocated and loaded 952 * - dmamaps for payload should be pre-allocated 953 * r = virtio_enqueue_prep(sc, vq, &slot); // allocate a slot 954 * if (r) // currently 0 or EAGAIN 955 * return r; 956 * r = bus_dmamap_load(dmat, dmamap_payload[slot], data, count, ..); 957 * if (r) { 958 * virtio_enqueue_abort(sc, vq, slot); 959 * return r; 960 * } 961 * r = virtio_enqueue_reserve(sc, vq, slot, 962 * dmamap_payload[slot]->dm_nsegs + 1); 963 * // ^ +1 for command 964 * if (r) { // currently 0 or EAGAIN 965 * bus_dmamap_unload(dmat, dmamap_payload[slot]); 966 * return r; // do not call abort() 967 * } 968 * <setup and prepare commands> 969 * bus_dmamap_sync(dmat, dmamap_cmd[slot],... BUS_DMASYNC_PREWRITE); 970 * bus_dmamap_sync(dmat, dmamap_payload[slot],...); 971 * virtio_enqueue(sc, vq, slot, dmamap_cmd[slot], false); 972 * virtio_enqueue(sc, vq, slot, dmamap_payload[slot], iswrite); 973 * virtio_enqueue_commit(sc, vq, slot, true); 974 */ 975 976/* 977 * enqueue_prep: allocate a slot number 978 */ 979int 980virtio_enqueue_prep(struct virtio_softc *sc, struct virtqueue *vq, int *slotp) 981{ 982 struct vq_entry *qe1; 983 984 KASSERT(slotp != NULL); 985 986 qe1 = vq_alloc_entry(vq); 987 if (qe1 == NULL) 988 return EAGAIN; 989 /* next slot is not allocated yet */ 990 qe1->qe_next = -1; 991 *slotp = qe1->qe_index; 992 993 return 0; 994} 995 996/* 997 * enqueue_reserve: allocate remaining slots and build the descriptor chain. 998 */ 999int 1000virtio_enqueue_reserve(struct virtio_softc *sc, struct virtqueue *vq, 1001 int slot, int nsegs) 1002{ 1003 int indirect; 1004 struct vq_entry *qe1 = &vq->vq_entries[slot]; 1005 1006 KASSERT(qe1->qe_next == -1); 1007 KASSERT(1 <= nsegs && nsegs <= vq->vq_num); 1008 1009 if ((vq->vq_indirect != NULL) && 1010 (nsegs >= MINSEG_INDIRECT) && 1011 (nsegs <= vq->vq_maxnsegs)) 1012 indirect = 1; 1013 else 1014 indirect = 0; 1015 qe1->qe_indirect = indirect; 1016 1017 if (indirect) { 1018 struct vring_desc *vd; 1019 uint64_t addr; 1020 int i; 1021 1022 vd = &vq->vq_desc[qe1->qe_index]; 1023 addr = vq->vq_dmamap->dm_segs[0].ds_addr 1024 + vq->vq_indirectoffset; 1025 addr += sizeof(struct vring_desc) 1026 * vq->vq_maxnsegs * qe1->qe_index; 1027 vd->addr = virtio_rw64(sc, addr); 1028 vd->len = virtio_rw32(sc, sizeof(struct vring_desc) * nsegs); 1029 vd->flags = virtio_rw16(sc, VRING_DESC_F_INDIRECT); 1030 1031 vd = vq->vq_indirect; 1032 vd += vq->vq_maxnsegs * qe1->qe_index; 1033 qe1->qe_desc_base = vd; 1034 1035 for (i = 0; i < nsegs - 1; i++) { 1036 vd[i].flags = virtio_rw16(sc, VRING_DESC_F_NEXT); 1037 } 1038 vd[i].flags = virtio_rw16(sc, 0); 1039 qe1->qe_next = 0; 1040 1041 return 0; 1042 } else { 1043 struct vring_desc *vd; 1044 struct vq_entry *qe; 1045 int i, s; 1046 1047 vd = &vq->vq_desc[0]; 1048 qe1->qe_desc_base = vd; 1049 qe1->qe_next = qe1->qe_index; 1050 s = slot; 1051 for (i = 0; i < nsegs - 1; i++) { 1052 qe = vq_alloc_entry(vq); 1053 if (qe == NULL) { 1054 vd[s].flags = virtio_rw16(sc, 0); 1055 virtio_enqueue_abort(sc, vq, slot); 1056 return EAGAIN; 1057 } 1058 vd[s].flags = virtio_rw16(sc, VRING_DESC_F_NEXT); 1059 vd[s].next = virtio_rw16(sc, qe->qe_index); 1060 s = qe->qe_index; 1061 } 1062 vd[s].flags = virtio_rw16(sc, 0); 1063 1064 return 0; 1065 } 1066} 1067 1068/* 1069 * enqueue: enqueue a single dmamap. 1070 */ 1071int 1072virtio_enqueue(struct virtio_softc *sc, struct virtqueue *vq, int slot, 1073 bus_dmamap_t dmamap, bool write) 1074{ 1075 struct vq_entry *qe1 = &vq->vq_entries[slot]; 1076 struct vring_desc *vd = qe1->qe_desc_base; 1077 int i; 1078 int s = qe1->qe_next; 1079 1080 KASSERT(s >= 0); 1081 KASSERT(dmamap->dm_nsegs > 0); 1082 1083 for (i = 0; i < dmamap->dm_nsegs; i++) { 1084 vd[s].addr = virtio_rw64(sc, dmamap->dm_segs[i].ds_addr); 1085 vd[s].len = virtio_rw32(sc, dmamap->dm_segs[i].ds_len); 1086 if (!write) 1087 vd[s].flags |= virtio_rw16(sc, VRING_DESC_F_WRITE); 1088 s = virtio_rw16(sc, vd[s].next); 1089 } 1090 qe1->qe_next = s; 1091 1092 return 0; 1093} 1094 1095int 1096virtio_enqueue_p(struct virtio_softc *sc, struct virtqueue *vq, int slot, 1097 bus_dmamap_t dmamap, bus_addr_t start, bus_size_t len, 1098 bool write) 1099{ 1100 struct vq_entry *qe1 = &vq->vq_entries[slot]; 1101 struct vring_desc *vd = qe1->qe_desc_base; 1102 int s = qe1->qe_next; 1103 1104 KASSERT(s >= 0); 1105 KASSERT(dmamap->dm_nsegs == 1); /* XXX */ 1106 KASSERT(dmamap->dm_segs[0].ds_len > start); 1107 KASSERT(dmamap->dm_segs[0].ds_len >= start + len); 1108 1109 vd[s].addr = virtio_rw64(sc, dmamap->dm_segs[0].ds_addr + start); 1110 vd[s].len = virtio_rw32(sc, len); 1111 if (!write) 1112 vd[s].flags |= virtio_rw16(sc, VRING_DESC_F_WRITE); 1113 qe1->qe_next = virtio_rw16(sc, vd[s].next); 1114 1115 return 0; 1116} 1117 1118/* 1119 * enqueue_commit: add it to the aring. 1120 */ 1121int 1122virtio_enqueue_commit(struct virtio_softc *sc, struct virtqueue *vq, int slot, 1123 bool notifynow) 1124{ 1125 struct vq_entry *qe1; 1126 1127 if (slot < 0) { 1128 mutex_enter(&vq->vq_aring_lock); 1129 goto notify; 1130 } 1131 vq_sync_descs(sc, vq, BUS_DMASYNC_PREWRITE); 1132 qe1 = &vq->vq_entries[slot]; 1133 if (qe1->qe_indirect) 1134 vq_sync_indirect(sc, vq, slot, BUS_DMASYNC_PREWRITE); 1135 mutex_enter(&vq->vq_aring_lock); 1136 vq->vq_avail->ring[(vq->vq_avail_idx++) % vq->vq_num] = 1137 virtio_rw16(sc, slot); 1138 1139notify: 1140 if (notifynow) { 1141 uint16_t o, n, t; 1142 uint16_t flags; 1143 1144 o = virtio_rw16(sc, vq->vq_avail->idx) - 1; 1145 n = vq->vq_avail_idx; 1146 1147 /* 1148 * Prepare for `device->CPU' (host->guest) transfer 1149 * into the buffer. This must happen before we commit 1150 * the vq->vq_avail->idx update to ensure we're not 1151 * still using the buffer in case program-prior loads 1152 * or stores in it get delayed past the store to 1153 * vq->vq_avail->idx. 1154 */ 1155 vq_sync_uring_all(sc, vq, BUS_DMASYNC_PREREAD); 1156 1157 /* ensure payload is published, then avail idx */ 1158 vq_sync_aring_payload(sc, vq, BUS_DMASYNC_PREWRITE); 1159 vq->vq_avail->idx = virtio_rw16(sc, vq->vq_avail_idx); 1160 vq_sync_aring_header(sc, vq, BUS_DMASYNC_PREWRITE); 1161 vq->vq_queued++; 1162 1163 if (sc->sc_active_features & VIRTIO_F_RING_EVENT_IDX) { 1164 vq_sync_uring_avail(sc, vq, BUS_DMASYNC_POSTREAD); 1165 t = virtio_rw16(sc, *vq->vq_avail_event) + 1; 1166 if ((uint16_t) (n - t) < (uint16_t) (n - o)) 1167 sc->sc_ops->kick(sc, vq->vq_index); 1168 } else { 1169 vq_sync_uring_header(sc, vq, BUS_DMASYNC_POSTREAD); 1170 flags = virtio_rw16(sc, vq->vq_used->flags); 1171 if (!(flags & VRING_USED_F_NO_NOTIFY)) 1172 sc->sc_ops->kick(sc, vq->vq_index); 1173 } 1174 } 1175 mutex_exit(&vq->vq_aring_lock); 1176 1177 return 0; 1178} 1179 1180/* 1181 * enqueue_abort: rollback. 1182 */ 1183int 1184virtio_enqueue_abort(struct virtio_softc *sc, struct virtqueue *vq, int slot) 1185{ 1186 struct vq_entry *qe = &vq->vq_entries[slot]; 1187 struct vring_desc *vd; 1188 int s; 1189 1190 if (qe->qe_next < 0) { 1191 vq_free_entry(vq, qe); 1192 return 0; 1193 } 1194 1195 s = slot; 1196 vd = &vq->vq_desc[0]; 1197 while (virtio_rw16(sc, vd[s].flags) & VRING_DESC_F_NEXT) { 1198 s = virtio_rw16(sc, vd[s].next); 1199 vq_free_entry(vq, qe); 1200 qe = &vq->vq_entries[s]; 1201 } 1202 vq_free_entry(vq, qe); 1203 return 0; 1204} 1205 1206/* 1207 * Dequeue a request. 1208 */ 1209/* 1210 * dequeue: dequeue a request from uring; dmamap_sync for uring is 1211 * already done in the interrupt handler. 1212 */ 1213int 1214virtio_dequeue(struct virtio_softc *sc, struct virtqueue *vq, 1215 int *slotp, int *lenp) 1216{ 1217 uint16_t slot, usedidx; 1218 struct vq_entry *qe; 1219 1220 if (vq->vq_used_idx == virtio_rw16(sc, vq->vq_used->idx)) 1221 return ENOENT; 1222 mutex_enter(&vq->vq_uring_lock); 1223 usedidx = vq->vq_used_idx++; 1224 mutex_exit(&vq->vq_uring_lock); 1225 usedidx %= vq->vq_num; 1226 slot = virtio_rw32(sc, vq->vq_used->ring[usedidx].id); 1227 qe = &vq->vq_entries[slot]; 1228 1229 if (qe->qe_indirect) 1230 vq_sync_indirect(sc, vq, slot, BUS_DMASYNC_POSTWRITE); 1231 1232 if (slotp) 1233 *slotp = slot; 1234 if (lenp) 1235 *lenp = virtio_rw32(sc, vq->vq_used->ring[usedidx].len); 1236 1237 return 0; 1238} 1239 1240/* 1241 * dequeue_commit: complete dequeue; the slot is recycled for future use. 1242 * if you forget to call this the slot will be leaked. 1243 */ 1244int 1245virtio_dequeue_commit(struct virtio_softc *sc, struct virtqueue *vq, int slot) 1246{ 1247 struct vq_entry *qe = &vq->vq_entries[slot]; 1248 struct vring_desc *vd = &vq->vq_desc[0]; 1249 int s = slot; 1250 1251 while (virtio_rw16(sc, vd[s].flags) & VRING_DESC_F_NEXT) { 1252 s = virtio_rw16(sc, vd[s].next); 1253 vq_free_entry(vq, qe); 1254 qe = &vq->vq_entries[s]; 1255 } 1256 vq_free_entry(vq, qe); 1257 1258 return 0; 1259} 1260 1261/* 1262 * Attach a child, fill all the members. 1263 */ 1264void 1265virtio_child_attach_start(struct virtio_softc *sc, device_t child, int ipl, 1266 uint64_t req_features, const char *feat_bits) 1267{ 1268 char buf[1024]; 1269 1270 sc->sc_child = child; 1271 sc->sc_ipl = ipl; 1272 1273 virtio_negotiate_features(sc, req_features); 1274 snprintb(buf, sizeof(buf), feat_bits, sc->sc_active_features); 1275 aprint_normal(": features: %s\n", buf); 1276 aprint_naive("\n"); 1277} 1278 1279int 1280virtio_child_attach_finish(struct virtio_softc *sc, 1281 struct virtqueue *vqs, size_t nvqs, 1282 virtio_callback config_change, virtio_callback intr_hand, 1283 int req_flags) 1284{ 1285 int r; 1286 1287#ifdef DIAGNOSTIC 1288 KASSERT(nvqs > 0); 1289#define VIRTIO_ASSERT_FLAGS (VIRTIO_F_INTR_SOFTINT | VIRTIO_F_INTR_PERVQ) 1290 KASSERT((req_flags & VIRTIO_ASSERT_FLAGS) != VIRTIO_ASSERT_FLAGS); 1291#undef VIRTIO_ASSERT_FLAGS 1292 1293 for (size_t _i = 0; _i < nvqs; _i++){ 1294 KASSERT(vqs[_i].vq_index == _i); 1295 KASSERT((req_flags & VIRTIO_F_INTR_PERVQ) == 0 || 1296 vqs[_i].vq_intrhand != NULL); 1297 } 1298#endif 1299 1300 sc->sc_finished_called = true; 1301 1302 sc->sc_vqs = vqs; 1303 sc->sc_nvqs = nvqs; 1304 sc->sc_config_change = config_change; 1305 sc->sc_intrhand = intr_hand; 1306 sc->sc_flags = req_flags; 1307 1308 r = sc->sc_ops->alloc_interrupts(sc); 1309 if (r != 0) { 1310 aprint_error_dev(sc->sc_dev, 1311 "failed to allocate interrupts\n"); 1312 goto fail; 1313 } 1314 1315 r = sc->sc_ops->setup_interrupts(sc, 0); 1316 if (r != 0) { 1317 aprint_error_dev(sc->sc_dev, "failed to setup interrupts\n"); 1318 goto fail; 1319 } 1320 1321 KASSERT(sc->sc_soft_ih == NULL); 1322 if (sc->sc_flags & VIRTIO_F_INTR_SOFTINT) { 1323 u_int flags = SOFTINT_NET; 1324 if (sc->sc_flags & VIRTIO_F_INTR_MPSAFE) 1325 flags |= SOFTINT_MPSAFE; 1326 1327 sc->sc_soft_ih = softint_establish(flags, virtio_soft_intr, 1328 sc); 1329 if (sc->sc_soft_ih == NULL) { 1330 sc->sc_ops->free_interrupts(sc); 1331 aprint_error_dev(sc->sc_dev, 1332 "failed to establish soft interrupt\n"); 1333 goto fail; 1334 } 1335 } 1336 1337 virtio_set_status(sc, VIRTIO_CONFIG_DEVICE_STATUS_DRIVER_OK); 1338 return 0; 1339 1340fail: 1341 if (sc->sc_soft_ih) { 1342 softint_disestablish(sc->sc_soft_ih); 1343 sc->sc_soft_ih = NULL; 1344 } 1345 1346 sc->sc_ops->free_interrupts(sc); 1347 1348 virtio_set_status(sc, VIRTIO_CONFIG_DEVICE_STATUS_FAILED); 1349 return 1; 1350} 1351 1352void 1353virtio_child_detach(struct virtio_softc *sc) 1354{ 1355 sc->sc_child = NULL; 1356 sc->sc_vqs = NULL; 1357 1358 virtio_device_reset(sc); 1359 1360 sc->sc_ops->free_interrupts(sc); 1361 1362 if (sc->sc_soft_ih) { 1363 softint_disestablish(sc->sc_soft_ih); 1364 sc->sc_soft_ih = NULL; 1365 } 1366} 1367 1368void 1369virtio_child_attach_failed(struct virtio_softc *sc) 1370{ 1371 virtio_child_detach(sc); 1372 1373 virtio_set_status(sc, VIRTIO_CONFIG_DEVICE_STATUS_FAILED); 1374 1375 sc->sc_child = VIRTIO_CHILD_FAILED; 1376} 1377 1378bus_dma_tag_t 1379virtio_dmat(struct virtio_softc *sc) 1380{ 1381 return sc->sc_dmat; 1382} 1383 1384device_t 1385virtio_child(struct virtio_softc *sc) 1386{ 1387 return sc->sc_child; 1388} 1389 1390int 1391virtio_intrhand(struct virtio_softc *sc) 1392{ 1393 return (*sc->sc_intrhand)(sc); 1394} 1395 1396uint64_t 1397virtio_features(struct virtio_softc *sc) 1398{ 1399 return sc->sc_active_features; 1400} 1401 1402int 1403virtio_attach_failed(struct virtio_softc *sc) 1404{ 1405 device_t self = sc->sc_dev; 1406 1407 /* no error if its not connected, but its failed */ 1408 if (sc->sc_childdevid == 0) 1409 return 1; 1410 1411 if (sc->sc_child == NULL) { 1412 aprint_error_dev(self, 1413 "no matching child driver; not configured\n"); 1414 return 1; 1415 } 1416 1417 if (sc->sc_child == VIRTIO_CHILD_FAILED) { 1418 aprint_error_dev(self, "virtio configuration failed\n"); 1419 return 1; 1420 } 1421 1422 /* sanity check */ 1423 if (!sc->sc_finished_called) { 1424 aprint_error_dev(self, "virtio internal error, child driver " 1425 "signaled OK but didn't initialize interrupts\n"); 1426 return 1; 1427 } 1428 1429 return 0; 1430} 1431 1432void 1433virtio_print_device_type(device_t self, int id, int revision) 1434{ 1435 aprint_normal_dev(self, "%s device (id %d, rev. 0x%02x)\n", 1436 (id < NDEVNAMES ? virtio_device_name[id] : "Unknown"), 1437 id, 1438 revision); 1439} 1440 1441 1442MODULE(MODULE_CLASS_DRIVER, virtio, NULL); 1443 1444#ifdef _MODULE 1445#include "ioconf.c" 1446#endif 1447 1448static int 1449virtio_modcmd(modcmd_t cmd, void *opaque) 1450{ 1451 int error = 0; 1452 1453#ifdef _MODULE 1454 switch (cmd) { 1455 case MODULE_CMD_INIT: 1456 error = config_init_component(cfdriver_ioconf_virtio, 1457 cfattach_ioconf_virtio, cfdata_ioconf_virtio); 1458 break; 1459 case MODULE_CMD_FINI: 1460 error = config_fini_component(cfdriver_ioconf_virtio, 1461 cfattach_ioconf_virtio, cfdata_ioconf_virtio); 1462 break; 1463 default: 1464 error = ENOTTY; 1465 break; 1466 } 1467#endif 1468 1469 return error; 1470} 1471