pciide_cy693_reg.h revision 1.6 
1/*	$NetBSD: pciide_cy693_reg.h,v 1.6 2002/04/23 20:41:18 bouyer Exp $	*/
2
3/*
4 * Copyright (c) 1998 Manuel Bouyer.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 *    must display the following acknowledgement:
16 *	This product includes software developed by Manuel Bouyer.
17 * 4. Neither the name of the University nor the names of its contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
33
34/*
35 * Registers definitions for Contaq/Cypress's CY82693U PCI IDE controller.
36 * Available from http://www.cypress.com/japan/prodgate/chip/cy82c693.html
37 * This chip has 2 PCI IDE functions, each of them has only one channel
38 * So there's no primary/secodary distinction in the registers defs.
39 */
40
41/* IDE control register */
42#define CY_CTRL 0x40
43#define CY_CTRL_RETRY			0x00002000
44#define CY_CTRL_SLAVE_PREFETCH		0x00000400
45#define CY_CTRL_POSTWRITE		0x00000200
46#define	CY_CTRL_PREFETCH(drive)		(0x00000100 << (2 * (drive)))
47#define CY_CTRL_POSTWRITE_LENGTH_MASK	0x00000030
48#define CY_CTRL_POSTWRITE_LENGTH_OFF    4
49#define CY_CTRL_PREFETCH_LENGTH_MASK	0x00000003
50#define CY_CTRL_PREFETCH_LENGTH_OFF	0
51
52/* IDE addr setup control register */
53#define CY_ADDR_CTRL 0x48
54#define CY_ADDR_CTRL_SETUP_OFF(drive)  (4 * (drive))
55#define CY_ADDR_CTRL_SETUP_MASK(drive) \
56	(0x00000007 << CY_ADDR_CTRL_SETUP_OFF(drive))
57
58/* command control register */
59#define CY_CMD_CTRL 0x4c
60#define CY_CMD_CTRL_IOW_PULSE_OFF(drive)	(12 + 16 * (drive))
61#define CY_CMD_CTRL_IOW_REC_OFF(drive)		(8 + 16 * (drive))
62#define CY_CMD_CTRL_IOR_PULSE_OFF(drive)	(4 + 16 * (drive))
63#define CY_CMD_CTRL_IOR_REC_OFF(drive)		(0 + 16 * (drive))
64
65static const int8_t cy_pio_pulse[] __attribute__((__unused__)) =
66    {9, 4, 3, 2, 2};
67static const int8_t cy_pio_rec[] __attribute__((__unused__)) =
68    {9, 7, 4, 2, 0};
69#ifdef unused
70static const int8_t cy_dma_pulse[] __attribute__((__unused__)) =
71    {7, 2, 2};
72static const int8_t cy_dma_rec[] __attribute__((__unused__)) =
73    {7, 1, 0};
74#endif
75
76/*
77 * The cypress is quite weird: it uses 8-bit ISA registers to control
78 * DMA modes.
79 */
80
81#define CY_DMA_ADDR 0x22
82#define CY_DMA_SIZE 0x2
83
84#define CY_DMA_IDX 0x00
85#define CY_DMA_IDX_PRIMARY	0x30
86#define CY_DMA_IDX_SECONDARY	0x31
87#define CY_DMA_IDX_TIMEOUT	0x32
88
89#define CY_DMA_DATA 0x01
90/* Multiword DMA transfer, for CY_DMA_IDX_PRIMARY or CY_DMA_IDX_SECONDARY */
91#define CY_DMA_DATA_MODE_MASK	0x03
92#define CY_DMA_DATA_SINGLE	0x04
93