pciide_cy693_reg.h revision 1.5 
1/*	$NetBSD: pciide_cy693_reg.h,v 1.5 2001/10/21 18:49:20 thorpej Exp $	*/
2
3/*
4 * Copyright (c) 1998 Manuel Bouyer.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 *    must display the following acknowledgement:
16 *	This product includes software developed by the University of
17 *	California, Berkeley and its contributors.
18 * 4. Neither the name of the University nor the names of its contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 */
34
35/*
36 * Registers definitions for Contaq/Cypress's CY82693U PCI IDE controller.
37 * Available from http://www.cypress.com/japan/prodgate/chip/cy82c693.html
38 * This chip has 2 PCI IDE functions, each of them has only one channel
39 * So there's no primary/secodary distinction in the registers defs.
40 */
41
42/* IDE control register */
43#define CY_CTRL 0x40
44#define CY_CTRL_RETRY			0x00002000
45#define CY_CTRL_SLAVE_PREFETCH		0x00000400
46#define CY_CTRL_POSTWRITE		0x00000200
47#define	CY_CTRL_PREFETCH(drive)		(0x00000100 << (2 * (drive)))
48#define CY_CTRL_POSTWRITE_LENGTH_MASK	0x00000030
49#define CY_CTRL_POSTWRITE_LENGTH_OFF    4
50#define CY_CTRL_PREFETCH_LENGTH_MASK	0x00000003
51#define CY_CTRL_PREFETCH_LENGTH_OFF	0
52
53/* IDE addr setup control register */
54#define CY_ADDR_CTRL 0x48
55#define CY_ADDR_CTRL_SETUP_OFF(drive)  (4 * (drive))
56#define CY_ADDR_CTRL_SETUP_MASK(drive) \
57	(0x00000007 << CY_ADDR_CTRL_SETUP_OFF(drive))
58
59/* command control register */
60#define CY_CMD_CTRL 0x4c
61#define CY_CMD_CTRL_IOW_PULSE_OFF(drive)	(12 + 16 * (drive))
62#define CY_CMD_CTRL_IOW_REC_OFF(drive)		(8 + 16 * (drive))
63#define CY_CMD_CTRL_IOR_PULSE_OFF(drive)	(4 + 16 * (drive))
64#define CY_CMD_CTRL_IOR_REC_OFF(drive)		(0 + 16 * (drive))
65
66static const int8_t cy_pio_pulse[] __attribute__((__unused__)) =
67    {9, 4, 3, 2, 2};
68static const int8_t cy_pio_rec[] __attribute__((__unused__)) =
69    {9, 7, 4, 2, 0};
70#ifdef unused
71static const int8_t cy_dma_pulse[] __attribute__((__unused__)) =
72    {7, 2, 2};
73static const int8_t cy_dma_rec[] __attribute__((__unused__)) =
74    {7, 1, 0};
75#endif
76
77/*
78 * The cypress is quite weird: it uses 8-bit ISA registers to control
79 * DMA modes.
80 */
81
82#define CY_DMA_ADDR 0x22
83#define CY_DMA_SIZE 0x2
84
85#define CY_DMA_IDX 0x00
86#define CY_DMA_IDX_PRIMARY	0x30
87#define CY_DMA_IDX_SECONDARY	0x31
88#define CY_DMA_IDX_TIMEOUT	0x32
89
90#define CY_DMA_DATA 0x01
91/* Multiword DMA transfer, for CY_DMA_IDX_PRIMARY or CY_DMA_IDX_SECONDARY */
92#define CY_DMA_DATA_MODE_MASK	0x03
93#define CY_DMA_DATA_SINGLE	0x04
94