pciide_cy693_reg.h revision 1.1 
1/*	$NetBSD: pciide_cy693_reg.h,v 1.1 1998/11/21 16:06:45 drochner Exp $	*/
2
3/*
4 * Copyright (c) 1998 Manuel Bouyer.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 *    must display the following acknowledgement:
16 *	This product includes software developed by the University of
17 *	California, Berkeley and its contributors.
18 * 4. Neither the name of the University nor the names of its contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 */
35
36/*
37 * Registers definitions for Contaq/Cypress's CY82693U PCI IDE controller.
38 * Available from ?
39 * This chip has 2 PCI IDE functions, each of them has only one channel
40 * So there's no primary/secodary distinction in the registers defs.
41 */
42
43/* IDE control register */
44#define CY_CTRL 0x40
45#define CY_CTRL_RETRY			0x00002000
46#define CY_CTRL_SLAVE_PREFETCH		0x00000400
47#define CY_CTRL_POSTWRITE		0x00000200
48#define	CY_CTRL_PREFETCH(drive)		(0x00000100 << (2 * (drive)))
49#define CY_CTRL_POSTWRITE_LENGTH_MASK	0x00000030
50#define CY_CTRL_POSTWRITE_LENGTH_OFF    4
51#define CY_CTRL_PREFETCH_LENGTH_MASK	0x00000003
52#define CY_CTRL_PREFETCH_LENGTH_OFF	0
53
54/* IDE addr setup control register */
55#define CY_ADDR_CTRL 0x48
56#define CY_ADDR_CTRL_SETUP_OFF(drive)  (4 * (drive))
57#define CY_ADDR_CTRL_SETUP_MASK(drive) \
58	(0x00000007 << CY_ADDR_CTRL_SETUP_OFF(drive))
59
60/* command control register */
61#define CY_CMD_CTRL 0x4c
62#define CY_CMD_CTRL_IOW_PULSE_OFF(drive)	(12 + 16 * (drive))
63#define CY_CMD_CTRL_IOW_REC_OFF(drive)		(8 + 16 * (drive))
64#define CY_CMD_CTRL_IOR_PULSE_OFF(drive)	(4 + 16 * (drive))
65#define CY_CMD_CTRL_IOR_REC_OFF(drive)		(0 + 16 * (drive))
66
67static int8_t cy_pio_pulse[] = {9, 4, 3, 2, 2};
68static int8_t cy_pio_rec[] =   {9, 7, 4, 2, 0};
69#ifdef unused
70static int8_t cy_dma_pulse[] = {7, 2, 2};
71static int8_t cy_dma_rec[] =   {7, 1, 0};
72#endif
73