nfsmb.c revision 1.6 
1/*	$NetBSD: nfsmb.c,v 1.6 2007/09/01 22:19:25 riz Exp $	*/
2/*
3 * Copyright (c) 2007 KIYOHARA Takashi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 *
27 */
28#include <sys/cdefs.h>
29__KERNEL_RCSID(0, "$NetBSD: nfsmb.c,v 1.6 2007/09/01 22:19:25 riz Exp $");
30
31#include <sys/param.h>
32#include <sys/device.h>
33#include <sys/errno.h>
34#include <sys/kernel.h>
35#include <sys/rwlock.h>
36#include <sys/proc.h>
37
38#include <machine/bus.h>
39
40#include <dev/i2c/i2cvar.h>
41
42#include <dev/pci/pcivar.h>
43#include <dev/pci/pcireg.h>
44#include <dev/pci/pcidevs.h>
45
46#include <dev/pci/nfsmbreg.h>
47
48
49struct nfsmbc_attach_args {
50	int nfsmb_num;
51	bus_space_tag_t nfsmb_iot;
52	int nfsmb_addr;
53};
54
55struct nfsmb_softc;
56struct nfsmbc_softc {
57	struct device sc_dev;
58
59	pci_chipset_tag_t sc_pc;
60	pcitag_t sc_tag;
61	struct pci_attach_args *sc_pa;
62
63	bus_space_tag_t sc_iot;
64	struct device *sc_nfsmb[2];
65};
66
67struct nfsmb_softc {
68	struct device sc_dev;
69	int sc_num;
70	struct device *sc_nfsmbc;
71
72	bus_space_tag_t sc_iot;
73	bus_space_handle_t sc_ioh;
74
75	struct i2c_controller sc_i2c;	/* i2c controller info */
76	krwlock_t sc_rwlock;
77};
78
79
80static int nfsmbc_match(struct device *, struct cfdata *, void *);
81static void nfsmbc_attach(struct device *, struct device *, void *);
82static int nfsmbc_print(void *, const char *);
83
84static int nfsmb_match(struct device *, struct cfdata *, void *);
85static void nfsmb_attach(struct device *, struct device *, void *);
86static int nfsmb_acquire_bus(void *, int);
87static void nfsmb_release_bus(void *, int);
88static int nfsmb_exec(
89    void *, i2c_op_t, i2c_addr_t, const void *, size_t, void *, size_t, int);
90static int nfsmb_check_done(struct nfsmb_softc *);
91static int
92    nfsmb_send_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
93static int nfsmb_write_1(
94    struct nfsmb_softc *, uint8_t, uint8_t, i2c_addr_t, i2c_op_t, int);
95static int nfsmb_write_2(
96    struct nfsmb_softc *, uint8_t, uint16_t, i2c_addr_t, i2c_op_t, int);
97static int nfsmb_receive_1(struct nfsmb_softc *, i2c_addr_t, i2c_op_t, int);
98static int
99    nfsmb_read_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
100static int
101    nfsmb_read_2(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
102
103
104CFATTACH_DECL(nfsmbc, sizeof(struct nfsmbc_softc),
105    nfsmbc_match, nfsmbc_attach, NULL, NULL);
106
107static int
108nfsmbc_match(struct device *parent, struct cfdata *match, void *aux)
109{
110	struct pci_attach_args *pa = aux;
111
112	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NVIDIA) {
113		switch (PCI_PRODUCT(pa->pa_id)) {
114		case PCI_PRODUCT_NVIDIA_NFORCE2_SMBUS:
115		case PCI_PRODUCT_NVIDIA_NFORCE2_400_SMBUS:
116		case PCI_PRODUCT_NVIDIA_NFORCE3_SMBUS:
117		case PCI_PRODUCT_NVIDIA_NFORCE3_250_SMBUS:
118		case PCI_PRODUCT_NVIDIA_NFORCE4_SMBUS:
119		case PCI_PRODUCT_NVIDIA_MCP04_SMBUS:
120			return 1;
121		}
122	}
123
124	return 0;
125}
126
127static void
128nfsmbc_attach(struct device *parent, struct device *self, void *aux)
129{
130	struct nfsmbc_softc *sc = (struct nfsmbc_softc *) self;
131	struct pci_attach_args *pa = aux;
132	struct nfsmbc_attach_args nfsmbca;
133	pcireg_t reg;
134	char devinfo[256];
135
136	aprint_naive("\n");
137	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
138	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
139	    PCI_REVISION(pa->pa_class));
140
141	sc->sc_pc = pa->pa_pc;
142	sc->sc_tag = pa->pa_tag;
143	sc->sc_pa = pa;
144	sc->sc_iot = pa->pa_iot;
145
146	nfsmbca.nfsmb_iot = sc->sc_iot;
147
148	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, NFORCE_SMB1);
149	nfsmbca.nfsmb_num = 1;
150	nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
151	sc->sc_nfsmb[0] = config_found(&sc->sc_dev, &nfsmbca, nfsmbc_print);
152
153	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, NFORCE_SMB2);
154	nfsmbca.nfsmb_num = 2;
155	nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
156	sc->sc_nfsmb[1] = config_found(&sc->sc_dev, &nfsmbca, nfsmbc_print);
157}
158
159static int
160nfsmbc_print(void *aux, const char *pnp)
161{
162	struct nfsmbc_attach_args *nfsmbcap = aux;
163
164	if (pnp)
165		aprint_normal("nfsmb SMBus %d at %s",
166		    nfsmbcap->nfsmb_num, pnp);
167	else
168		aprint_normal(" SMBus %d", nfsmbcap->nfsmb_num);
169	return UNCONF;
170}
171
172
173CFATTACH_DECL(nfsmb, sizeof(struct nfsmb_softc),
174    nfsmb_match, nfsmb_attach, NULL, NULL);
175
176static int
177nfsmb_match(struct device *parent, struct cfdata *match, void *aux)
178{
179	struct nfsmbc_attach_args *nfsmbcap = aux;
180
181	if (nfsmbcap->nfsmb_num == 1 || nfsmbcap->nfsmb_num == 2)
182		return 1;
183	return 0;
184}
185
186static void
187nfsmb_attach(struct device *parent, struct device *self, void *aux)
188{
189	struct nfsmb_softc *sc = (struct nfsmb_softc *) self;
190	struct nfsmbc_attach_args *nfsmbcap = aux;
191	struct i2cbus_attach_args iba;
192
193	aprint_naive("\n");
194	aprint_normal("\n");
195
196	sc->sc_nfsmbc = parent;
197	sc->sc_num = nfsmbcap->nfsmb_num;
198	sc->sc_iot = nfsmbcap->nfsmb_iot;
199
200	/* register with iic */
201	sc->sc_i2c.ic_cookie = sc;
202	sc->sc_i2c.ic_acquire_bus = nfsmb_acquire_bus;
203	sc->sc_i2c.ic_release_bus = nfsmb_release_bus;
204	sc->sc_i2c.ic_send_start = NULL;
205	sc->sc_i2c.ic_send_stop = NULL;
206	sc->sc_i2c.ic_initiate_xfer = NULL;
207	sc->sc_i2c.ic_read_byte = NULL;
208	sc->sc_i2c.ic_write_byte = NULL;
209	sc->sc_i2c.ic_exec = nfsmb_exec;
210
211	rw_init(&sc->sc_rwlock);
212
213	if (bus_space_map(sc->sc_iot, nfsmbcap->nfsmb_addr, NFORCE_SMBSIZE, 0,
214	    &sc->sc_ioh) != 0) {
215		aprint_error("%s: failed to map SMBus space\n",
216		    sc->sc_dev.dv_xname);
217		return;
218	}
219
220	iba.iba_type = I2C_TYPE_SMBUS;
221	iba.iba_tag = &sc->sc_i2c;
222	(void) config_found_ia(&sc->sc_dev, "i2cbus", &iba, iicbus_print);
223}
224
225static int
226nfsmb_acquire_bus(void *cookie, int flags)
227{
228	struct nfsmb_softc *sc = cookie;
229
230	rw_enter(&sc->sc_rwlock, RW_WRITER);
231	return 0;
232}
233
234static void
235nfsmb_release_bus(void *cookie, int flags)
236{
237	struct nfsmb_softc *sc = cookie;
238
239	rw_exit(&sc->sc_rwlock);
240}
241
242static int
243nfsmb_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *cmd,
244	   size_t cmdlen, void *vbuf, size_t buflen, int flags)
245{
246	struct nfsmb_softc *sc  = (struct nfsmb_softc *)cookie;
247	uint8_t *p = vbuf;
248	int rv;
249
250	if (I2C_OP_READ_P(op) && (cmdlen == 0) && (buflen == 1)) {
251		rv = nfsmb_receive_1(sc, addr, op, flags);
252		if (rv == -1)
253			return -1;
254		*p = (uint8_t)rv;
255		return 0;
256	}
257
258	if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 1)) {
259		rv = nfsmb_read_1(sc, *(const uint8_t*)cmd, addr, op, flags);
260		if (rv == -1)
261			return -1;
262		*p = (uint8_t)rv;
263		return 0;
264	}
265
266	if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 2)) {
267		rv = nfsmb_read_2(sc, *(const uint8_t*)cmd, addr, op, flags);
268		if (rv == -1)
269			return -1;
270		*p = (uint8_t)rv;
271		return 0;
272	}
273
274	if ((I2C_OP_WRITE_P(op)) && (cmdlen == 0) && (buflen == 1))
275		return nfsmb_send_1(sc, *(uint8_t*)vbuf, addr, op, flags);
276
277	if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 1))
278		return nfsmb_write_1(sc, *(const uint8_t*)cmd, *(uint8_t*)vbuf,
279		    addr, op, flags);
280
281	if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 2))
282		return nfsmb_write_2(sc,
283		    *(const uint8_t*)cmd, *((uint16_t *)vbuf), addr, op, flags);
284
285	return -1;
286}
287
288static int
289nfsmb_check_done(struct nfsmb_softc *sc)
290{
291	int us;
292	uint8_t stat;
293
294	us = 10 * 1000;	/* XXXX: wait maximum 10 msec */
295	do {
296		delay(10);
297		us -= 10;
298		if (us <= 0)
299			return -1;
300	} while (bus_space_read_1(sc->sc_iot, sc->sc_ioh,
301	    NFORCE_SMB_PROTOCOL) != 0);
302
303	stat = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_STATUS);
304	if ((stat & NFORCE_SMB_STATUS_DONE) &&
305	    !(stat & NFORCE_SMB_STATUS_STATUS))
306		return 0;
307	return -1;
308}
309
310/* ARGSUSED */
311static int
312nfsmb_send_1(struct nfsmb_softc *sc, uint8_t val, i2c_addr_t addr, i2c_op_t op,
313	     int flags)
314{
315	uint8_t data;
316
317	/* store cmd */
318	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, val);
319
320	/* write smbus slave address to register */
321	data = addr << 1;
322	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
323
324	/* write smbus protocol to register */
325	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
326	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
327
328	return nfsmb_check_done(sc);
329}
330
331/* ARGSUSED */
332static int
333nfsmb_write_1(struct nfsmb_softc *sc, uint8_t cmd, uint8_t val, i2c_addr_t addr,
334	      i2c_op_t op, int flags)
335{
336	uint8_t data;
337
338	/* store cmd */
339	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
340
341	/* store data */
342	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, val);
343
344	/* write smbus slave address to register */
345	data = addr << 1;
346	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
347
348	/* write smbus protocol to register */
349	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
350	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
351
352	return nfsmb_check_done(sc);
353}
354
355static int
356nfsmb_write_2(struct nfsmb_softc *sc, uint8_t cmd, uint16_t val,
357	      i2c_addr_t addr, i2c_op_t op, int flags)
358{
359	uint8_t data, low, high;
360
361	/* store cmd */
362	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
363
364	/* store data */
365	low = val;
366	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, low);
367	high = val >> 8;
368	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, high);
369
370	/* write smbus slave address to register */
371	data = addr << 1;
372	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
373
374	/* write smbus protocol to register */
375	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_WORD_DATA;
376	if (flags & I2C_F_PEC)
377		data |= NFORCE_SMB_PROTOCOL_PEC;
378	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
379
380	return nfsmb_check_done(sc);
381}
382
383/* ARGSUSED */
384static int
385nfsmb_receive_1(struct nfsmb_softc *sc, i2c_addr_t addr, i2c_op_t op, int flags)
386{
387	uint8_t data;
388
389	/* write smbus slave address to register */
390	data = addr << 1;
391	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
392
393	/* write smbus protocol to register */
394	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
395	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
396
397	/* check for errors */
398	if (nfsmb_check_done(sc) < 0)
399		return -1;
400
401	/* read data */
402	return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
403}
404
405/* ARGSUSED */
406static int
407nfsmb_read_1(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
408	     int flags)
409{
410	uint8_t data;
411
412	/* store cmd */
413	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
414
415	/* write smbus slave address to register */
416	data = addr << 1;
417	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
418
419	/* write smbus protocol to register */
420	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
421	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
422
423	/* check for errors */
424	if (nfsmb_check_done(sc) < 0)
425		return -1;
426
427	/* read data */
428	return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
429}
430
431static int
432nfsmb_read_2(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
433	     int flags)
434{
435	uint8_t data, low, high;
436
437	/* store cmd */
438	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
439
440	/* write smbus slave address to register */
441	data = addr << 1;
442	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
443
444	/* write smbus protocol to register */
445	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
446	if (flags & I2C_F_PEC)
447		data |= NFORCE_SMB_PROTOCOL_PEC;
448	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
449
450	/* check for errors */
451	if (nfsmb_check_done(sc) < 0)
452		return -1;
453
454	/* read data */
455	low = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
456	high = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
457	return low | high << 8;
458}
459