wdc_ofisa.c revision 1.4
1/* $NetBSD: wdc_ofisa.c,v 1.4 1998/10/23 13:58:17 bouyer Exp $ */ 2 3/* 4 * Copyright 1997, 1998 5 * Digital Equipment Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and 8 * copied only in accordance with the following terms and conditions. 9 * Subject to these conditions, you may download, copy, install, 10 * use, modify and distribute this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce 14 * and retain this copyright notice and list of conditions as 15 * they appear in the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Digital Equipment Corporation. Neither the "Digital Equipment 19 * Corporation" name nor any trademark or logo of Digital Equipment 20 * Corporation may be used to endorse or promote products derived 21 * from this software without the prior written permission of 22 * Digital Equipment Corporation. 23 * 24 * 3) This software is provided "AS-IS" and any express or implied 25 * warranties, including but not limited to, any implied warranties 26 * of merchantability, fitness for a particular purpose, or 27 * non-infringement are disclaimed. In no event shall DIGITAL be 28 * liable for any damages whatsoever, and in particular, DIGITAL 29 * shall not be liable for special, indirect, consequential, or 30 * incidental damages or damages for lost profits, loss of 31 * revenue or loss of use, whether such damages arise in contract, 32 * negligence, tort, under statute, in equity, at law or otherwise, 33 * even if advised of the possibility of such damage. 34 */ 35 36/* 37 * OFW Attachment for 'wdc' disk controller driver 38 */ 39 40#include <sys/param.h> 41#include <sys/device.h> 42#include <sys/systm.h> 43#include <sys/tty.h> 44#include <sys/malloc.h> 45 46#include <machine/intr.h> 47#include <machine/bus.h> 48 49#include <dev/ofw/openfirm.h> 50#include <dev/isa/isavar.h> 51#include <dev/ofisa/ofisavar.h> 52 53#include <dev/ic/wdcreg.h> /* ??? */ 54#include <dev/ata/atavar.h> 55#include <dev/ic/wdcvar.h> 56 57struct wdc_ofisa_softc { 58 struct wdc_softc sc_wdcdev; 59 struct channel_softc wdc_channel; 60 void *sc_ih; 61}; 62 63int wdc_ofisa_probe __P((struct device *, struct cfdata *, void *)); 64void wdc_ofisa_attach __P((struct device *, struct device *, void *)); 65 66struct cfattach wdc_ofisa_ca = { 67 sizeof(struct wdc_ofisa_softc), wdc_ofisa_probe, wdc_ofisa_attach 68}; 69 70int 71wdc_ofisa_probe(parent, cf, aux) 72 struct device *parent; 73 struct cfdata *cf; 74 void *aux; 75{ 76 struct ofisa_attach_args *aa = aux; 77 const char *compatible_strings[] = { "pnpPNP,600", NULL }; 78 int rv = 0; 79 80 if (of_compatible(aa->oba.oba_phandle, compatible_strings) != -1) 81 rv = 5; 82#ifdef _WDC_OFISA_MD_MATCH 83 if (!rv) 84 rv = wdc_ofisa_md_match(parent, cf, aux); 85#endif 86 return (rv); 87} 88 89void 90wdc_ofisa_attach(parent, self, aux) 91 struct device *parent, *self; 92 void *aux; 93{ 94 struct wdc_ofisa_softc *sc = (void *)self; 95 struct ofisa_attach_args *aa = aux; 96 struct ofisa_reg_desc reg[2]; 97 struct ofisa_intr_desc intr; 98 int n; 99 100 /* 101 * We're living on an ofw. We have to ask the OFW what our 102 * registers and interrupts properties look like. 103 * 104 * We expect exactly two register regions and one interrupt. 105 */ 106 107 n = ofisa_reg_get(aa->oba.oba_phandle, reg, 2); 108#ifdef _WDC_OFISA_MD_REG_FIXUP 109 n = wdc_ofisa_md_reg_fixup(parent, self, aux, reg, 2, n); 110#endif 111 if (n != 2) { 112 printf(": error getting register data\n"); 113 return; 114 } 115 if (reg[0].len != 8 || reg[1].len != 2) { 116 printf(": weird register size (%lu/%lu, expected 8/2)\n", 117 (unsigned long)reg[0].len, (unsigned long)reg[1].len); 118 return; 119 } 120 121 n = ofisa_intr_get(aa->oba.oba_phandle, &intr, 1); 122#ifdef _WDC_OFISA_MD_INTR_FIXUP 123 n = wdc_ofisa_md_intr_fixup(parent, self, aux, &intr, 1, n); 124#endif 125 if (n != 1) { 126 printf(": error getting interrupt data\n"); 127 return; 128 } 129 130 sc->wdc_channel.cmd_iot = 131 (reg[0].type == OFISA_REG_TYPE_IO) ? aa->iot : aa->memt; 132 sc->wdc_channel.ctl_iot = 133 (reg[1].type == OFISA_REG_TYPE_IO) ? aa->iot : aa->memt; 134 if (bus_space_map(sc->wdc_channel.cmd_iot, reg[0].addr, 8, 0, 135 &sc->wdc_channel.cmd_ioh) || 136 bus_space_map(sc->wdc_channel.ctl_iot, reg[1].addr, 1, 0, 137 &sc->wdc_channel.ctl_ioh)) { 138 printf(": can't map register spaces\n"); 139 return; 140 } 141 142 sc->sc_ih = isa_intr_establish(aa->ic, intr.irq, intr.share, 143 IPL_BIO, wdcintr, &sc->wdc_channel); 144 145 printf("\n"); 146 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16; 147 sc->sc_wdcdev.channels = &sc->wdc_channel; 148 sc->sc_wdcdev.nchannels = 1; 149 sc->wdc_channel.channel = 0; 150 sc->wdc_channel.wdc = &sc->sc_wdcdev; 151 sc->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue), 152 M_DEVBUF, M_NOWAIT); 153 if (sc->wdc_channel.ch_queue == NULL) { 154 printf("%s: can't allocate memory for command queue", 155 sc->sc_wdcdev.sc_dev.dv_xname); 156 return; 157 } 158 wdcattach(&sc->wdc_channel); 159 160#if 0 161 printf("%s: registers: ", sc->sc_dev.dv_xname); 162 ofisa_reg_print(reg, 2); 163 printf("\n"); 164 printf("%s: interrupts: ", sc->sc_dev.dv_xname); 165 ofisa_intr_print(&intr, 1); 166 printf("\n"); 167#endif 168} 169