i82365_isasubr.c revision 1.1 
1/*	$NetBSD: i82365_isasubr.c,v 1.1 1998/06/07 18:28:31 sommerfe Exp $	*/
2
3#define	PCICISADEBUG
4
5/*
6 * Copyright (c) 1998 Bill Sommerfeld.  All rights reserved.
7 * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed by Marc Horowitz.
20 * 4. The name of the author may not be used to endorse or promote products
21 *    derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35
36#include <sys/types.h>
37#include <sys/param.h>
38#include <sys/systm.h>
39#include <sys/device.h>
40#include <sys/extent.h>
41#include <sys/malloc.h>
42
43#include <vm/vm.h>
44
45#include <machine/bus.h>
46#include <machine/intr.h>
47
48#include <dev/isa/isareg.h>
49#include <dev/isa/isavar.h>
50
51#include <dev/pcmcia/pcmciareg.h>
52#include <dev/pcmcia/pcmciavar.h>
53#include <dev/pcmcia/pcmciachip.h>
54
55#include <dev/ic/i82365reg.h>
56#include <dev/ic/i82365var.h>
57#include <dev/isa/i82365_isavar.h>
58
59/*****************************************************************************
60 * Configurable parameters.
61 *****************************************************************************/
62
63#include "opt_pcic_isa_alloc_iobase.h"
64#include "opt_pcic_isa_alloc_iosize.h"
65#include "opt_pcic_isa_intr_alloc_mask.h"
66
67/*
68 * Default I/O allocation range.  If both are set to non-zero, these
69 * values will be used instead.  Otherwise, the code attempts to probe
70 * the bus width.  Systems with 10 address bits should use 0x300 and 0xff.
71 * Systems with 12 address bits (most) should use 0x400 and 0xbff.
72 */
73
74#ifndef PCIC_ISA_ALLOC_IOBASE
75#define	PCIC_ISA_ALLOC_IOBASE		0
76#endif
77
78#ifndef PCIC_ISA_ALLOC_IOSIZE
79#define	PCIC_ISA_ALLOC_IOSIZE		0
80#endif
81
82int	pcic_isa_alloc_iobase = PCIC_ISA_ALLOC_IOBASE;
83int	pcic_isa_alloc_iosize = PCIC_ISA_ALLOC_IOSIZE;
84
85
86/*
87 * Default IRQ allocation bitmask.  This defines the range of allowable
88 * IRQs for PCMCIA slots.  Useful if order of probing would screw up other
89 * devices, or if PCIC hardware/cards have trouble with certain interrupt
90 * lines.
91 *
92 * We disable IRQ 10 by default, since some common laptops (namely, the
93 * NEC Versa series) reserve IRQ 10 for the docking station SCSI interface.
94 */
95
96#ifndef PCIC_ISA_INTR_ALLOC_MASK
97#define	PCIC_ISA_INTR_ALLOC_MASK	0xfbff
98#endif
99
100int	pcic_isa_intr_alloc_mask = PCIC_ISA_INTR_ALLOC_MASK;
101
102/*****************************************************************************
103 * End of configurable parameters.
104 *****************************************************************************/
105
106#ifdef PCICISADEBUG
107int	pcicsubr_debug = 0 /* XXX */ ;
108#define	DPRINTF(arg) if (pcicsubr_debug) printf arg;
109#else
110#define	DPRINTF(arg)
111#endif
112
113void pcic_isa_bus_width_probe (sc, iot, ioh, base, length)
114	struct pcic_softc *sc;
115	bus_space_tag_t iot;
116	bus_space_handle_t ioh;
117	bus_addr_t base;
118	u_int32_t length;
119{
120	bus_space_handle_t ioh_high;
121	int i, iobuswidth, tmp1, tmp2;
122
123	/*
124	 * figure out how wide the isa bus is.  Do this by checking if the
125	 * pcic controller is mirrored 0x400 above where we expect it to be.
126	 */
127
128	iobuswidth = 12;
129
130	/* Map i/o space. */
131	if (bus_space_map(iot, base + 0x400, length, 0, &ioh_high)) {
132		printf("%s: can't map high i/o space\n", sc->dev.dv_xname);
133		return;
134	}
135
136	for (i = 0; i < PCIC_NSLOTS; i++) {
137		if (sc->handle[i].flags & PCIC_FLAG_SOCKETP) {
138			/*
139			 * read the ident flags from the normal space and
140			 * from the mirror, and compare them
141			 */
142
143			bus_space_write_1(iot, ioh, PCIC_REG_INDEX,
144			    sc->handle[i].sock + PCIC_IDENT);
145			tmp1 = bus_space_read_1(iot, ioh, PCIC_REG_DATA);
146
147			bus_space_write_1(iot, ioh_high, PCIC_REG_INDEX,
148			    sc->handle[i].sock + PCIC_IDENT);
149			tmp2 = bus_space_read_1(iot, ioh_high, PCIC_REG_DATA);
150
151			if (tmp1 == tmp2)
152				iobuswidth = 10;
153		}
154	}
155
156	bus_space_free(iot, ioh_high, length);
157
158	/*
159	 * XXX mycroft recommends I/O space range 0x400-0xfff .  I should put
160	 * this in a header somewhere
161	 */
162
163	/*
164	 * XXX some hardware doesn't seem to grok addresses in 0x400 range--
165	 * apparently missing a bit or more of address lines. (e.g.
166	 * CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI
167	 * TravelMate 5000--not clear which is at fault)
168	 *
169	 * Add a kludge to detect 10 bit wide buses and deal with them,
170	 * and also a config file option to override the probe.
171	 */
172
173	if (iobuswidth == 10) {
174		sc->iobase = 0x300;
175		sc->iosize = 0x0ff;
176	} else {
177#if 0
178		/*
179		 * This is what we'd like to use, but...
180		 */
181		sc->iobase = 0x400;
182		sc->iosize = 0xbff;
183#else
184		/*
185		 * ...the above bus width probe doesn't always work.
186		 * So, experimentation has shown the following range
187		 * to not lose on systems that 0x300-0x3ff loses on
188		 * (e.g. the NEC Versa 6030X).
189		 */
190		sc->iobase = 0x330;
191		sc->iosize = 0x0cf;
192#endif
193	}
194
195	DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx (probed)\n",
196	    sc->dev.dv_xname, (long) sc->iobase,
197
198	    (long) sc->iobase + sc->iosize));
199
200	if (pcic_isa_alloc_iobase && pcic_isa_alloc_iosize) {
201		sc->iobase = pcic_isa_alloc_iobase;
202		sc->iosize = pcic_isa_alloc_iosize;
203
204		DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx "
205		    "(config override)\n", sc->dev.dv_xname, (long) sc->iobase,
206		    (long) sc->iobase + sc->iosize));
207	}
208}
209
210
211void *
212pcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg)
213	pcmcia_chipset_handle_t pch;
214	struct pcmcia_function *pf;
215	int ipl;
216	int (*fct) __P((void *));
217	void *arg;
218{
219	struct pcic_handle *h = (struct pcic_handle *) pch;
220	isa_chipset_tag_t ic = h->sc->intr_est;
221	int irq, ist;
222	void *ih;
223	int reg;
224
225	if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL)
226		ist = IST_LEVEL;
227	else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE)
228		ist = IST_PULSE;
229	else
230		ist = IST_LEVEL;
231
232	if (isa_intr_alloc(ic,
233	    PCIC_INTR_IRQ_VALIDMASK & pcic_isa_intr_alloc_mask, ist, &irq))
234		return (NULL);
235	if ((ih = isa_intr_establish(ic, irq, ist, ipl,
236	    fct, arg)) == NULL)
237		return (NULL);
238
239	reg = pcic_read(h, PCIC_INTR);
240	reg &= ~PCIC_INTR_IRQ_MASK;
241	reg |= irq;
242	pcic_write(h, PCIC_INTR, reg);
243
244	h->ih_irq = irq;
245
246	printf("%s: card irq %d\n", h->pcmcia->dv_xname, irq);
247
248	return (ih);
249}
250
251void
252pcic_isa_chip_intr_disestablish(pch, ih)
253	pcmcia_chipset_handle_t pch;
254	void *ih;
255{
256	struct pcic_handle *h = (struct pcic_handle *) pch;
257	isa_chipset_tag_t ic = h->sc->intr_est;
258	int reg;
259
260	h->ih_irq = 0;
261
262	reg = pcic_read(h, PCIC_INTR);
263	reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
264	pcic_write(h, PCIC_INTR, reg);
265
266	isa_intr_disestablish(ic, ih);
267}
268