dpt_isa.c revision 1.2 
1/*	$NetBSD: dpt_isa.c,v 1.2 2000/03/16 15:09:59 ad Exp $	*/
2
3/*
4 * Copyright (c) 1999, 2000 Andy Doran <ad@NetBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 */
29
30/*
31 * ISA front-end for DPT EATA SCSI driver.
32 */
33
34#include <sys/cdefs.h>
35__KERNEL_RCSID(0, "$NetBSD: dpt_isa.c,v 1.2 2000/03/16 15:09:59 ad Exp $");
36
37#include <sys/types.h>
38#include <sys/param.h>
39#include <sys/systm.h>
40#include <sys/device.h>
41
42#include <machine/bus.h>
43#include <machine/intr.h>
44
45#include <dev/scsipi/scsi_all.h>
46#include <dev/scsipi/scsipi_all.h>
47#include <dev/scsipi/scsiconf.h>
48
49#include <dev/isa/isareg.h>
50#include <dev/isa/isavar.h>
51
52#include <dev/isa/isadmareg.h>
53#include <dev/isa/isadmavar.h>
54
55#include <dev/ic/dptreg.h>
56#include <dev/ic/dptvar.h>
57
58#define	DPT_ISA_IOSIZE		16
59#define DPT_ISA_MAXCCBS		16
60
61static int dpt_isa_match __P((struct device *, struct cfdata *, void *));
62static void dpt_isa_attach __P((struct device *, struct device *, void *));
63static int dpt_isa_probe __P((struct isa_attach_args *, int));
64static int dpt_isa_wait __P((bus_space_handle_t, bus_space_tag_t, u_int8_t,
65    u_int8_t));
66
67struct cfattach dpt_isa_ca = {
68	sizeof(struct dpt_softc), dpt_isa_match, dpt_isa_attach
69};
70
71/* Try 'less intrusive' addresses first */
72static int dpt_isa_iobases[] = { 0x230, 0x330, 0x1f0, 0x170, -1 };
73
74/*
75 * Wait for the HBA status register to reach a specific state.
76 */
77static int
78dpt_isa_wait(ioh, iot, mask, state)
79	bus_space_handle_t ioh;
80	bus_space_tag_t iot;
81	u_int8_t mask, state;
82{
83	int ms;
84
85	for (ms = 2000 * 10; ms; ms--) {
86		if ((bus_space_read_1(iot, ioh, HA_STATUS) & mask) == state)
87			return (0);
88		DELAY(100);
89	}
90	return (-1);
91}
92
93/*
94 * Match a supported board.
95 */
96static int
97dpt_isa_match(parent, match, aux)
98	struct device *parent;
99	struct cfdata *match;
100	void *aux;
101{
102	struct isa_attach_args *ia;
103	int i;
104
105	ia = aux;
106
107	if (ia->ia_iobase != ISACF_PORT_DEFAULT)
108		return (dpt_isa_probe(ia, ia->ia_iobase));
109
110	for (i = 0; dpt_isa_iobases[i] != -1; i++) {
111		if (dpt_isa_probe(ia, dpt_isa_iobases[i])) {
112			ia->ia_iobase = dpt_isa_iobases[i];
113			return (1);
114		}
115	}
116
117	return (0);
118}
119
120/*
121 * Probe for a supported board.
122 */
123static int
124dpt_isa_probe(ia, iobase)
125	struct isa_attach_args *ia;
126	int iobase;
127{
128	struct eata_cfg ec;
129	bus_space_handle_t ioh;
130	bus_space_tag_t iot;
131	int i, j, stat;
132	u_int16_t *p;
133
134	iot = ia->ia_iot;
135
136	if (bus_space_map(iot, iobase, DPT_ISA_IOSIZE, 0, &ioh) != 0)
137		return(0);
138
139	/*
140	 * Assumuing the DPT BIOS reset the board, we shouldn't need to
141	 * re-do it here. The tests below should weed out non-EATA devices
142	 * before we start poking any registers.
143	 */
144	for (i = 1000; i; i--) {
145		if ((bus_space_read_1(iot, ioh, HA_STATUS) & HA_ST_READY) != 0)
146			break;
147		DELAY(2000);
148	}
149
150	if (i == 0) {
151		bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE);
152		return (0);
153	}
154
155	while((((stat = bus_space_read_1(iot, ioh, HA_STATUS))
156	    != (HA_ST_READY|HA_ST_SEEK_COMPLETE))
157	    && (stat != (HA_ST_READY|HA_ST_SEEK_COMPLETE|HA_ST_ERROR))
158	    && (stat != (HA_ST_READY|HA_ST_SEEK_COMPLETE|HA_ST_ERROR|HA_ST_DRQ)))
159	    || (dpt_isa_wait(ioh, iot, HA_ST_BUSY, 0))) {
160		/* RAID drives still spinning up? */
161		if((bus_space_read_1(iot, ioh, HA_ERROR) != 'D')
162		    || (bus_space_read_1(iot, ioh, HA_ERROR + 1) != 'P')
163		    || (bus_space_read_1(iot, ioh, HA_ERROR + 2) != 'T')) {
164		    	bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE);
165			return (0);
166		}
167	}
168
169	/*
170	 * At this point we can be confident that we are dealing with a DPT
171	 * HBA. Issue the read-config command and wait for the data to
172	 * appear. XXX we shouldn't be doing this with PIO, but it makes it
173	 * a lot easier as no DMA setup is required.
174	 */
175	bus_space_write_1(iot, ioh, HA_COMMAND, CP_PIO_GETCFG);
176	memset(&ec, 0, sizeof(ec));
177	i = ((int)&((struct eata_cfg *)0)->ec_cfglen +
178	    sizeof(ec.ec_cfglen)) >> 1;
179	p = (u_int16_t *)&ec;
180
181	if (dpt_isa_wait(ioh, iot, 0xFF, HA_ST_DATA_RDY)) {
182		bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE);
183  		return (0);
184  	}
185
186	/* Begin reading */
187 	while (i--)
188		*p++ = le16toh(bus_space_read_2(iot, ioh, HA_DATA));
189
190	if ((i = ec.ec_cfglen) > (sizeof(struct eata_cfg)
191	    - (int)(&(((struct eata_cfg *)0L)->ec_cfglen))
192	    - sizeof(ec.ec_cfglen)))
193		i = sizeof(struct eata_cfg)
194		  - (int)(&(((struct eata_cfg *)0L)->ec_cfglen))
195		  - sizeof(ec.ec_cfglen);
196
197	j = i + (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) +
198	    sizeof(ec.ec_cfglen);
199	i >>= 1;
200
201	while (i--)
202		*p++ = le16toh(bus_space_read_2(iot, ioh, HA_DATA));
203
204	/* Flush until we have read 512 bytes. */
205	i = (512 - j + 1) >> 1;
206	while (i--)
207 		le16toh(bus_space_read_2(iot, ioh, HA_DATA));
208
209	/* Puke if we don't like the returned configuration data. */
210	if ((bus_space_read_1(iot, ioh,  HA_STATUS) & HA_ST_ERROR) != 0 ||
211	    memcmp(ec.ec_eatasig, "EATA", 4) != 0 ||
212	    (ec.ec_feat0 & (EC_F0_HBA_VALID | EC_F0_DMA_SUPPORTED)) !=
213	    (EC_F0_HBA_VALID | EC_F0_DMA_SUPPORTED)) {
214	    	bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE);
215		return (0);
216	}
217
218	/*
219	 * Which DMA channel to use: if it was hardwired in the kernel
220	 * configuration, use that value. If the HBA told us, use that
221	 * value. Otherwise, puke.
222	 */
223	if (ia->ia_drq == -1) {
224		int dmanum = ((ec.ec_feat1 & EC_F1_DMA_NUM_MASK) >>
225		    EC_F1_DMA_NUM_SHIFT);
226
227		if ((ec.ec_feat0 & EC_F0_DMA_NUM_VALID) == 0 || dmanum > 3) {
228			bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE);
229			return (0);
230		}
231
232		ia->ia_drq = "\0\7\6\5"[dmanum];
233	}
234
235	/*
236	 * Which IRQ to use: if it was hardwired in the kernel configuration,
237	 * use that value. Otherwise, use what the HBA told us.
238	 */
239	if (ia->ia_irq == -1)
240		ia->ia_irq = ((ec.ec_feat1 & EC_F1_IRQ_NUM_MASK) >>
241		    EC_F1_IRQ_NUM_SHIFT);
242
243	ia->ia_msize = 0;
244	ia->ia_iosize = DPT_ISA_IOSIZE;
245	bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE);
246	return (1);
247}
248
249/*
250 * Attach a matched board.
251 */
252static void
253dpt_isa_attach(parent, self, aux)
254	struct device *parent, *self;
255	void *aux;
256{
257	struct isa_attach_args *ia;
258	isa_chipset_tag_t ic;
259	bus_space_handle_t ioh;
260	bus_space_tag_t iot;
261	struct dpt_softc *sc;
262	struct eata_cfg *ec;
263	int error;
264
265	ia = aux;
266	sc = (struct dpt_softc *)self;
267	iot = ia->ia_iot;
268	ic = ia->ia_ic;
269
270	printf(": ");
271
272	if ((error = bus_space_map(iot, ia->ia_iobase, DPT_ISA_IOSIZE, 0,
273	    &ioh)) != 0) {
274		printf("can't map i/o space, error = %d\n", error);
275		return;
276	}
277
278	sc->sc_iot = iot;
279	sc->sc_ioh = ioh;
280	sc->sc_dmat = ia->ia_dmat;
281
282	if ((error = isa_dmacascade(ic, ia->ia_drq)) != 0) {
283		printf("unable to cascade DRQ, error = %d\n", error);
284		return;
285	}
286
287	/* Establish the interrupt. */
288	if ((sc->sc_ih = isa_intr_establish(ic, ia->ia_irq, IST_EDGE, IPL_BIO,
289	    dpt_intr, sc)) == NULL) {
290		printf("can't establish interrupt\n");
291		return;
292	}
293
294	if (dpt_readcfg(sc)) {
295		printf("readcfg failed - see dpt(4)\n");
296		return;
297	}
298
299	/*
300	 * Now attach to the bus-independent code. XXX We need to force
301	 * parameters that aren't filled in by some ISA boards. In
302	 * particular, due to the limited amount of memory we have to play
303	 * with for DMA, clamp the number of CCBs to 16. I don't know if
304	 * making the DMA map non-contigiuous would allow us to play with
305	 * more CCBs, but in any case that *could* cause a performance hit,
306	 * at least for ISA HBAs.
307	 */
308	ec = &sc->sc_ec;
309
310	if (be16toh(*(int16_t *)ec->ec_queuedepth) > DPT_ISA_MAXCCBS)
311		*(int16_t *)ec->ec_queuedepth = htobe16(DPT_ISA_MAXCCBS);
312	if (ec->ec_maxlun == 0)
313		ec->ec_maxlun = 7;
314	if ((ec->ec_feat3 & EC_F3_MAX_TARGET_MASK) >> EC_F3_MAX_TARGET_SHIFT
315	    == 0)
316		ec->ec_feat3 = (ec->ec_feat3 & ~EC_F3_MAX_TARGET_MASK) |
317		    (7 << EC_F3_MAX_TARGET_SHIFT);
318
319	/* Now attach to the bus-independent code */
320	dpt_init(sc, NULL);
321}
322