wivar.h revision 1.29
1/* $NetBSD: wivar.h,v 1.29 2003/03/27 04:34:17 dyoung Exp $ */ 2 3/* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35/* 36 * FreeBSD driver ported to NetBSD by Bill Sommerfeld in the back of the 37 * Oslo IETF plenary meeting. 38 */ 39struct wi_softc { 40 struct device sc_dev; 41 struct ieee80211com sc_ic; 42 void *sc_ih; /* interrupt handler */ 43 int (*sc_enable)(struct wi_softc *); 44 void (*sc_disable)(struct wi_softc *); 45 46 int sc_attached; 47 int sc_enabled; 48 int sc_firmware_type; 49#define WI_NOTYPE 0 50#define WI_LUCENT 1 51#define WI_INTERSIL 2 52#define WI_SYMBOL 3 53 int sc_pri_firmware_ver; /* Primary firm vers */ 54 int sc_sta_firmware_ver; /* Station firm vers */ 55 int sc_pci; /* attach to PCI-Bus */ 56 57 bus_space_tag_t sc_iot; /* bus cookie */ 58 bus_space_handle_t sc_ioh; /* bus i/o handle */ 59 60 struct ifmedia sc_media; 61 caddr_t sc_drvbpf; 62 int sc_flags; 63 int sc_bap_id; 64 int sc_bap_off; 65 66 u_int16_t sc_dbm_adjust; 67 u_int16_t sc_max_datalen; 68 u_int16_t sc_frag_thresh; 69 u_int16_t sc_rts_thresh; 70 u_int16_t sc_system_scale; 71 u_int16_t sc_tx_rate; 72 u_int16_t sc_cnfauthmode; 73 u_int16_t sc_roaming_mode; 74 u_int16_t sc_microwave_oven; 75 76 int sc_nodelen; 77 char sc_nodename[IEEE80211_NWID_LEN]; 78 79 int sc_buflen; 80#define WI_NTXBUF 3 81 struct sc_txdesc { 82 int d_fid; 83 int d_len; 84 } sc_txd[WI_NTXBUF]; 85 int sc_txnext; 86 int sc_txcur; 87 int sc_tx_timer; 88 int sc_scan_timer; 89 int sc_syn_timer; 90 91 struct wi_counters sc_stats; 92 u_int16_t sc_ibss_port; 93 94 struct wi_apinfo sc_aps[MAXAPINFO]; 95 int sc_naps; 96 97 int sc_false_syns; 98 99 u_int16_t sc_txbuf[IEEE80211_MAX_LEN/2]; 100 101 void (*sc_reset)(struct wi_softc *); 102}; 103 104#define sc_if sc_ic.ic_if 105 106/* maximum consecutive false change-of-BSSID indications */ 107#define WI_MAX_FALSE_SYNS 10 108 109#define WI_SCAN_INQWAIT 3 /* wait sec before inquire */ 110#define WI_SCAN_WAIT 5 /* maximum scan wait */ 111 112/* Values for wi_flags. */ 113#define WI_FLAGS_ATTACHED 0x0001 114#define WI_FLAGS_INITIALIZED 0x0002 115#define WI_FLAGS_OUTRANGE 0x0004 116#define WI_FLAGS_HAS_MOR 0x0010 117#define WI_FLAGS_HAS_ROAMING 0x0020 118#define WI_FLAGS_HAS_DIVERSITY 0x0040 119#define WI_FLAGS_HAS_SYSSCALE 0x0080 120#define WI_FLAGS_BUG_AUTOINC 0x0100 121#define WI_FLAGS_HAS_FRAGTHR 0x0200 122#define WI_FLAGS_HAS_DBMADJUST 0x0400 123 124struct wi_card_ident { 125 u_int16_t card_id; 126 char *card_name; 127 u_int8_t firm_type; 128}; 129 130/* 131 * register space access macros 132 */ 133#ifdef WI_AT_BIGENDIAN_BUS_HACK 134 /* 135 * XXX - ugly hack for sparc bus_space_* macro deficiencies: 136 * assume the bus we are accessing is big endian. 137 */ 138 139#define CSR_WRITE_4(sc, reg, val) \ 140 bus_space_write_4(sc->sc_iot, sc->sc_ioh, \ 141 (sc->sc_pci? reg * 2: reg) , htole32(val)) 142#define CSR_WRITE_2(sc, reg, val) \ 143 bus_space_write_2(sc->sc_iot, sc->sc_ioh, \ 144 (sc->sc_pci? reg * 2: reg), htole16(val)) 145#define CSR_WRITE_1(sc, reg, val) \ 146 bus_space_write_1(sc->sc_iot, sc->sc_ioh, \ 147 (sc->sc_pci? reg * 2: reg), val) 148 149#define CSR_READ_4(sc, reg) \ 150 le32toh(bus_space_read_4(sc->sc_iot, sc->sc_ioh, \ 151 (sc->sc_pci? reg * 2: reg))) 152#define CSR_READ_2(sc, reg) \ 153 le16toh(bus_space_read_2(sc->sc_iot, sc->sc_ioh, \ 154 (sc->sc_pci? reg * 2: reg))) 155#define CSR_READ_1(sc, reg) \ 156 bus_space_read_1(sc->sc_iot, sc->sc_ioh, \ 157 (sc->sc_pci? reg * 2: reg)) 158 159#else 160 161#define CSR_WRITE_4(sc, reg, val) \ 162 bus_space_write_4(sc->sc_iot, sc->sc_ioh, \ 163 (sc->sc_pci? reg * 2: reg) , val) 164#define CSR_WRITE_2(sc, reg, val) \ 165 bus_space_write_2(sc->sc_iot, sc->sc_ioh, \ 166 (sc->sc_pci? reg * 2: reg), val) 167#define CSR_WRITE_1(sc, reg, val) \ 168 bus_space_write_1(sc->sc_iot, sc->sc_ioh, \ 169 (sc->sc_pci? reg * 2: reg), val) 170 171#define CSR_READ_4(sc, reg) \ 172 bus_space_read_4(sc->sc_iot, sc->sc_ioh, \ 173 (sc->sc_pci? reg * 2: reg)) 174#define CSR_READ_2(sc, reg) \ 175 bus_space_read_2(sc->sc_iot, sc->sc_ioh, \ 176 (sc->sc_pci? reg * 2: reg)) 177#define CSR_READ_1(sc, reg) \ 178 bus_space_read_1(sc->sc_iot, sc->sc_ioh, \ 179 (sc->sc_pci? reg * 2: reg)) 180#endif 181 182#ifndef __BUS_SPACE_HAS_STREAM_METHODS 183#define bus_space_write_stream_2 bus_space_write_2 184#define bus_space_write_multi_stream_2 bus_space_write_multi_2 185#define bus_space_read_stream_2 bus_space_read_2 186#define bus_space_read_multi_stream_2 bus_space_read_multi_2 187#endif 188 189#define CSR_WRITE_STREAM_2(sc, reg, val) \ 190 bus_space_write_stream_2(sc->sc_iot, sc->sc_ioh, \ 191 (sc->sc_pci? reg * 2: reg), val) 192#define CSR_WRITE_MULTI_STREAM_2(sc, reg, val, count) \ 193 bus_space_write_multi_stream_2(sc->sc_iot, sc->sc_ioh, \ 194 (sc->sc_pci? reg * 2: reg), val, count) 195#define CSR_READ_STREAM_2(sc, reg) \ 196 bus_space_read_stream_2(sc->sc_iot, sc->sc_ioh, \ 197 (sc->sc_pci? reg * 2: reg)) 198#define CSR_READ_MULTI_STREAM_2(sc, reg, buf, count) \ 199 bus_space_read_multi_stream_2(sc->sc_iot, sc->sc_ioh, \ 200 (sc->sc_pci? reg * 2: reg), buf, count) 201 202 203int wi_attach(struct wi_softc *); 204int wi_detach(struct wi_softc *); 205int wi_activate(struct device *, enum devact); 206int wi_intr(void *arg); 207void wi_power(struct wi_softc *, int); 208void wi_shutdown(struct wi_softc *); 209