sl811hsreg.h revision 1.1
1/* $NetBSD: sl811hsreg.h,v 1.1 2002/08/11 13:17:53 isaki Exp $ */ 2 3/* 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Tetsuya Isaki. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39/* 40 * ScanLogic SL811HS/T USB Host Controller 41 */ 42 43#define SL11_IDX_ADDR (0x00) 44#define SL11_IDX_DATA (0x01) 45#define SL11_PORTSIZE (0x02) 46 47#define SL11_E0BASE (0x00) /* Base of Control0 */ 48#define SL11_E0CTRL (0x00) /* Host Control Register */ 49#define SL11_E0ADDR (0x01) /* Host Base Address */ 50#define SL11_E0LEN (0x02) /* Host Base Length */ 51#define SL11_E0STAT (0x03) /* USB Status (Read) */ 52#define SL11_E0PID SL11_E0STAT /* Host PID, Device Endpoint (Write) */ 53#define SL11_E0CONT (0x04) /* Transfer Count (Read) */ 54#define SL11_E0DEV SL11_E0CONT /* Host Device Address (Write) */ 55 56#define SL11_E1BASE (0x08) /* Base of Control1 */ 57#define SL11_E1CTRL (SL11_E1BASE + SL11_E0CTRL) 58#define SL11_E1ADDR (SL11_E1BASE + SL11_E0ADDR) 59#define SL11_E1LEN (SL11_E1BASE + SL11_E0LEN) 60#define SL11_E1STAT (SL11_E1BASE + SL11_E0STAT) 61#define SL11_E1PID (SL11_E1BASE + SL11_E0PID) 62#define SL11_E1CONT (SL11_E1BASE + SL11_E0CONT) 63#define SL11_E1DEV (SL11_E1BASE + SL11_E0DEV) 64 65#define SL11_CTRL (0x05) /* Control Register1 */ 66#define SL11_IER (0x06) /* Interrupt Enable Register */ 67#define SL11_ISR (0x0d) /* Interrupt Status Register */ 68#define SL11_DATA (0x0e) /* SOF Counter Low (Write) */ 69#define SL11_REV SL11_DATA /* HW Revision Register (Read) */ 70#define SL811_CSOF (0x0f) /* SOF Counter High(R), Control2(W) */ 71#define SL11_MEM (0x10) /* Memory Buffer (0x10 - 0xff) */ 72 73#define SL11_EPCTRL_ARM (0x01) 74#define SL11_EPCTRL_ENABLE (0x02) 75#define SL11_EPCTRL_DIRECTION (0x04) 76#define SL11_EPCTRL_ISO (0x10) 77#define SL11_EPCTRL_SOF (0x20) 78#define SL11_EPCTRL_DATATOGGLE (0x40) 79#define SL11_EPCTRL_PREAMBLE (0x80) 80 81#define SL11_EPPID_PIDMASK (0xf0) 82#define SL11_EPPID_EPMASK (0x0f) 83 84#define SL11_EPSTAT_ACK (0x01) 85#define SL11_EPSTAT_ERROR (0x02) 86#define SL11_EPSTAT_TIMEOUT (0x04) 87#define SL11_EPSTAT_SEQUENCE (0x08) 88#define SL11_EPSTAT_SETUP (0x10) 89#define SL11_EPSTAT_OVERFLOW (0x20) 90#define SL11_EPSTAT_NAK (0x40) 91#define SL11_EPSTAT_STALL (0x80) 92 93#define SL11_CTRL_ENABLESOF (0x01) 94#define SL11_CTRL_EOF2 (0x04) 95#define SL11_CTRL_RESETENGINE (0x08) 96#define SL11_CTRL_JKSTATE (0x10) 97#define SL11_CTRL_LOWSPEED (0x20) 98#define SL11_CTRL_SUSPEND (0x40) 99 100#define SL11_IER_USBA (0x01) /* USB-A done */ 101#define SL11_IER_USBB (0x02) /* USB-B done */ 102#define SL11_IER_BABBLE (0x04) /* Babble detection */ 103#define SL11_IER_SOFTIMER (0x10) /* 1ms SOF timer */ 104#define SL11_IER_INSERT (0x20) /* Slave Insert/Remove detection */ 105#define SL11_IER_RESET (0x40) /* USB Reset/Resume */ 106 107#define SL11_ISR_USBA (0x01) /* USB-A done */ 108#define SL11_ISR_USBB (0x02) /* USB-B done */ 109#define SL11_ISR_BABBLE (0x04) /* Babble detection */ 110#define SL11_ISR_SOFTIMER (0x10) /* 1ms SOF timer */ 111#define SL11_ISR_INSERT (0x20) /* Slave Insert/Remove detection */ 112#define SL11_ISR_RESET (0x40) /* USB Reset/Resume */ 113#define SL11_ISR_DATA (0x80) /* Value of the Data+ pin */ 114 115#define SL11_REV_USBA (0x01) /* USB-A */ 116#define SL11_REV_USBB (0x02) /* USB-B */ 117#define SL11_REV_REVMASK (0xf0) /* HW Revision */ 118#define SL11_REV_REVSL11H (0x00) /* HW is SL11H */ 119#define SL11_REV_REVSL811HS (0x10) /* HW is SL811HS */ 120 121#define SL811_CSOF_SOFMASK (0x3f) /* SOF High Counter */ 122#define SL811_CSOF_POLARITY (0x40) /* Change polarity */ 123#define SL811_CSOF_MASTER (0x80) /* Master/Slave selection */ 124 125