1/* $NetBSD: mpt.h,v 1.9 2021/11/10 17:19:30 msaitoh Exp $ */ 2 3/* 4 * Copyright (c) 2000, 2001 by Greg Ansley 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice immediately at the beginning of the file, without modification, 11 * this list of conditions, and the following disclaimer. 12 * 2. The name of the author may not be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 19 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27/* 28 * Additional Copyright (c) 2002 by Matthew Jacob under same license. 29 */ 30 31/* 32 * mpt.h: 33 * 34 * Generic definitions for LSI Fusion adapters. 35 * 36 * Adapted from the FreeBSD "mpt" driver by Jason R. Thorpe for 37 * Wasabi Systems, Inc. 38 */ 39 40#ifndef _DEV_IC_MPT_H_ 41#define _DEV_IC_MPT_H_ 42 43#include <dev/ic/mpt_netbsd.h> 44 45#define MPT_OK (0) 46#define MPT_FAIL (0x10000) 47 48/* Register Offset to chip registers */ 49#define MPT_OFFSET_DOORBELL 0x00 50#define MPT_OFFSET_SEQUENCE 0x04 51#define MPT_OFFSET_DIAGNOSTIC 0x08 52#define MPT_OFFSET_TEST 0x0C 53#define MPT_OFFSET_INTR_STATUS 0x30 54#define MPT_OFFSET_INTR_MASK 0x34 55#define MPT_OFFSET_REQUEST_Q 0x40 56#define MPT_OFFSET_REPLY_Q 0x44 57#define MPT_OFFSET_HOST_INDEX 0x50 58#define MPT_OFFSET_FUBAR 0x90 59 60#define MPT_DIAG_SEQUENCE_1 0x04 61#define MPT_DIAG_SEQUENCE_2 0x0b 62#define MPT_DIAG_SEQUENCE_3 0x02 63#define MPT_DIAG_SEQUENCE_4 0x07 64#define MPT_DIAG_SEQUENCE_5 0x0d 65 66/* Bit Maps for DOORBELL register */ 67enum DB_STATE_BITS { 68 MPT_DB_STATE_RESET = 0x00000000, 69 MPT_DB_STATE_READY = 0x10000000, 70 MPT_DB_STATE_RUNNING = 0x20000000, 71 MPT_DB_STATE_FAULT = 0x40000000, 72 MPT_DB_STATE_MASK = 0xf0000000 73}; 74 75#define MPT_STATE(v) ((enum DB_STATE_BITS)((v) & MPT_DB_STATE_MASK)) 76 77#define MPT_DB_LENGTH_SHIFT (16) 78#define MPT_DB_DATA_MASK (0xffff) 79 80#define MPT_DB_DB_USED 0x08000000 81#define MPT_DB_IS_IN_USE(v) (((v) & MPT_DB_DB_USED) != 0) 82 83/* 84 * "Whom" initializor values 85 */ 86#define MPT_DB_INIT_NOONE 0x00 87#define MPT_DB_INIT_BIOS 0x01 88#define MPT_DB_INIT_ROMBIOS 0x02 89#define MPT_DB_INIT_PCIPEER 0x03 90#define MPT_DB_INIT_HOST 0x04 91#define MPT_DB_INIT_MANUFACTURE 0x05 92 93#define MPT_WHO(v) \ 94 ((v & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT) 95 96/* Function Maps for DOORBELL register */ 97enum DB_FUNCTION_BITS { 98 MPT_FUNC_IOC_RESET = 0x40000000, 99 MPT_FUNC_UNIT_RESET = 0x41000000, 100 MPT_FUNC_HANDSHAKE = 0x42000000, 101 MPT_FUNC_REPLY_REMOVE = 0x43000000, 102 MPT_FUNC_MASK = 0xff000000 103}; 104 105/* Function Maps for INTERRUPT request register */ 106enum _MPT_INTR_REQ_BITS { 107 MPT_INTR_DB_BUSY = 0x80000000, 108 MPT_INTR_REPLY_READY = 0x00000008, 109 MPT_INTR_DB_READY = 0x00000001 110}; 111 112#define MPT_DB_IS_BUSY(v) (((v) & MPT_INTR_DB_BUSY) != 0) 113#define MPT_DB_INTR(v) (((v) & MPT_INTR_DB_READY) != 0) 114#define MPT_REPLY_INTR(v) (((v) & MPT_INTR_REPLY_READY) != 0) 115 116/* Function Maps for INTERRUPT make register */ 117enum _MPT_INTR_MASK_BITS { 118 MPT_INTR_REPLY_MASK = 0x00000008, 119 MPT_INTR_DB_MASK = 0x00000001 120}; 121 122/* Function Maps for DIAGNOSTIC make register */ 123enum _MPT_DIAG_BITS { 124 MPT_DIAG_ENABLED = 0x00000080, 125 MPT_DIAG_FLASHBAD = 0x00000040, 126 MPT_DIAG_RESET_HIST = 0x00000020, 127 MPT_DIAG_TTLI = 0x00000008, 128 MPT_DIAG_RESET_IOC = 0x00000004, 129 MPT_DIAG_ARM_DISABLE = 0x00000002, 130 MPT_DIAG_DME = 0x00000001 131}; 132 133/* Magic addresses in diagnostic memory space */ 134#define MPT_DIAG_IOP_BASE (0x00000000) 135#define MPT_DIAG_IOP_SIZE (0x00002000) 136#define MPT_DIAG_GPIO (0x00030010) 137#define MPT_DIAG_IOPQ_REG_BASE0 (0x00050004) 138#define MPT_DIAG_IOPQ_REG_BASE1 (0x00051004) 139#define MPT_DIAG_MEM_CFG_BASE (0x00040000) 140#define MPT_DIAG_CTX0_BASE (0x000E0000) 141#define MPT_DIAG_CTX0_SIZE (0x00002000) 142#define MPT_DIAG_CTX1_BASE (0x001E0000) 143#define MPT_DIAG_CTX1_SIZE (0x00002000) 144#define MPT_DIAG_FLASH_BASE (0x00800000) 145#define MPT_DIAG_RAM_BASE (0x01000000) 146#define MPT_DIAG_RAM_SIZE (0x00400000) 147 148/* GPIO bit assignments */ 149#define MPT_DIAG_GPIO_SCL (0x00010000) 150#define MPT_DIAG_GPIO_SDA_OUT (0x00008000) 151#define MPT_DIAG_GPIO_SDA_IN (0x00004000) 152 153#define MPT_REPLY_EMPTY (0xffffffff) /* Reply Queue Empty Symbol */ 154#define MPT_CONTEXT_REPLY (0x80000000) 155#define MPT_CONTEXT_MASK (~0xE0000000) 156 157#ifdef _KERNEL 158int mpt_soft_reset(mpt_softc_t *); 159void mpt_hard_reset(mpt_softc_t *); 160int mpt_recv_handshake_reply(mpt_softc_t *, size_t, void *); 161 162void mpt_send_cmd(mpt_softc_t *, request_t *); 163void mpt_free_reply(mpt_softc_t *, u_int32_t); 164void mpt_enable_ints(mpt_softc_t *); 165void mpt_disable_ints(mpt_softc_t *); 166u_int32_t mpt_pop_reply_queue(mpt_softc_t *); 167int mpt_hw_init(mpt_softc_t *); 168int mpt_init(mpt_softc_t *, u_int32_t); 169int mpt_reset(mpt_softc_t *); 170int mpt_send_handshake_cmd(mpt_softc_t *, size_t, void *); 171request_t * mpt_get_request(mpt_softc_t *); 172void mpt_free_request(mpt_softc_t *, request_t *); 173int mpt_intr(void *); 174void mpt_check_doorbell(mpt_softc_t *); 175 176int mpt_read_cfg_header(mpt_softc_t *, int, int, int, fCONFIG_PAGE_HEADER *); 177int mpt_read_cfg_page(mpt_softc_t *, int, fCONFIG_PAGE_HEADER *); 178int mpt_write_cfg_page(mpt_softc_t *, int, fCONFIG_PAGE_HEADER *); 179 180/* mpt_debug.c functions */ 181void mpt_print_reply(void *); 182void mpt_print_db(u_int32_t); 183void mpt_print_config_reply(void *); 184char *mpt_ioc_diag(u_int32_t); 185const char *mpt_req_state(enum mpt_req_state); 186void mpt_print_scsi_io_request(MSG_SCSI_IO_REQUEST *); 187void mpt_print_config_request(void *); 188void mpt_print_request(void *); 189 190/******************************** Endianness *********************************/ 191#define MPT_2_HOST64(ptr, tag) ptr->tag = le64toh(ptr->tag) 192#define MPT_2_HOST32(ptr, tag) ptr->tag = le32toh(ptr->tag) 193#define MPT_2_HOST16(ptr, tag) ptr->tag = le16toh(ptr->tag) 194 195#define HOST_2_MPT64(ptr, tag) ptr->tag = htole64(ptr->tag) 196#define HOST_2_MPT32(ptr, tag) ptr->tag = htole32(ptr->tag) 197#define HOST_2_MPT16(ptr, tag) ptr->tag = htole16(ptr->tag) 198 199#if _BYTE_ORDER == _BIG_ENDIAN 200void mpt2host_sge_simple_union(SGE_SIMPLE_UNION *); 201void mpt2host_iocfacts_reply(MSG_IOC_FACTS_REPLY *); 202void mpt2host_portfacts_reply(MSG_PORT_FACTS_REPLY *); 203void mpt2host_config_page_scsi_port_0(fCONFIG_PAGE_SCSI_PORT_0 *); 204void mpt2host_config_page_scsi_port_1(fCONFIG_PAGE_SCSI_PORT_1 *); 205void host2mpt_config_page_scsi_port_1(fCONFIG_PAGE_SCSI_PORT_1 *); 206void mpt2host_config_page_scsi_port_2(fCONFIG_PAGE_SCSI_PORT_2 *); 207void mpt2host_config_page_scsi_device_0(fCONFIG_PAGE_SCSI_DEVICE_0 *); 208void host2mpt_config_page_scsi_device_0(fCONFIG_PAGE_SCSI_DEVICE_0 *); 209void mpt2host_config_page_scsi_device_1(fCONFIG_PAGE_SCSI_DEVICE_1 *); 210void host2mpt_config_page_scsi_device_1(fCONFIG_PAGE_SCSI_DEVICE_1 *); 211void mpt2host_config_page_fc_port_0(fCONFIG_PAGE_FC_PORT_0 *); 212void mpt2host_config_page_fc_port_1(fCONFIG_PAGE_FC_PORT_1 *); 213void host2mpt_config_page_fc_port_1(fCONFIG_PAGE_FC_PORT_1 *); 214void mpt2host_config_page_raid_vol_0(fCONFIG_PAGE_RAID_VOL_0 *); 215void mpt2host_config_page_raid_phys_disk_0(fCONFIG_PAGE_RAID_PHYS_DISK_0 *); 216void mpt2host_config_page_raid_phys_disk_0(fCONFIG_PAGE_RAID_PHYS_DISK_0 *); 217void mpt2host_config_page_ioc_2(fCONFIG_PAGE_IOC_2 *); 218#else 219#define mpt2host_sge_simple_union(x) do { ; } while (0) 220#define mpt2host_iocfacts_reply(x) do { ; } while (0) 221#define mpt2host_portfacts_reply(x) do { ; } while (0) 222#define mpt2host_config_page_scsi_port_0(x) do { ; } while (0) 223#define host2mpt_config_page_scsi_device_0(x) do { ; } while (0) 224#define mpt2host_config_page_scsi_port_1(x) do { ; } while (0) 225#define host2mpt_config_page_scsi_port_1(x) do { ; } while (0) 226#define mpt2host_config_page_scsi_port_2(x) do { ; } while (0) 227#define mpt2host_config_page_scsi_device_0(x) do { ; } while (0) 228#define mpt2host_config_page_scsi_device_1(x) do { ; } while (0) 229#define host2mpt_config_page_scsi_device_1(x) do { ; } while (0) 230#define mpt2host_config_page_fc_port_0(x) do { ; } while (0) 231#define mpt2host_config_page_fc_port_1(x) do { ; } while (0) 232#define host2mpt_config_page_fc_port_1(x) do { ; } while (0) 233#define mpt2host_config_page_raid_vol_0(x) do { ; } while (0) 234#define mpt2host_config_page_raid_phys_disk_0(x) \ 235 do { ; } while (0) 236#define mpt2host_config_page_ioc_2(x) do { ; } while (0) 237#endif 238 239#endif /* _KERNEL */ 240 241#endif /* _DEV_IC_MPT_H_ */ 242