1/* $NetBSD: mb86960.c,v 1.97 2023/06/02 08:51:47 andvar Exp $ */ 2 3/* 4 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995 5 * 6 * This software may be used, modified, copied, distributed, and sold, in 7 * both source and binary form provided that the above copyright, these 8 * terms and the following disclaimer are retained. The name of the author 9 * and/or the contributor may not be used to endorse or promote products 10 * derived from this software without specific prior written permission. 11 * 12 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND 13 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 14 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 15 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE 16 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 17 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 18 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION. 19 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 20 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 21 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 22 * SUCH DAMAGE. 23 */ 24 25/* 26 * Portions copyright (C) 1993, David Greenman. This software may be used, 27 * modified, copied, distributed, and sold, in both source and binary form 28 * provided that the above copyright and these terms are retained. Under no 29 * circumstances is the author responsible for the proper functioning of this 30 * software, nor does the author assume any responsibility for damages 31 * incurred with its use. 32 */ 33 34#include <sys/cdefs.h> 35__KERNEL_RCSID(0, "$NetBSD: mb86960.c,v 1.97 2023/06/02 08:51:47 andvar Exp $"); 36 37/* 38 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards. 39 * Contributed by M.S. <seki@sysrap.cs.fujitsu.co.jp> 40 * 41 * This version is intended to be a generic template for various 42 * MB86960A/MB86965A based Ethernet cards. It currently supports 43 * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied- 44 * Telesis AT1700 series and RE2000 series. There are some 45 * unnecessary hooks embedded, which are primarily intended to support 46 * other types of Ethernet cards, but the author is not sure whether 47 * they are useful. 48 */ 49 50#include "opt_inet.h" 51 52#include <sys/param.h> 53#include <sys/systm.h> 54#include <sys/errno.h> 55#include <sys/ioctl.h> 56#include <sys/mbuf.h> 57#include <sys/socket.h> 58#include <sys/syslog.h> 59#include <sys/device.h> 60#include <sys/rndsource.h> 61#include <sys/bus.h> 62 63#include <net/if.h> 64#include <net/if_dl.h> 65#include <net/if_types.h> 66#include <net/if_media.h> 67#include <net/if_ether.h> 68#include <net/bpf.h> 69 70#ifdef INET 71#include <netinet/in.h> 72#include <netinet/in_systm.h> 73#include <netinet/in_var.h> 74#include <netinet/ip.h> 75#include <netinet/if_inarp.h> 76#endif 77 78#include <dev/ic/mb86960reg.h> 79#include <dev/ic/mb86960var.h> 80 81#ifndef __BUS_SPACE_HAS_STREAM_METHODS 82#define bus_space_write_stream_2 bus_space_write_2 83#define bus_space_write_multi_stream_2 bus_space_write_multi_2 84#define bus_space_read_multi_stream_2 bus_space_read_multi_2 85#endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 86 87/* Standard driver entry points. These can be static. */ 88void mb86960_init(struct mb86960_softc *); 89int mb86960_ioctl(struct ifnet *, u_long, void *); 90void mb86960_start(struct ifnet *); 91void mb86960_reset(struct mb86960_softc *); 92void mb86960_watchdog(struct ifnet *); 93 94/* Local functions. Order of declaration is confused. FIXME. */ 95int mb86960_get_packet(struct mb86960_softc *, u_int); 96void mb86960_stop(struct mb86960_softc *); 97void mb86960_tint(struct mb86960_softc *, uint8_t); 98void mb86960_rint(struct mb86960_softc *, uint8_t); 99static inline 100void mb86960_xmit(struct mb86960_softc *); 101void mb86960_write_mbufs(struct mb86960_softc *, struct mbuf *); 102static inline 103void mb86960_droppacket(struct mb86960_softc *); 104void mb86960_getmcaf(struct ethercom *, uint8_t *); 105void mb86960_setmode(struct mb86960_softc *); 106void mb86960_loadmar(struct mb86960_softc *); 107 108int mb86960_mediachange(struct ifnet *); 109void mb86960_mediastatus(struct ifnet *, struct ifmediareq *); 110 111#if FE_DEBUG >= 1 112void mb86960_dump(int, struct mb86960_softc *); 113#endif 114 115void 116mb86960_attach(struct mb86960_softc *sc, uint8_t *myea) 117{ 118 bus_space_tag_t bst = sc->sc_bst; 119 bus_space_handle_t bsh = sc->sc_bsh; 120 121 /* Register values which depend on board design. */ 122 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 123 sc->proto_dlcr5 = 0; 124 sc->proto_dlcr7 = FE_D7_BYTSWP_LH; 125 if ((sc->sc_flags & FE_FLAGS_MB86960) != 0) 126 sc->proto_dlcr7 |= FE_D7_ED_TEST; /* XXX */ 127 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO; 128 129 /* 130 * Program the 86960 as following defaults: 131 * SRAM: 32KB, 100ns, byte-wide access. 132 * Transmission buffer: 4KB x 2. 133 * System bus interface: 16 bits. 134 * These values except TXBSIZE should be modified as per 135 * sc_flags which is set in MD attachments, because they 136 * are hard-wired on the board. Modifying TXBSIZE will affect 137 * the driver performance. 138 */ 139 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB | 140 FE_D6_BBW_BYTE | FE_D6_SRAM_100ns; 141 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) 142 sc->proto_dlcr6 |= FE_D6_SBW_BYTE; 143 if (sc->sc_flags & FE_FLAGS_SRAM_150ns) 144 sc->proto_dlcr6 &= ~FE_D6_SRAM_100ns; 145 146 /* 147 * Minimum initialization of the hardware. 148 * We write into registers; hope I/O ports have no 149 * overlap with other boards. 150 */ 151 152 /* Initialize 86960. */ 153 bus_space_write_1(bst, bsh, FE_DLCR6, 154 sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 155 delay(200); 156 157#ifdef DIAGNOSTIC 158 if (myea == NULL) { 159 aprint_error_dev(sc->sc_dev, 160 "ethernet address shouldn't be NULL\n"); 161 panic("NULL ethernet address"); 162 } 163#endif 164 memcpy(sc->sc_enaddr, myea, sizeof(sc->sc_enaddr)); 165 166 /* Disable all interrupts. */ 167 bus_space_write_1(bst, bsh, FE_DLCR2, 0); 168 bus_space_write_1(bst, bsh, FE_DLCR3, 0); 169} 170 171/* 172 * Install interface into kernel networking data structures 173 */ 174void 175mb86960_config(struct mb86960_softc *sc, int *media, int nmedia, int defmedia) 176{ 177 cfdata_t cf = device_cfdata(sc->sc_dev); 178 struct ifnet *ifp = &sc->sc_ec.ec_if; 179 int i; 180 181 /* Stop the 86960. */ 182 mb86960_stop(sc); 183 184 /* Initialize ifnet structure. */ 185 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 186 ifp->if_softc = sc; 187 ifp->if_start = mb86960_start; 188 ifp->if_ioctl = mb86960_ioctl; 189 ifp->if_watchdog = mb86960_watchdog; 190 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 191 IFQ_SET_READY(&ifp->if_snd); 192 193#if FE_DEBUG >= 3 194 log(LOG_INFO, "%s: mb86960_config()\n", device_xname(sc->sc_dev)); 195 mb86960_dump(LOG_INFO, sc); 196#endif 197 198#if FE_SINGLE_TRANSMISSION 199 /* Override txb config to allocate minimum. */ 200 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ; 201 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 202#endif 203 204 /* Modify hardware config if it is requested. */ 205 if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0) 206 sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE; 207 208 /* Find TX buffer size, based on the hardware dependent proto. */ 209 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) { 210 case FE_D6_TXBSIZ_2x2KB: 211 sc->txb_size = 2048; 212 break; 213 case FE_D6_TXBSIZ_2x4KB: 214 sc->txb_size = 4096; 215 break; 216 case FE_D6_TXBSIZ_2x8KB: 217 sc->txb_size = 8192; 218 break; 219 default: 220 /* Oops, we can't work with single buffer configuration. */ 221#if FE_DEBUG >= 2 222 log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n", 223 device_xname(sc->sc_dev)); 224#endif 225 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ; 226 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 227 sc->txb_size = 2048; 228 break; 229 } 230 231 /* Initialize media goo. */ 232 sc->sc_ec.ec_ifmedia = &sc->sc_media; 233 ifmedia_init(&sc->sc_media, 0, mb86960_mediachange, 234 mb86960_mediastatus); 235 if (media != NULL) { 236 for (i = 0; i < nmedia; i++) 237 ifmedia_add(&sc->sc_media, media[i], 0, NULL); 238 ifmedia_set(&sc->sc_media, defmedia); 239 } else { 240 ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_MANUAL, 0, NULL); 241 ifmedia_set(&sc->sc_media, IFM_ETHER | IFM_MANUAL); 242 } 243 244 /* Attach the interface. */ 245 if_attach(ifp); 246 if_deferred_start_init(ifp, NULL); 247 ether_ifattach(ifp, sc->sc_enaddr); 248 249 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 250 RND_TYPE_NET, RND_FLAG_DEFAULT); 251 252 /* Print additional info when attached. */ 253 aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n", 254 ether_sprintf(sc->sc_enaddr)); 255 256#if FE_DEBUG >= 3 257 { 258 int buf, txb, bbw, sbw, ram; 259 260 buf = txb = bbw = sbw = ram = -1; 261 switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) { 262 case FE_D6_BUFSIZ_8KB: 263 buf = 8; 264 break; 265 case FE_D6_BUFSIZ_16KB: 266 buf = 16; 267 break; 268 case FE_D6_BUFSIZ_32KB: 269 buf = 32; 270 break; 271 case FE_D6_BUFSIZ_64KB: 272 buf = 64; 273 break; 274 } 275 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) { 276 case FE_D6_TXBSIZ_2x2KB: 277 txb = 2; 278 break; 279 case FE_D6_TXBSIZ_2x4KB: 280 txb = 4; 281 break; 282 case FE_D6_TXBSIZ_2x8KB: 283 txb = 8; 284 break; 285 } 286 switch (sc->proto_dlcr6 & FE_D6_BBW) { 287 case FE_D6_BBW_BYTE: 288 bbw = 8; 289 break; 290 case FE_D6_BBW_WORD: 291 bbw = 16; 292 break; 293 } 294 switch (sc->proto_dlcr6 & FE_D6_SBW) { 295 case FE_D6_SBW_BYTE: 296 sbw = 8; 297 break; 298 case FE_D6_SBW_WORD: 299 sbw = 16; 300 break; 301 } 302 switch (sc->proto_dlcr6 & FE_D6_SRAM) { 303 case FE_D6_SRAM_100ns: 304 ram = 100; 305 break; 306 case FE_D6_SRAM_150ns: 307 ram = 150; 308 break; 309 } 310 aprint_debug_dev(sc->sc_dev, 311 "SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n", 312 buf, bbw, ram, txb, sbw); 313 } 314#endif 315 316 /* The attach is successful. */ 317 sc->sc_stat |= FE_STAT_ATTACHED; 318} 319 320/* 321 * Media change callback. 322 */ 323int 324mb86960_mediachange(struct ifnet *ifp) 325{ 326 struct mb86960_softc *sc = ifp->if_softc; 327 328 if (sc->sc_mediachange) 329 return (*sc->sc_mediachange)(sc); 330 return 0; 331} 332 333/* 334 * Media status callback. 335 */ 336void 337mb86960_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) 338{ 339 struct mb86960_softc *sc = ifp->if_softc; 340 341 if ((sc->sc_stat & FE_STAT_ENABLED) == 0) { 342 ifmr->ifm_active = IFM_ETHER | IFM_NONE; 343 ifmr->ifm_status = 0; 344 return; 345 } 346 347 if (sc->sc_mediastatus) 348 (*sc->sc_mediastatus)(sc, ifmr); 349} 350 351/* 352 * Reset interface. 353 */ 354void 355mb86960_reset(struct mb86960_softc *sc) 356{ 357 int s; 358 359 s = splnet(); 360 mb86960_stop(sc); 361 mb86960_init(sc); 362 splx(s); 363} 364 365/* 366 * Stop everything on the interface. 367 * 368 * All buffered packets, both transmitting and receiving, 369 * if any, will be lost by stopping the interface. 370 */ 371void 372mb86960_stop(struct mb86960_softc *sc) 373{ 374 bus_space_tag_t bst = sc->sc_bst; 375 bus_space_handle_t bsh = sc->sc_bsh; 376 377#if FE_DEBUG >= 3 378 log(LOG_INFO, "%s: top of mb86960_stop()\n", device_xname(sc->sc_dev)); 379 mb86960_dump(LOG_INFO, sc); 380#endif 381 382 /* Disable interrupts. */ 383 bus_space_write_1(bst, bsh, FE_DLCR2, 0x00); 384 bus_space_write_1(bst, bsh, FE_DLCR3, 0x00); 385 386 /* Stop interface hardware. */ 387 delay(200); 388 bus_space_write_1(bst, bsh, FE_DLCR6, 389 sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 390 delay(200); 391 392 /* Clear all interrupt status. */ 393 bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF); 394 bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF); 395 396 /* Put the chip in stand-by mode. */ 397 delay(200); 398 bus_space_write_1(bst, bsh, FE_DLCR7, 399 sc->proto_dlcr7 | FE_D7_POWER_DOWN); 400 delay(200); 401 402 /* MAR loading can be delayed. */ 403 sc->filter_change = 0; 404 405 /* Call a hook. */ 406 if (sc->stop_card) 407 (*sc->stop_card)(sc); 408 409#if FE_DEBUG >= 3 410 log(LOG_INFO, "%s: end of mb86960_stop()\n", device_xname(sc->sc_dev)); 411 mb86960_dump(LOG_INFO, sc); 412#endif 413} 414 415/* 416 * Device timeout/watchdog routine. Entered if the device neglects to 417 * generate an interrupt after a transmit has been started on it. 418 */ 419void 420mb86960_watchdog(struct ifnet *ifp) 421{ 422 struct mb86960_softc *sc = ifp->if_softc; 423 424 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev)); 425#if FE_DEBUG >= 3 426 mb86960_dump(LOG_INFO, sc); 427#endif 428 429 /* Record how many packets are lost by this accident. */ 430 if_statadd(ifp, if_oerrors, sc->txb_sched + sc->txb_count); 431 432 mb86960_reset(sc); 433} 434 435/* 436 * Drop (skip) a packet from receive buffer in 86960 memory. 437 */ 438static inline void 439mb86960_droppacket(struct mb86960_softc *sc) 440{ 441 bus_space_tag_t bst = sc->sc_bst; 442 bus_space_handle_t bsh = sc->sc_bsh; 443 444 bus_space_write_1(bst, bsh, FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP); 445} 446 447/* 448 * Initialize device. 449 */ 450void 451mb86960_init(struct mb86960_softc *sc) 452{ 453 bus_space_tag_t bst = sc->sc_bst; 454 bus_space_handle_t bsh = sc->sc_bsh; 455 struct ifnet *ifp = &sc->sc_ec.ec_if; 456 int i; 457 458#if FE_DEBUG >= 3 459 log(LOG_INFO, "%s: top of mb86960_init()\n", device_xname(sc->sc_dev)); 460 mb86960_dump(LOG_INFO, sc); 461#endif 462 463 /* Reset transmitter flags. */ 464 ifp->if_flags &= ~IFF_OACTIVE; 465 ifp->if_timer = 0; 466 467 sc->txb_free = sc->txb_size; 468 sc->txb_count = 0; 469 sc->txb_sched = 0; 470 471 /* Do any card-specific initialization, if applicable. */ 472 if (sc->init_card) 473 (*sc->init_card)(sc); 474 475#if FE_DEBUG >= 3 476 log(LOG_INFO, "%s: after init hook\n", device_xname(sc->sc_dev)); 477 mb86960_dump(LOG_INFO, sc); 478#endif 479 480 /* 481 * Make sure to disable the chip, also. 482 * This may also help re-programming the chip after 483 * hot insertion of PCMCIAs. 484 */ 485 bus_space_write_1(bst, bsh, FE_DLCR6, 486 sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 487 delay(200); 488 489 /* Power up the chip and select register bank for DLCRs. */ 490 bus_space_write_1(bst, bsh, FE_DLCR7, 491 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP); 492 delay(200); 493 494 /* Feed the station address. */ 495 bus_space_write_region_1(bst, bsh, FE_DLCR8, 496 sc->sc_enaddr, ETHER_ADDR_LEN); 497 498 /* Select the BMPR bank for runtime register access. */ 499 bus_space_write_1(bst, bsh, FE_DLCR7, 500 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 501 502 /* Initialize registers. */ 503 bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF); /* Clear all bits. */ 504 bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF); /* ditto. */ 505 bus_space_write_1(bst, bsh, FE_DLCR2, 0x00); 506 bus_space_write_1(bst, bsh, FE_DLCR3, 0x00); 507 bus_space_write_1(bst, bsh, FE_DLCR4, sc->proto_dlcr4); 508 bus_space_write_1(bst, bsh, FE_DLCR5, sc->proto_dlcr5); 509 bus_space_write_1(bst, bsh, FE_BMPR10, 0x00); 510 bus_space_write_1(bst, bsh, FE_BMPR11, FE_B11_CTRL_SKIP); 511 bus_space_write_1(bst, bsh, FE_BMPR12, 0x00); 512 bus_space_write_1(bst, bsh, FE_BMPR13, sc->proto_bmpr13); 513 bus_space_write_1(bst, bsh, FE_BMPR14, FE_B14_FILTER); 514 bus_space_write_1(bst, bsh, FE_BMPR15, 0x00); 515 516#if FE_DEBUG >= 3 517 log(LOG_INFO, "%s: just before enabling DLC\n", 518 device_xname(sc->sc_dev)); 519 mb86960_dump(LOG_INFO, sc); 520#endif 521 522 /* Enable interrupts. */ 523 bus_space_write_1(bst, bsh, FE_DLCR2, FE_TMASK); 524 bus_space_write_1(bst, bsh, FE_DLCR3, FE_RMASK); 525 526 /* Enable transmitter and receiver. */ 527 delay(200); 528 bus_space_write_1(bst, bsh, FE_DLCR6, 529 sc->proto_dlcr6 | FE_D6_DLC_ENABLE); 530 delay(200); 531 532#if FE_DEBUG >= 3 533 log(LOG_INFO, "%s: just after enabling DLC\n", 534 device_xname(sc->sc_dev)); 535 mb86960_dump(LOG_INFO, sc); 536#endif 537 538 /* 539 * Make sure to empty the receive buffer. 540 * 541 * This may be redundant, but *if* the receive buffer were full 542 * at this point, the driver would hang. I have experienced 543 * some strange hangups just after UP. I hope the following 544 * code solve the problem. 545 * 546 * I have changed the order of hardware initialization. 547 * I think the receive buffer cannot have any packets at this 548 * point in this version. The following code *must* be 549 * redundant now. FIXME. 550 */ 551 for (i = 0; i < FE_MAX_RECV_COUNT; i++) { 552 if (bus_space_read_1(bst, bsh, FE_DLCR5) & FE_D5_BUFEMP) 553 break; 554 mb86960_droppacket(sc); 555 } 556#if FE_DEBUG >= 1 557 if (i >= FE_MAX_RECV_COUNT) 558 log(LOG_ERR, "%s: cannot empty receive buffer\n", 559 device_xname(sc->sc_dev)); 560#endif 561#if FE_DEBUG >= 3 562 if (i < FE_MAX_RECV_COUNT) 563 log(LOG_INFO, "%s: receive buffer emptied (%d)\n", 564 device_xname(sc->sc_dev), i); 565#endif 566 567#if FE_DEBUG >= 3 568 log(LOG_INFO, "%s: after ERB loop\n", device_xname(sc->sc_dev)); 569 mb86960_dump(LOG_INFO, sc); 570#endif 571 572 /* Do we need this here? */ 573 bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF); /* Clear all bits. */ 574 bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF); /* ditto. */ 575 576#if FE_DEBUG >= 3 577 log(LOG_INFO, "%s: after FIXME\n", device_xname(sc->sc_dev)); 578 mb86960_dump(LOG_INFO, sc); 579#endif 580 581 /* Set 'running' flag. */ 582 ifp->if_flags |= IFF_RUNNING; 583 584 /* 585 * At this point, the interface is running properly, 586 * except that it receives *no* packets. we then call 587 * mb86960_setmode() to tell the chip what packets to be 588 * received, based on the if_flags and multicast group 589 * list. It completes the initialization process. 590 */ 591 mb86960_setmode(sc); 592 593#if FE_DEBUG >= 3 594 log(LOG_INFO, "%s: after setmode\n", device_xname(sc->sc_dev)); 595 mb86960_dump(LOG_INFO, sc); 596#endif 597 598 /* ...and attempt to start output. */ 599 mb86960_start(ifp); 600 601#if FE_DEBUG >= 3 602 log(LOG_INFO, "%s: end of mb86960_init()\n", device_xname(sc->sc_dev)); 603 mb86960_dump(LOG_INFO, sc); 604#endif 605} 606 607/* 608 * This routine actually starts the transmission on the interface 609 */ 610static inline void 611mb86960_xmit(struct mb86960_softc *sc) 612{ 613 bus_space_tag_t bst = sc->sc_bst; 614 bus_space_handle_t bsh = sc->sc_bsh; 615 616 /* 617 * Set a timer just in case we never hear from the board again. 618 * We use longer timeout for multiple packet transmission. 619 * I'm not sure this timer value is appropriate. FIXME. 620 */ 621 sc->sc_ec.ec_if.if_timer = 1 + sc->txb_count; 622 623 /* Update txb variables. */ 624 sc->txb_sched = sc->txb_count; 625 sc->txb_count = 0; 626 sc->txb_free = sc->txb_size; 627 628#if FE_DELAYED_PADDING 629 /* Omit the postponed padding process. */ 630 sc->txb_padding = 0; 631#endif 632 633 /* Start transmitter, passing packets in TX buffer. */ 634 bus_space_write_1(bst, bsh, FE_BMPR10, sc->txb_sched | FE_B10_START); 635} 636 637/* 638 * Start output on interface. 639 * We make two assumptions here: 640 * 1) that the current priority is set to splnet _before_ this code 641 * is called *and* is returned to the appropriate priority after 642 * return 643 * 2) that the IFF_OACTIVE flag is checked before this code is called 644 * (i.e. that the output part of the interface is idle) 645 */ 646void 647mb86960_start(struct ifnet *ifp) 648{ 649 struct mb86960_softc *sc = ifp->if_softc; 650 struct mbuf *m; 651 652#if FE_DEBUG >= 1 653 /* Just a sanity check. */ 654 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) { 655 /* 656 * Txb_count and txb_free co-works to manage the 657 * transmission buffer. Txb_count keeps track of the 658 * used potion of the buffer, while txb_free does unused 659 * potion. So, as long as the driver runs properly, 660 * txb_count is zero if and only if txb_free is same 661 * as txb_size (which represents whole buffer.) 662 */ 663 log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n", 664 device_xname(sc->sc_dev), sc->txb_count, sc->txb_free); 665 /* 666 * So, what should I do, then? 667 * 668 * We now know txb_count and txb_free contradicts. We 669 * cannot, however, tell which is wrong. More 670 * over, we cannot peek 86960 transmission buffer or 671 * reset the transmission buffer. (In fact, we can 672 * reset the entire interface. I don't want to do it.) 673 * 674 * If txb_count is incorrect, leaving it as is will cause 675 * sending of garbage after the next interrupt. We have to 676 * avoid it. Hence, we reset the txb_count here. If 677 * txb_free was incorrect, resetting txb_count just lose 678 * some packets. We can live with it. 679 */ 680 sc->txb_count = 0; 681 } 682#endif 683 684#if FE_DEBUG >= 1 685 /* 686 * First, see if there are buffered packets and an idle 687 * transmitter - should never happen at this point. 688 */ 689 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) { 690 log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n", 691 device_xname(sc->sc_dev), sc->txb_count); 692 mb86960_xmit(sc); 693 } 694#endif 695 696 /* 697 * Stop accepting more transmission packets temporarily, when 698 * a filter change request is delayed. Updating the MARs on 699 * 86960 flushes the transmission buffer, so it is delayed 700 * until all buffered transmission packets have been sent 701 * out. 702 */ 703 if (sc->filter_change) { 704 /* 705 * Filter change request is delayed only when the DLC is 706 * working. DLC soon raise an interrupt after finishing 707 * the work. 708 */ 709 goto indicate_active; 710 } 711 712 for (;;) { 713 /* 714 * See if there is room to put another packet in the buffer. 715 * We *could* do better job by peeking the send queue to 716 * know the length of the next packet. Current version just 717 * tests against the worst case (i.e., longest packet). FIXME. 718 * 719 * When adding the packet-peek feature, don't forget adding a 720 * test on txb_count against QUEUEING_MAX. 721 * There is a little chance the packet count exceeds 722 * the limit. Assume transmission buffer is 8KB (2x8KB 723 * configuration) and an application sends a bunch of small 724 * (i.e., minimum packet sized) packets rapidly. An 8KB 725 * buffer can hold 130 blocks of 62 bytes long... 726 */ 727 if (sc->txb_free < 728 (ETHER_MAX_LEN - ETHER_CRC_LEN) + FE_TXLEN_SIZE) { 729 /* No room. */ 730 goto indicate_active; 731 } 732 733#if FE_SINGLE_TRANSMISSION 734 if (sc->txb_count > 0) { 735 /* Just one packet per a transmission buffer. */ 736 goto indicate_active; 737 } 738#endif 739 740 /* 741 * Get the next mbuf chain for a packet to send. 742 */ 743 IFQ_DEQUEUE(&ifp->if_snd, m); 744 if (m == 0) { 745 /* No more packets to send. */ 746 goto indicate_inactive; 747 } 748 749 /* Tap off here if there is a BPF listener. */ 750 bpf_mtap(ifp, m, BPF_D_OUT); 751 752 /* 753 * Copy the mbuf chain into the transmission buffer. 754 * txb_* variables are updated as necessary. 755 */ 756 mb86960_write_mbufs(sc, m); 757 758 m_freem(m); 759 760 /* Start transmitter if it's idle. */ 761 if (sc->txb_sched == 0) 762 mb86960_xmit(sc); 763 } 764 765indicate_inactive: 766 /* 767 * We are using the !OACTIVE flag to indicate to 768 * the outside world that we can accept an 769 * additional packet rather than that the 770 * transmitter is _actually_ active. Indeed, the 771 * transmitter may be active, but if we haven't 772 * filled all the buffers with data then we still 773 * want to accept more. 774 */ 775 ifp->if_flags &= ~IFF_OACTIVE; 776 return; 777 778indicate_active: 779 /* 780 * The transmitter is active, and there are no room for 781 * more outgoing packets in the transmission buffer. 782 */ 783 ifp->if_flags |= IFF_OACTIVE; 784 return; 785} 786 787/* 788 * Transmission interrupt handler 789 * The control flow of this function looks silly. FIXME. 790 */ 791void 792mb86960_tint(struct mb86960_softc *sc, uint8_t tstat) 793{ 794 bus_space_tag_t bst = sc->sc_bst; 795 bus_space_handle_t bsh = sc->sc_bsh; 796 struct ifnet *ifp = &sc->sc_ec.ec_if; 797 int left; 798 int col; 799 800 /* 801 * Handle "excessive collision" interrupt. 802 */ 803 if (tstat & FE_D0_COLL16) { 804 /* 805 * Find how many packets (including this collided one) 806 * are left unsent in transmission buffer. 807 */ 808 left = bus_space_read_1(bst, bsh, FE_BMPR10); 809 810#if FE_DEBUG >= 2 811 log(LOG_WARNING, "%s: excessive collision (%d/%d)\n", 812 device_xname(sc->sc_dev), left, sc->txb_sched); 813#endif 814#if FE_DEBUG >= 3 815 mb86960_dump(LOG_INFO, sc); 816#endif 817 818 /* 819 * Update statistics. 820 */ 821 net_stat_ref_t nsr = IF_STAT_GETREF(ifp); 822 if_statadd_ref(nsr, if_collisions, 16); 823 if_statinc_ref(nsr, if_oerrors); 824 if_statadd_ref(nsr, if_opackets, sc->txb_sched - left); 825 IF_STAT_PUTREF(ifp); 826 827 /* 828 * Collision statistics has been updated. 829 * Clear the collision flag on 86960 now to avoid confusion. 830 */ 831 bus_space_write_1(bst, bsh, FE_DLCR0, FE_D0_COLLID); 832 833 /* 834 * Restart transmitter, skipping the 835 * collided packet. 836 * 837 * We *must* skip the packet to keep network running 838 * properly. Excessive collision error is an 839 * indication of the network overload. If we 840 * tried sending the same packet after excessive 841 * collision, the network would be filled with 842 * out-of-time packets. Packets belonging 843 * to reliable transport (such as TCP) are resent 844 * by some upper layer. 845 */ 846 bus_space_write_1(bst, bsh, FE_BMPR11, 847 FE_B11_CTRL_SKIP | FE_B11_MODE1); 848 sc->txb_sched = left - 1; 849 } 850 851 /* 852 * Handle "transmission complete" interrupt. 853 */ 854 if (tstat & FE_D0_TXDONE) { 855 /* 856 * Add in total number of collisions on last 857 * transmission. We also clear "collision occurred" flag 858 * here. 859 * 860 * 86960 has a design flow on collision count on multiple 861 * packet transmission. When we send two or more packets 862 * with one start command (that's what we do when the 863 * transmission queue is crowded), 86960 informs us number 864 * of collisions occurred on the last packet on the 865 * transmission only. Number of collisions on previous 866 * packets are lost. I have told that the fact is clearly 867 * stated in the Fujitsu document. 868 * 869 * I considered not to mind it seriously. Collision 870 * count is not so important, anyway. Any comments? FIXME. 871 */ 872 873 if (bus_space_read_1(bst, bsh, FE_DLCR0) & FE_D0_COLLID) { 874 /* Clear collision flag. */ 875 bus_space_write_1(bst, bsh, FE_DLCR0, FE_D0_COLLID); 876 877 /* Extract collision count from 86960. */ 878 col = bus_space_read_1(bst, bsh, FE_DLCR4) & FE_D4_COL; 879 if (col == 0) { 880 /* 881 * Status register indicates collisions, 882 * while the collision count is zero. 883 * This can happen after multiple packet 884 * transmission, indicating that one or more 885 * previous packet(s) had been collided. 886 * 887 * Since the accurate number of collisions 888 * has been lost, we just guess it as 1; 889 * Am I too optimistic? FIXME. 890 */ 891 col = 1; 892 } else 893 col >>= FE_D4_COL_SHIFT; 894 if_statadd(ifp, if_collisions, col); 895#if FE_DEBUG >= 4 896 log(LOG_WARNING, "%s: %d collision%s (%d)\n", 897 device_xname(sc->sc_dev), col, col == 1 ? "" : "s", 898 sc->txb_sched); 899#endif 900 } 901 902 /* 903 * Update total number of successfully 904 * transmitted packets. 905 */ 906 if_statadd(ifp, if_opackets, sc->txb_sched); 907 sc->txb_sched = 0; 908 } 909 910 if (sc->txb_sched == 0) { 911 /* 912 * The transmitter is no more active. 913 * Reset output active flag and watchdog timer. 914 */ 915 ifp->if_flags &= ~IFF_OACTIVE; 916 ifp->if_timer = 0; 917 918 /* 919 * If more data is ready to transmit in the buffer, start 920 * transmitting them. Otherwise keep transmitter idle, 921 * even if more data is queued. This gives receive 922 * process a slight priority. 923 */ 924 if (sc->txb_count > 0) 925 mb86960_xmit(sc); 926 } 927} 928 929/* 930 * Ethernet interface receiver interrupt. 931 */ 932void 933mb86960_rint(struct mb86960_softc *sc, uint8_t rstat) 934{ 935 bus_space_tag_t bst = sc->sc_bst; 936 bus_space_handle_t bsh = sc->sc_bsh; 937 struct ifnet *ifp = &sc->sc_ec.ec_if; 938 u_int status, len; 939 int i; 940 941 /* 942 * Update statistics if this interrupt is caused by an error. 943 */ 944 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR | 945 FE_D1_SRTPKT)) { 946#if FE_DEBUG >= 3 947 char sbuf[sizeof(FE_D1_ERRBITS) + 64]; 948 949 snprintb(sbuf, sizeof(sbuf), FE_D1_ERRBITS, rstat); 950 log(LOG_WARNING, "%s: receive error: %s\n", 951 device_xname(sc->sc_dev), sbuf); 952#endif 953 if_statinc(ifp, if_ierrors); 954 } 955 956 /* 957 * MB86960 has a flag indicating "receive queue empty." 958 * We just loop checking the flag to pull out all received 959 * packets. 960 * 961 * We limit the number of iterations to avoid infinite loop. 962 * It can be caused by a very slow CPU (some broken 963 * peripheral may insert incredible number of wait cycles) 964 * or, worse, by a broken MB86960 chip. 965 */ 966 for (i = 0; i < FE_MAX_RECV_COUNT; i++) { 967 /* Stop the iterration if 86960 indicates no packets. */ 968 if (bus_space_read_1(bst, bsh, FE_DLCR5) & FE_D5_BUFEMP) 969 break; 970 971 /* 972 * Extract receive packet status from the receive 973 * packet header. 974 */ 975 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) { 976 status = bus_space_read_1(bst, bsh, FE_BMPR8); 977 (void)bus_space_read_1(bst, bsh, FE_BMPR8); 978 } else 979 status = bus_space_read_2(bst, bsh, FE_BMPR8); 980 981#if FE_DEBUG >= 4 982 log(LOG_INFO, "%s: receive status = %02x\n", 983 device_xname(sc->sc_dev), status); 984#endif 985 986 /* 987 * If there was an error, update statistics and drop 988 * the packet, unless the interface is in promiscuous 989 * mode. 990 */ 991 if ((status & FE_RXSTAT_GOODPKT) == 0) { 992 if ((ifp->if_flags & IFF_PROMISC) == 0) { 993 if_statinc(ifp, if_ierrors); 994 mb86960_droppacket(sc); 995 continue; 996 } 997 } 998 999 /* 1000 * Extract the packet length from the receive packet header. 1001 * It is a sum of a header (14 bytes) and a payload. 1002 * CRC has been stripped off by the 86960. 1003 */ 1004 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) { 1005 len = bus_space_read_1(bst, bsh, FE_BMPR8); 1006 len |= bus_space_read_1(bst, bsh, FE_BMPR8) << 8; 1007 } else 1008 len = bus_space_read_2(bst, bsh, FE_BMPR8); 1009 1010 /* 1011 * MB86965 checks the packet length and drop big packet 1012 * before passing it to us. There are no chance we can 1013 * get [crufty] packets. Hence, if the length exceeds 1014 * the specified limit, it means some serious failure, 1015 * such as out-of-sync on receive buffer management. 1016 * 1017 * Is this statement true? FIXME. 1018 */ 1019 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN) || 1020 len < ETHER_HDR_LEN) { 1021#if FE_DEBUG >= 2 1022 log(LOG_WARNING, 1023 "%s: received a %s packet? (%u bytes)\n", 1024 device_xname(sc->sc_dev), 1025 len < ETHER_HDR_LEN ? "partial" : "big", len); 1026#endif 1027 if_statinc(ifp, if_ierrors); 1028 mb86960_droppacket(sc); 1029 continue; 1030 } 1031 1032 /* 1033 * Check for a short (RUNT) packet. We *do* check 1034 * but do nothing other than print a message. 1035 * Short packets are illegal, but does nothing bad 1036 * if it carries data for upper layer. 1037 */ 1038#if FE_DEBUG >= 2 1039 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 1040 log(LOG_WARNING, 1041 "%s: received a short packet? (%u bytes)\n", 1042 device_xname(sc->sc_dev), len); 1043 } 1044#endif 1045 1046 /* 1047 * Go get a packet. 1048 */ 1049 if (mb86960_get_packet(sc, len) == 0) { 1050 /* Skip a packet, updating statistics. */ 1051#if FE_DEBUG >= 2 1052 log(LOG_WARNING, 1053 "%s: out of mbufs; dropping packet (%u bytes)\n", 1054 device_xname(sc->sc_dev), len); 1055#endif 1056 if_statinc(ifp, if_ierrors); 1057 mb86960_droppacket(sc); 1058 1059 /* 1060 * We stop receiving packets, even if there are 1061 * more in the buffer. We hope we can get more 1062 * mbufs next time. 1063 */ 1064 return; 1065 } 1066 } 1067} 1068 1069/* 1070 * Ethernet interface interrupt processor 1071 */ 1072int 1073mb86960_intr(void *arg) 1074{ 1075 struct mb86960_softc *sc = arg; 1076 bus_space_tag_t bst = sc->sc_bst; 1077 bus_space_handle_t bsh = sc->sc_bsh; 1078 struct ifnet *ifp = &sc->sc_ec.ec_if; 1079 uint8_t tstat, rstat; 1080 1081 if ((sc->sc_stat & FE_STAT_ENABLED) == 0 || 1082 !device_is_active(sc->sc_dev)) 1083 return 0; 1084 1085#if FE_DEBUG >= 4 1086 log(LOG_INFO, "%s: mb86960_intr()\n", device_xname(sc->sc_dev)); 1087 mb86960_dump(LOG_INFO, sc); 1088#endif 1089 1090 /* 1091 * Get interrupt conditions, masking unneeded flags. 1092 */ 1093 tstat = bus_space_read_1(bst, bsh, FE_DLCR0) & FE_TMASK; 1094 rstat = bus_space_read_1(bst, bsh, FE_DLCR1) & FE_RMASK; 1095 if (tstat == 0 && rstat == 0) 1096 return 0; 1097 1098 /* 1099 * Loop until there are no more new interrupt conditions. 1100 */ 1101 for (;;) { 1102 /* 1103 * Reset the conditions we are acknowledging. 1104 */ 1105 bus_space_write_1(bst, bsh, FE_DLCR0, tstat); 1106 bus_space_write_1(bst, bsh, FE_DLCR1, rstat); 1107 1108 /* 1109 * Handle transmitter interrupts. Handle these first because 1110 * the receiver will reset the board under some conditions. 1111 */ 1112 if (tstat != 0) 1113 mb86960_tint(sc, tstat); 1114 1115 /* 1116 * Handle receiver interrupts. 1117 */ 1118 if (rstat != 0) 1119 mb86960_rint(sc, rstat); 1120 1121 /* 1122 * Update the multicast address filter if it is 1123 * needed and possible. We do it now, because 1124 * we can make sure the transmission buffer is empty, 1125 * and there is a good chance that the receive queue 1126 * is empty. It will minimize the possibility of 1127 * packet lossage. 1128 */ 1129 if (sc->filter_change && 1130 sc->txb_count == 0 && sc->txb_sched == 0) { 1131 mb86960_loadmar(sc); 1132 ifp->if_flags &= ~IFF_OACTIVE; 1133 } 1134 1135 /* 1136 * If it looks like the transmitter can take more data, 1137 * attempt to start output on the interface. This is done 1138 * after handling the receiver interrupt to give the 1139 * receive operation priority. 1140 */ 1141 if ((ifp->if_flags & IFF_OACTIVE) == 0) 1142 if_schedule_deferred_start(ifp); 1143 1144 if (rstat != 0 || tstat != 0) 1145 rnd_add_uint32(&sc->rnd_source, rstat + tstat); 1146 1147 /* 1148 * Get interrupt conditions, masking unneeded flags. 1149 */ 1150 tstat = bus_space_read_1(bst, bsh, FE_DLCR0) & FE_TMASK; 1151 rstat = bus_space_read_1(bst, bsh, FE_DLCR1) & FE_RMASK; 1152 if (tstat == 0 && rstat == 0) 1153 return 1; 1154 } 1155} 1156 1157/* 1158 * Process an ioctl request. This code needs some work - it looks pretty ugly. 1159 */ 1160int 1161mb86960_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1162{ 1163 struct mb86960_softc *sc = ifp->if_softc; 1164 struct ifaddr *ifa = (struct ifaddr *)data; 1165 int s, error = 0; 1166 1167#if FE_DEBUG >= 3 1168 log(LOG_INFO, "%s: ioctl(%lx)\n", device_xname(sc->sc_dev), cmd); 1169#endif 1170 1171 s = splnet(); 1172 1173 switch (cmd) { 1174 case SIOCINITIFADDR: 1175 if ((error = mb86960_enable(sc)) != 0) 1176 break; 1177 ifp->if_flags |= IFF_UP; 1178 1179 mb86960_init(sc); 1180 switch (ifa->ifa_addr->sa_family) { 1181#ifdef INET 1182 case AF_INET: 1183 arp_ifinit(ifp, ifa); 1184 break; 1185#endif 1186 default: 1187 break; 1188 } 1189 break; 1190 1191 case SIOCSIFFLAGS: 1192 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1193 break; 1194 /* XXX re-use ether_ioctl() */ 1195 switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { 1196 case IFF_RUNNING: 1197 /* 1198 * If interface is marked down and it is running, then 1199 * stop it. 1200 */ 1201 mb86960_stop(sc); 1202 ifp->if_flags &= ~IFF_RUNNING; 1203 mb86960_disable(sc); 1204 break; 1205 case IFF_UP: 1206 /* 1207 * If interface is marked up and it is stopped, then 1208 * start it. 1209 */ 1210 if ((error = mb86960_enable(sc)) != 0) 1211 break; 1212 mb86960_init(sc); 1213 break; 1214 case IFF_UP | IFF_RUNNING: 1215 /* 1216 * Reset the interface to pick up changes in any other 1217 * flags that affect hardware registers. 1218 */ 1219 mb86960_setmode(sc); 1220 break; 1221 case 0: 1222 break; 1223 } 1224#if FE_DEBUG >= 1 1225 /* "ifconfig fe0 debug" to print register dump. */ 1226 if (ifp->if_flags & IFF_DEBUG) { 1227 log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n", 1228 device_xname(sc->sc_dev)); 1229 mb86960_dump(LOG_DEBUG, sc); 1230 } 1231#endif 1232 break; 1233 1234 case SIOCADDMULTI: 1235 case SIOCDELMULTI: 1236 if ((sc->sc_stat & FE_STAT_ENABLED) == 0) { 1237 error = EIO; 1238 break; 1239 } 1240 1241 /* Update our multicast list. */ 1242 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1243 /* 1244 * Multicast list has changed; set the hardware filter 1245 * accordingly. 1246 */ 1247 if (ifp->if_flags & IFF_RUNNING) 1248 mb86960_setmode(sc); 1249 error = 0; 1250 } 1251 break; 1252 1253 default: 1254 error = ether_ioctl(ifp, cmd, data); 1255 break; 1256 } 1257 1258 splx(s); 1259 return error; 1260} 1261 1262/* 1263 * Retrieve packet from receive buffer and send to the next level up via 1264 * ether_input(). If there is a BPF listener, give a copy to BPF, too. 1265 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure). 1266 */ 1267int 1268mb86960_get_packet(struct mb86960_softc *sc, u_int len) 1269{ 1270 bus_space_tag_t bst = sc->sc_bst; 1271 bus_space_handle_t bsh = sc->sc_bsh; 1272 struct ifnet *ifp = &sc->sc_ec.ec_if; 1273 struct mbuf *m; 1274 1275 /* Allocate a header mbuf. */ 1276 MGETHDR(m, M_DONTWAIT, MT_DATA); 1277 if (m == 0) 1278 return 0; 1279 m_set_rcvif(m, ifp); 1280 m->m_pkthdr.len = len; 1281 1282 /* The following silliness is to make NFS happy. */ 1283#define EROUND ((sizeof(struct ether_header) + 3) & ~3) 1284#define EOFF (EROUND - sizeof(struct ether_header)) 1285 1286 /* 1287 * Our strategy has one more problem. There is a policy on 1288 * mbuf cluster allocation. It says that we must have at 1289 * least MINCLSIZE (208 bytes) to allocate a cluster. For a 1290 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2), 1291 * our code violates the rule... 1292 * On the other hand, the current code is short, simple, 1293 * and fast, however. It does no harmful thing, just waists 1294 * some memory. Any comments? FIXME. 1295 */ 1296 1297 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */ 1298 if (len > MHLEN - EOFF) { 1299 MCLGET(m, M_DONTWAIT); 1300 if ((m->m_flags & M_EXT) == 0) { 1301 m_freem(m); 1302 return 0; 1303 } 1304 } 1305 1306 /* 1307 * The following assumes there is room for the ether header in the 1308 * header mbuf. 1309 */ 1310 m->m_data += EOFF; 1311 1312 /* Set the length of this packet. */ 1313 m->m_len = len; 1314 1315 /* Get a packet. */ 1316 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) 1317 bus_space_read_multi_1(bst, bsh, FE_BMPR8, 1318 mtod(m, uint8_t *), len); 1319 else 1320 bus_space_read_multi_stream_2(bst, bsh, FE_BMPR8, 1321 mtod(m, uint16_t *), (len + 1) >> 1); 1322 1323 if_percpuq_enqueue(ifp->if_percpuq, m); 1324 return 1; 1325} 1326 1327/* 1328 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO. 1329 * Returns number of bytes actually written, including length word. 1330 * 1331 * If an mbuf chain is too long for an Ethernet frame, it is not sent. 1332 * Packets shorter than Ethernet minimum are legal, and we pad them 1333 * before sending out. An exception is "partial" packets which are 1334 * shorter than mandatory Ethernet header. 1335 * 1336 * I wrote a code for an experimental "delayed padding" technique. 1337 * When employed, it postpones the padding process for short packets. 1338 * If xmit() occurred at the moment, the padding process is omitted, and 1339 * garbages are sent as pad data. If next packet is stored in the 1340 * transmission buffer before xmit(), write_mbuf() pads the previous 1341 * packet before transmitting new packet. This *may* gain the 1342 * system performance (slightly). 1343 */ 1344void 1345mb86960_write_mbufs(struct mb86960_softc *sc, struct mbuf *m) 1346{ 1347 bus_space_tag_t bst = sc->sc_bst; 1348 bus_space_handle_t bsh = sc->sc_bsh; 1349 int totlen, len; 1350#if FE_DEBUG >= 2 1351 struct mbuf *mp; 1352#endif 1353 1354#if FE_DELAYED_PADDING 1355 /* Do the "delayed padding." */ 1356 if (sc->txb_padding > 0) { 1357 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) { 1358 for (len = sc->txb_padding; len > 0; len--) 1359 bus_space_write_1(bst, bsh, FE_BMPR8, 0); 1360 } else { 1361 for (len = sc->txb_padding >> 1; len > 0; len--) 1362 bus_space_write_2(bst, bsh, FE_BMPR8, 0); 1363 } 1364 sc->txb_padding = 0; 1365 } 1366#endif 1367 1368 /* We need to use m->m_pkthdr.len, so require the header */ 1369 if ((m->m_flags & M_PKTHDR) == 0) 1370 panic("mb86960_write_mbufs: no header mbuf"); 1371 1372#if FE_DEBUG >= 2 1373 /* First, count up the total number of bytes to copy. */ 1374 for (totlen = 0, mp = m; mp != 0; mp = mp->m_next) 1375 totlen += mp->m_len; 1376 /* Check if this matches the one in the packet header. */ 1377 if (totlen != m->m_pkthdr.len) 1378 log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n", 1379 device_xname(sc->sc_dev), totlen, m->m_pkthdr.len); 1380#else 1381 /* Just use the length value in the packet header. */ 1382 totlen = m->m_pkthdr.len; 1383#endif 1384 1385#if FE_DEBUG >= 1 1386 /* 1387 * Should never send big packets. If such a packet is passed, 1388 * it should be a bug of upper layer. We just ignore it. 1389 * ... Partial (too short) packets, neither. 1390 */ 1391 if (totlen > (ETHER_MAX_LEN - ETHER_CRC_LEN) || 1392 totlen < ETHER_HDR_LEN) { 1393 log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n", 1394 device_xname(sc->sc_dev), 1395 totlen < ETHER_HDR_LEN ? "partial" : "big", totlen); 1396 if_statinc(&sc->sc_ec.ec_if, if_oerrors); 1397 return; 1398 } 1399#endif 1400 1401 /* 1402 * Put the length word for this frame. 1403 * Does 86960 accept odd length? -- Yes. 1404 * Do we need to pad the length to minimum size by ourselves? 1405 * -- Generally yes. But for (or will be) the last 1406 * packet in the transmission buffer, we can skip the 1407 * padding process. It may gain performance slightly. FIXME. 1408 */ 1409 len = uimax(totlen, (ETHER_MIN_LEN - ETHER_CRC_LEN)); 1410 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) { 1411 bus_space_write_1(bst, bsh, FE_BMPR8, len); 1412 bus_space_write_1(bst, bsh, FE_BMPR8, len >> 8); 1413 } else { 1414 bus_space_write_2(bst, bsh, FE_BMPR8, len); 1415 /* roundup packet length since we will use word access */ 1416 totlen = (totlen + 1) & ~1; 1417 } 1418 1419 /* 1420 * Update buffer status now. 1421 * Truncate the length up to an even number 1422 * if the chip is set in SBW_WORD mode. 1423 */ 1424 sc->txb_free -= FE_TXLEN_SIZE + 1425 uimax(totlen, (ETHER_MIN_LEN - ETHER_CRC_LEN)); 1426 sc->txb_count++; 1427 1428#if FE_DELAYED_PADDING 1429 /* Postpone the packet padding if necessary. */ 1430 if (totlen < (ETHER_MIN_LEN - ETHER_CRC_LEN)) 1431 sc->txb_padding = (ETHER_MIN_LEN - ETHER_CRC_LEN) - totlen; 1432#endif 1433 1434 /* 1435 * Transfer the data from mbuf chain to the transmission buffer. 1436 * If the MB86960 is configured in word mode, data needs to be 1437 * transferred as words, and only words. 1438 * So that we require some extra code to patch over odd-length 1439 * or unaligned mbufs. 1440 */ 1441 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) { 1442 /* It's simple in byte mode. */ 1443 for (; m != NULL; m = m->m_next) { 1444 if (m->m_len) { 1445 bus_space_write_multi_1(bst, bsh, FE_BMPR8, 1446 mtod(m, uint8_t *), m->m_len); 1447 } 1448 } 1449 } else { 1450 /* a bit trickier in word mode. */ 1451 uint8_t *data, savebyte[2]; 1452 int leftover; 1453 1454 leftover = 0; 1455 savebyte[0] = savebyte[1] = 0; 1456 1457 for (; m != NULL; m = m->m_next) { 1458 len = m->m_len; 1459 if (len == 0) 1460 continue; 1461 data = mtod(m, uint8_t *); 1462 while (len > 0) { 1463 if (leftover) { 1464 /* 1465 * Data left over (from mbuf or 1466 * realignment). Buffer the next 1467 * byte, and write it and the 1468 * leftover data out. 1469 */ 1470 savebyte[1] = *data++; 1471 len--; 1472 bus_space_write_stream_2(bst, bsh, 1473 FE_BMPR8, *(uint16_t *)savebyte); 1474 leftover = 0; 1475 } else if (BUS_SPACE_ALIGNED_POINTER(data, 1476 uint16_t) == 0) { 1477 /* 1478 * Unaligned data; buffer the next byte. 1479 */ 1480 savebyte[0] = *data++; 1481 len--; 1482 leftover = 1; 1483 } else { 1484 /* 1485 * Aligned data; output contiguous 1486 * words as much as we can, then 1487 * buffer the remaining byte, if any. 1488 */ 1489 leftover = len & 1; 1490 len &= ~1; 1491 bus_space_write_multi_stream_2(bst, 1492 bsh, FE_BMPR8, (uint16_t *)data, 1493 len >> 1); 1494 data += len; 1495 if (leftover) 1496 savebyte[0] = *data++; 1497 len = 0; 1498 } 1499 } 1500 if (len < 0) 1501 panic("mb86960_write_mbufs: negative len"); 1502 } 1503 if (leftover) { 1504 savebyte[1] = 0; 1505 bus_space_write_stream_2(bst, bsh, FE_BMPR8, 1506 *(uint16_t *)savebyte); 1507 } 1508 } 1509#if FE_DELAYED_PADDING == 0 1510 /* 1511 * Pad the packet to the minimum length if necessary. 1512 */ 1513 len = (ETHER_MIN_LEN - ETHER_CRC_LEN) - totlen; 1514 if (len > 0) { 1515 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) { 1516 while (len-- > 0) 1517 bus_space_write_1(bst, bsh, FE_BMPR8, 0); 1518 } else { 1519 len >>= 1; 1520 while (len-- > 0) 1521 bus_space_write_2(bst, bsh, FE_BMPR8, 0); 1522 } 1523 } 1524#endif 1525} 1526 1527/* 1528 * Compute the multicast address filter from the 1529 * list of multicast addresses we need to listen to. 1530 */ 1531void 1532mb86960_getmcaf(struct ethercom *ec, uint8_t *af) 1533{ 1534 struct ifnet *ifp = &ec->ec_if; 1535 struct ether_multi *enm; 1536 uint32_t crc; 1537 struct ether_multistep step; 1538 1539 /* 1540 * Set up multicast address filter by passing all multicast addresses 1541 * through a crc generator, and then using the high order 6 bits as an 1542 * index into the 64 bit logical address filter. The high order bit 1543 * selects the word, while the rest of the bits select the bit within 1544 * the word. 1545 */ 1546 1547 if ((ifp->if_flags & IFF_PROMISC) != 0) 1548 goto allmulti; 1549 1550 memset(af, 0, FE_FILTER_LEN); 1551 ETHER_LOCK(ec); 1552 ETHER_FIRST_MULTI(step, ec, enm); 1553 while (enm != NULL) { 1554 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 1555 sizeof(enm->enm_addrlo)) != 0) { 1556 /* 1557 * We must listen to a range of multicast addresses. 1558 * For now, just accept all multicasts, rather than 1559 * trying to set only those filter bits needed to match 1560 * the range. (At this time, the only use of address 1561 * ranges is for IP multicast routing, for which the 1562 * range is big enough to require all bits set.) 1563 */ 1564 ETHER_UNLOCK(ec); 1565 goto allmulti; 1566 } 1567 1568 crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN); 1569 1570 /* Just want the 6 most significant bits. */ 1571 crc >>= 26; 1572 1573 /* Turn on the corresponding bit in the filter. */ 1574 af[crc >> 3] |= 1 << (crc & 7); 1575 1576 ETHER_NEXT_MULTI(step, enm); 1577 } 1578 ETHER_UNLOCK(ec); 1579 ifp->if_flags &= ~IFF_ALLMULTI; 1580 return; 1581 1582allmulti: 1583 ifp->if_flags |= IFF_ALLMULTI; 1584 memset(af, 0xff, FE_FILTER_LEN); 1585} 1586 1587/* 1588 * Calculate a new "multicast packet filter" and put the 86960 1589 * receiver in appropriate mode. 1590 */ 1591void 1592mb86960_setmode(struct mb86960_softc *sc) 1593{ 1594 bus_space_tag_t bst = sc->sc_bst; 1595 bus_space_handle_t bsh = sc->sc_bsh; 1596 int flags = sc->sc_ec.ec_if.if_flags; 1597 1598 /* 1599 * If the interface is not running, we postpone the update 1600 * process for receive modes and multicast address filter 1601 * until the interface is restarted. It reduces some 1602 * complicated job on maintaining chip states. (Earlier versions 1603 * of this driver had a bug on that point...) 1604 * 1605 * To complete the trick, mb86960_init() calls mb86960_setmode() after 1606 * restarting the interface. 1607 */ 1608 if ((flags & IFF_RUNNING) == 0) 1609 return; 1610 1611 /* 1612 * Promiscuous mode is handled separately. 1613 */ 1614 if ((flags & IFF_PROMISC) != 0) { 1615 /* 1616 * Program 86960 to receive all packets on the segment 1617 * including those directed to other stations. 1618 * Multicast filter stored in MARs are ignored 1619 * under this setting, so we don't need to update it. 1620 * 1621 * Promiscuous mode is used solely by BPF, and BPF only 1622 * listens to valid (no error) packets. So, we ignore 1623 * errornous ones even in this mode. 1624 */ 1625 bus_space_write_1(bst, bsh, FE_DLCR5, 1626 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1); 1627 sc->filter_change = 0; 1628 1629#if FE_DEBUG >= 3 1630 log(LOG_INFO, "%s: promiscuous mode\n", 1631 device_xname(sc->sc_dev)); 1632#endif 1633 return; 1634 } 1635 1636 /* 1637 * Turn the chip to the normal (non-promiscuous) mode. 1638 */ 1639 bus_space_write_1(bst, bsh, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1); 1640 1641 /* 1642 * Find the new multicast filter value. 1643 */ 1644 mb86960_getmcaf(&sc->sc_ec, sc->filter); 1645 sc->filter_change = 1; 1646 1647#if FE_DEBUG >= 3 1648 log(LOG_INFO, 1649 "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n", 1650 device_xname(sc->sc_dev), 1651 sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3], 1652 sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]); 1653#endif 1654 1655 /* 1656 * We have to update the multicast filter in the 86960, A.S.A.P. 1657 * 1658 * Note that the DLC (Data Linc Control unit, i.e. transmitter 1659 * and receiver) must be stopped when feeding the filter, and 1660 * DLC trashes all packets in both transmission and receive 1661 * buffers when stopped. 1662 * 1663 * ... Are the above sentences correct? I have to check the 1664 * manual of the MB86960A. FIXME. 1665 * 1666 * To reduce the packet lossage, we delay the filter update 1667 * process until buffers are empty. 1668 */ 1669 if (sc->txb_sched == 0 && sc->txb_count == 0 && 1670 (bus_space_read_1(bst, bsh, FE_DLCR1) & FE_D1_PKTRDY) == 0) { 1671 /* 1672 * Buffers are (apparently) empty. Load 1673 * the new filter value into MARs now. 1674 */ 1675 mb86960_loadmar(sc); 1676 } else { 1677 /* 1678 * Buffers are not empty. Mark that we have to update 1679 * the MARs. The new filter will be loaded by mb86960_intr() 1680 * later. 1681 */ 1682#if FE_DEBUG >= 4 1683 log(LOG_INFO, "%s: filter change delayed\n", 1684 device_xname(sc->sc_dev)); 1685#endif 1686 } 1687} 1688 1689/* 1690 * Load a new multicast address filter into MARs. 1691 * 1692 * The caller must have splnet'ed before mb86960_loadmar. 1693 * This function starts the DLC upon return. So it can be called only 1694 * when the chip is working, i.e., from the driver's point of view, when 1695 * a device is RUNNING. (I mistook the point in previous versions.) 1696 */ 1697void 1698mb86960_loadmar(struct mb86960_softc *sc) 1699{ 1700 bus_space_tag_t bst = sc->sc_bst; 1701 bus_space_handle_t bsh = sc->sc_bsh; 1702 1703 /* Stop the DLC (transmitter and receiver). */ 1704 bus_space_write_1(bst, bsh, FE_DLCR6, 1705 sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 1706 1707 /* Select register bank 1 for MARs. */ 1708 bus_space_write_1(bst, bsh, FE_DLCR7, 1709 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP); 1710 1711 /* Copy filter value into the registers. */ 1712 bus_space_write_region_1(bst, bsh, FE_MAR8, sc->filter, FE_FILTER_LEN); 1713 1714 /* Restore the bank selection for BMPRs (i.e., runtime registers). */ 1715 bus_space_write_1(bst, bsh, FE_DLCR7, 1716 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 1717 1718 /* Restart the DLC. */ 1719 bus_space_write_1(bst, bsh, FE_DLCR6, 1720 sc->proto_dlcr6 | FE_D6_DLC_ENABLE); 1721 1722 /* We have just updated the filter. */ 1723 sc->filter_change = 0; 1724 1725#if FE_DEBUG >= 3 1726 log(LOG_INFO, "%s: address filter changed\n", device_xname(sc->sc_dev)); 1727#endif 1728} 1729 1730/* 1731 * Enable power on the interface. 1732 */ 1733int 1734mb86960_enable(struct mb86960_softc *sc) 1735{ 1736 1737#if FE_DEBUG >= 3 1738 log(LOG_INFO, "%s: mb86960_enable()\n", device_xname(sc->sc_dev)); 1739#endif 1740 1741 if ((sc->sc_stat & FE_STAT_ENABLED) == 0 && sc->sc_enable != NULL) { 1742 if ((*sc->sc_enable)(sc) != 0) { 1743 aprint_error_dev(sc->sc_dev, "device enable failed\n"); 1744 return EIO; 1745 } 1746 } 1747 1748 sc->sc_stat |= FE_STAT_ENABLED; 1749 return 0; 1750} 1751 1752/* 1753 * Disable power on the interface. 1754 */ 1755void 1756mb86960_disable(struct mb86960_softc *sc) 1757{ 1758 1759#if FE_DEBUG >= 3 1760 log(LOG_INFO, "%s: mb86960_disable()\n", device_xname(sc->sc_dev)); 1761#endif 1762 1763 if ((sc->sc_stat & FE_STAT_ENABLED) != 0 && sc->sc_disable != NULL) { 1764 (*sc->sc_disable)(sc); 1765 sc->sc_stat &= ~FE_STAT_ENABLED; 1766 } 1767} 1768 1769/* 1770 * mbe_activate: 1771 * 1772 * Handle device activation/deactivation requests. 1773 */ 1774int 1775mb86960_activate(device_t self, enum devact act) 1776{ 1777 struct mb86960_softc *sc = device_private(self); 1778 1779 switch (act) { 1780 case DVACT_DEACTIVATE: 1781 if_deactivate(&sc->sc_ec.ec_if); 1782 return 0; 1783 default: 1784 return EOPNOTSUPP; 1785 } 1786} 1787 1788/* 1789 * mb86960_detach: 1790 * 1791 * Detach a MB86960 interface. 1792 */ 1793int 1794mb86960_detach(struct mb86960_softc *sc) 1795{ 1796 struct ifnet *ifp = &sc->sc_ec.ec_if; 1797 1798 /* Succeed now if there's no work to do. */ 1799 if ((sc->sc_stat & FE_STAT_ATTACHED) == 0) 1800 return 0; 1801 1802 /* Unhook the entropy source. */ 1803 rnd_detach_source(&sc->rnd_source); 1804 1805 ether_ifdetach(ifp); 1806 if_detach(ifp); 1807 1808 /* Delete all media. */ 1809 ifmedia_fini(&sc->sc_media); 1810 1811 mb86960_disable(sc); 1812 return 0; 1813} 1814 1815/* 1816 * Routines to read all bytes from the config EEPROM (93C06) through MB86965A. 1817 */ 1818void 1819mb86965_read_eeprom(bus_space_tag_t iot, bus_space_handle_t ioh, uint8_t *data) 1820{ 1821 int addr, op, bit; 1822 uint16_t val; 1823 1824 /* Read bytes from EEPROM; two bytes per an iteration. */ 1825 for (addr = 0; addr < FE_EEPROM_SIZE / 2; addr++) { 1826 /* Reset the EEPROM interface. */ 1827 bus_space_write_1(iot, ioh, FE_BMPR16, 0x00); 1828 bus_space_write_1(iot, ioh, FE_BMPR17, 0x00); 1829 bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT); 1830 1831 /* Send start bit. */ 1832 bus_space_write_1(iot, ioh, FE_BMPR17, FE_B17_DATA); 1833 FE_EEPROM_DELAY(); 1834 bus_space_write_1(iot, ioh, 1835 FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK); 1836 FE_EEPROM_DELAY(); 1837 bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT); 1838 1839 /* Send read command and read address. */ 1840 op = 0x80 | addr; /* READ instruction */ 1841 for (bit = 8; bit > 0; bit--) { 1842 bus_space_write_1(iot, ioh, FE_BMPR17, 1843 (op & (1 << (bit - 1))) ? FE_B17_DATA : 0); 1844 FE_EEPROM_DELAY(); 1845 bus_space_write_1(iot, ioh, 1846 FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK); 1847 FE_EEPROM_DELAY(); 1848 bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT); 1849 } 1850 bus_space_write_1(iot, ioh, FE_BMPR17, 0x00); 1851 1852 /* Read two bytes in each address */ 1853 val = 0; 1854 for (bit = 16; bit > 0; bit--) { 1855 FE_EEPROM_DELAY(); 1856 bus_space_write_1(iot, ioh, 1857 FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK); 1858 FE_EEPROM_DELAY(); 1859 if (bus_space_read_1(iot, ioh, FE_BMPR17) & 1860 FE_B17_DATA) 1861 val |= 1 << (bit - 1); 1862 bus_space_write_1(iot, ioh, 1863 FE_BMPR16, FE_B16_SELECT); 1864 } 1865 data[addr * 2] = val >> 8; 1866 data[addr * 2 + 1] = val & 0xff; 1867 } 1868 1869 /* Make sure the EEPROM is turned off. */ 1870 bus_space_write_1(iot, ioh, FE_BMPR16, 0); 1871 bus_space_write_1(iot, ioh, FE_BMPR17, 0); 1872 1873#if FE_DEBUG >= 3 1874 /* Report what we got. */ 1875 log(LOG_INFO, "mb86965_read_eeprom: " 1876 " %02x%02x%02x%02x %02x%02x%02x%02x -" 1877 " %02x%02x%02x%02x %02x%02x%02x%02x -" 1878 " %02x%02x%02x%02x %02x%02x%02x%02x -" 1879 " %02x%02x%02x%02x %02x%02x%02x%02x\n", 1880 data[ 0], data[ 1], data[ 2], data[ 3], 1881 data[ 4], data[ 5], data[ 6], data[ 7], 1882 data[ 8], data[ 9], data[10], data[11], 1883 data[12], data[13], data[14], data[15], 1884 data[16], data[17], data[18], data[19], 1885 data[20], data[21], data[22], data[23], 1886 data[24], data[25], data[26], data[27], 1887 data[28], data[29], data[30], data[31]); 1888#endif 1889} 1890 1891#if FE_DEBUG >= 1 1892void 1893mb86960_dump(int level, struct mb86960_softc *sc) 1894{ 1895 bus_space_tag_t bst = sc->sc_bst; 1896 bus_space_handle_t bsh = sc->sc_bsh; 1897 uint8_t save_dlcr7; 1898 1899 save_dlcr7 = bus_space_read_1(bst, bsh, FE_DLCR7); 1900 1901 log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x\n", 1902 bus_space_read_1(bst, bsh, FE_DLCR0), 1903 bus_space_read_1(bst, bsh, FE_DLCR1), 1904 bus_space_read_1(bst, bsh, FE_DLCR2), 1905 bus_space_read_1(bst, bsh, FE_DLCR3), 1906 bus_space_read_1(bst, bsh, FE_DLCR4), 1907 bus_space_read_1(bst, bsh, FE_DLCR5), 1908 bus_space_read_1(bst, bsh, FE_DLCR6), 1909 bus_space_read_1(bst, bsh, FE_DLCR7)); 1910 1911 bus_space_write_1(bst, bsh, FE_DLCR7, 1912 (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR); 1913 log(level, "\t %02x %02x %02x %02x %02x %02x %02x %02x\n", 1914 bus_space_read_1(bst, bsh, FE_DLCR8), 1915 bus_space_read_1(bst, bsh, FE_DLCR9), 1916 bus_space_read_1(bst, bsh, FE_DLCR10), 1917 bus_space_read_1(bst, bsh, FE_DLCR11), 1918 bus_space_read_1(bst, bsh, FE_DLCR12), 1919 bus_space_read_1(bst, bsh, FE_DLCR13), 1920 bus_space_read_1(bst, bsh, FE_DLCR14), 1921 bus_space_read_1(bst, bsh, FE_DLCR15)); 1922 1923 bus_space_write_1(bst, bsh, FE_DLCR7, 1924 (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR); 1925 log(level, "\tMAR = %02x %02x %02x %02x %02x %02x %02x %02x\n", 1926 bus_space_read_1(bst, bsh, FE_MAR8), 1927 bus_space_read_1(bst, bsh, FE_MAR9), 1928 bus_space_read_1(bst, bsh, FE_MAR10), 1929 bus_space_read_1(bst, bsh, FE_MAR11), 1930 bus_space_read_1(bst, bsh, FE_MAR12), 1931 bus_space_read_1(bst, bsh, FE_MAR13), 1932 bus_space_read_1(bst, bsh, FE_MAR14), 1933 bus_space_read_1(bst, bsh, FE_MAR15)); 1934 1935 bus_space_write_1(bst, bsh, FE_DLCR7, 1936 (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR); 1937 log(level, 1938 "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x\n", 1939 bus_space_read_1(bst, bsh, FE_BMPR10), 1940 bus_space_read_1(bst, bsh, FE_BMPR11), 1941 bus_space_read_1(bst, bsh, FE_BMPR12), 1942 bus_space_read_1(bst, bsh, FE_BMPR13), 1943 bus_space_read_1(bst, bsh, FE_BMPR14), 1944 bus_space_read_1(bst, bsh, FE_BMPR15), 1945 bus_space_read_1(bst, bsh, FE_BMPR16), 1946 bus_space_read_1(bst, bsh, FE_BMPR17), 1947 bus_space_read_1(bst, bsh, FE_BMPR19)); 1948 1949 bus_space_write_1(bst, bsh, FE_DLCR7, save_dlcr7); 1950} 1951#endif 1952