i82586var.h revision 1.3
1/*	$NetBSD: i82586var.h,v 1.3 1997/07/29 20:24:46 pk Exp $	*/
2
3/*-
4 * Copyright (c) 1993, 1994, 1995 Charles Hannum.
5 * Copyright (c) 1992, 1993, University of Vermont and State
6 *  Agricultural College.
7 * Copyright (c) 1992, 1993, Garrett A. Wollman.
8 *
9 * Portions:
10 * Copyright (c) 1994, 1995, Rafal K. Boni
11 * Copyright (c) 1990, 1991, William F. Jolitz
12 * Copyright (c) 1990, The Regents of the University of California
13 *
14 * All rights reserved.
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
19 * 1. Redistributions of source code must retain the above copyright
20 *    notice, this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright
22 *    notice, this list of conditions and the following disclaimer in the
23 *    documentation and/or other materials provided with the distribution.
24 * 3. All advertising materials mentioning features or use of this software
25 *    must display the following acknowledgement:
26 *	This product includes software developed by Charles Hannum, by the
27 *	University of Vermont and State Agricultural College and Garrett A.
28 *	Wollman, by William F. Jolitz, and by the University of California,
29 *	Berkeley, Lawrence Berkeley Laboratory, and its contributors.
30 * 4. Neither the names of the Universities nor the names of the authors
31 *    may be used to endorse or promote products derived from this software
32 *    without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
35 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
36 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
37 * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR AUTHORS BE LIABLE
38 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
39 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
40 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
41 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
42 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
43 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
44 * SUCH DAMAGE.
45 */
46
47/*
48 * Intel 82586 Ethernet chip
49 * Register, bit, and structure definitions.
50 *
51 * Original StarLAN driver written by Garrett Wollman with reference to the
52 * Clarkson Packet Driver code for this chip written by Russ Nelson and others.
53 *
54 * BPF support code taken from hpdev/if_le.c, supplied with tcpdump.
55 *
56 * 3C507 support is loosely based on code donated to NetBSD by Rafal Boni.
57 *
58 * Majorly cleaned up and 3C507 code merged by Charles Hannum.
59 *
60 * Converted to SUN ie driver by Charles D. Cranor,
61 *		October 1994, January 1995.
62 * This sun version based on i386 version 1.30.
63 */
64
65#define IEDEBUG
66
67#define	IED_RINT	0x01
68#define	IED_TINT	0x02
69#define	IED_RNR		0x04
70#define	IED_CNA		0x08
71#define	IED_READFRAME	0x10
72#define IED_ENQ		0x20
73#define IED_XMIT	0x40
74#define	IED_ALL		0x7f
75
76#define	ETHER_MIN_LEN	64
77#define	ETHER_MAX_LEN	1518
78#define	ETHER_ADDR_LEN	6
79
80#define B_PER_F		3		/* recv buffers per frame */
81#define MAXFRAMES	300		/* max number of recv frames */
82#define	MAXRXBUF	(MAXFRAMES*B_PER_F) /* number of buffers to allocate */
83#define	IE_RBUF_SIZE	256		/* size of each receive buffer;
84						MUST BE POWER OF TWO */
85#define	NTXBUF		2		/* number of transmit commands */
86#define	IE_TBUF_SIZE	ETHER_MAX_LEN	/* length of transmit buffer */
87
88
89/*
90 * Ethernet status, per interface.
91 *
92 * hardware addresses/sizes to know (all KVA):
93 *   sc_iobase = base of chip's 24 bit address space
94 *   sc_maddr  = base address of chip RAM as stored in ie_base of iscp
95 *   sc_msize  = size of chip's RAM
96 *   sc_reg    = address of card dependent registers
97 *
98 * the chip uses two types of pointers: 16 bit and 24 bit
99 *   16 bit pointers are offsets from sc_maddr/ie_base
100 *      KVA(16 bit offset) = offset + sc_maddr
101 *   24 bit pointers are offset from sc_iobase in KVA
102 *      KVA(24 bit address) = address + sc_iobase
103 *
104 * on the vme/multibus we have the page map to control where ram appears
105 * in the address space.   we choose to have RAM start at 0 in the
106 * 24 bit address space.   this means that sc_iobase == sc_maddr!
107 * to get the phyiscal address of the board's RAM you must take the
108 * top 12 bits of the physical address of the register address
109 * and or in the 4 bits from the status word as bits 17-20 (remember that
110 * the board ignores the chip's top 4 address lines).
111 * For example:
112 *   if the register is @ 0xffe88000, then the top 12 bits are 0xffe00000.
113 *   to get the 4 bits from the the status word just do status & IEVME_HADDR.
114 *   suppose the value is "4".   Then just shift it left 16 bits to get
115 *   it into bits 17-20 (e.g. 0x40000).    Then or it to get the
116 *   address of RAM (in our example: 0xffe40000).   see the attach routine!
117 *
118 * on the onboard ie interface the 24 bit address space is hardwired
119 * to be 0xff000000 -> 0xffffffff of KVA.   this means that sc_iobase
120 * will be 0xff000000.   sc_maddr will be where ever we allocate RAM
121 * in KVA.    note that since the SCP is at a fixed address it means
122 * that we have to allocate a fixed KVA for the SCP.
123 */
124
125struct ie_softc {
126	struct device sc_dev;   /* device structure */
127
128	bus_space_tag_t bt;
129	bus_space_handle_t bh;
130
131	caddr_t sc_iobase;      /* KVA of base of 24 bit addr space */
132	caddr_t sc_maddr;       /* KVA of base of chip's RAM (16bit addr sp.)*/
133	u_int sc_msize;         /* how much RAM we have/use */
134	caddr_t sc_reg;         /* KVA of car's register */
135
136	struct ethercom sc_ethercom;/* system ethercom structure */
137
138	void (*hwreset) __P((struct ie_softc *));
139				/* card dependent reset function */
140	void (*hwinit) __P((struct ie_softc *));
141				/* card dependent "go on-line" function */
142	void (*chan_attn) __P((struct ie_softc *));
143				/* card dependent attn function */
144	void (*memcopy) __P((const void *, void *, u_int));
145	                        /* card dependent memory copy function */
146        void (*memzero) __P((void *, u_int));
147	                        /* card dependent memory zero function */
148	caddr_t (*align) __P((caddr_t));
149	                        /* arch dependent alignment function */
150	int (*intrhook) __P((struct ie_softc *));
151	                        /* card dependent interrupt handling */
152
153	int want_mcsetup;       /* mcsetup flag */
154	int promisc;            /* are we in promisc mode? */
155
156	/*
157	 * pointers to the 3 major control structures
158	 */
159
160	volatile struct ie_sys_conf_ptr *scp;
161	volatile struct ie_int_sys_conf_ptr *iscp;
162	volatile struct ie_sys_ctl_block *scb;
163
164	/*
165	 * pointer and size of a block of KVA where the buffers
166	 * are to be allocated from
167	 */
168
169	caddr_t buf_area;
170	int buf_area_sz;
171
172	/*
173	 * the actual buffers (recv and xmit)
174	 */
175
176	volatile struct ie_recv_frame_desc *rframes[MAXFRAMES];
177	volatile struct ie_recv_buf_desc *rbuffs[MAXRXBUF];
178	volatile char *cbuffs[MAXRXBUF];
179        int rfhead, rftail, rbhead, rbtail;
180
181	volatile struct ie_xmit_cmd *xmit_cmds[NTXBUF];
182	volatile struct ie_xmit_buf *xmit_buffs[NTXBUF];
183	u_char *xmit_cbuffs[NTXBUF];
184
185	int xmit_busy;
186	int xchead, xctail;
187
188	struct ie_en_addr mcast_addrs[MAXMCAST + 1];
189	int mcast_count;
190
191	int nframes;      /* number of frames in use */
192	int nrxbuf;       /* number of recv buffs in use */
193
194#ifdef IEDEBUG
195	int sc_debug;
196#endif
197};
198
199void ie_attach __P((struct ie_softc *, char *, u_int8_t *));
200int ieintr __P((void *));
201