1/*	$NetBSD: i128.c,v 1.3 2008/04/29 06:53:02 martin Exp $ */
2
3/*-
4 * Copyright (c) 2007 Michael Lorenz
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: i128.c,v 1.3 2008/04/29 06:53:02 martin Exp $");
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/buf.h>
35#include <sys/device.h>
36#include <sys/conf.h>
37
38#include <sys/bus.h>
39#include <machine/autoconf.h>
40
41#include <dev/ic/i128reg.h>
42#include <dev/ic/i128var.h>
43
44void
45i128_init(bus_space_tag_t tag, bus_space_handle_t regh, int stride, int depth)
46{
47	/* initialize the i128's blitter */
48	switch (depth) {
49		case 8:
50			bus_space_write_4(tag, regh, BUF_CTRL, BC_PSIZ_8B);
51			break;
52		case 16:
53			bus_space_write_4(tag, regh, BUF_CTRL, BC_PSIZ_16B);
54			break;
55		case 32:
56			bus_space_write_4(tag, regh, BUF_CTRL, BC_PSIZ_32B);
57			break;
58		default:
59			aprint_error("i128: unsupported colour depth (%d)\n",
60			    depth);
61			return;
62	}
63
64	bus_space_write_4(tag, regh, DE_PGE, 0);
65	bus_space_write_4(tag, regh, DE_SORG, 0);
66	bus_space_write_4(tag, regh, DE_DORG, 0);
67	bus_space_write_4(tag, regh, DE_MSRC, 0);
68	bus_space_write_4(tag, regh, DE_WKEY, 0);
69	bus_space_write_4(tag, regh, DE_SPTCH, stride);
70	bus_space_write_4(tag, regh, DE_DPTCH, stride);
71	bus_space_write_4(tag, regh, RMSK, 0);
72	bus_space_write_4(tag, regh, XY4_ZM, ZOOM_NONE);
73	bus_space_write_4(tag, regh, LPAT, 0xffffffff);
74	bus_space_write_4(tag, regh, ACNTRL, 0);
75	bus_space_write_4(tag, regh, INTM, 3);
76	bus_space_write_4(tag, regh, CLPTL, 0x00000000);
77	bus_space_write_4(tag, regh, CLPBR, 0x1fff0fff);
78	bus_space_write_4(tag, regh, MASK, 0xffffffff);
79}
80
81void
82i128_bitblt(bus_space_tag_t tag, bus_space_handle_t regh, int xs, int ys,
83    int xd, int yd, int wi, int he, int rop)
84{
85	int dir = 0;
86
87	if (xs < xd) {
88		dir |= DIR_RL;
89		xs += wi - 1;
90		xd += wi - 1;
91	}
92	if (ys < yd) {
93		dir |= DIR_BT;
94		ys += he - 1;
95		yd += he - 1;
96	}
97
98	I128_READY(tag, regh);
99	bus_space_write_4(tag, regh, CMD,
100	    (rop & 0xff) << 8 | CO_BITBLT);
101	bus_space_write_4(tag, regh, XY3_DIR, dir);
102	bus_space_write_4(tag, regh, XY2_WH, (wi << 16) | he);
103	bus_space_write_4(tag, regh, XY0_SRC, (xs << 16) | ys);
104	bus_space_write_4(tag, regh, XY1_DST, (xd << 16) | yd);
105}
106
107void
108i128_rectfill(bus_space_tag_t tag, bus_space_handle_t regh, int x, int y,
109    int wi, int he, uint32_t color)
110{
111
112	I128_READY(tag, regh);
113	bus_space_write_4(tag, regh, CMD,
114	    CS_SOLID << 16 | (CR_COPY) << 8 | CO_BITBLT);
115	bus_space_write_4(tag, regh, FORE, color);
116	bus_space_write_4(tag, regh, XY3_DIR, 0);
117	bus_space_write_4(tag, regh, XY2_WH, (wi << 16) | he);
118	bus_space_write_4(tag, regh, XY0_SRC, 0);
119	bus_space_write_4(tag, regh, XY1_DST, (x << 16) | y);
120}
121
122void
123i128_ready(bus_space_tag_t t, bus_space_handle_t h)
124{
125    I128_READY(t, h);
126}
127
128void
129i128_sync(bus_space_tag_t t, bus_space_handle_t h)
130{
131    I128_DONE(t, h);
132}
133
134